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YA Home - GPIO stuff
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| # cat /proc/cpuinfo | |
| processor : 0 | |
| model name : ARMv7 Processor rev 5 (v7l) | |
| BogoMIPS : 48.00 | |
| Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae | |
| CPU implementer : 0x41 | |
| CPU architecture: 7 | |
| CPU variant : 0x0 | |
| CPU part : 0xc07 | |
| CPU revision : 5 | |
| Hardware : sun8iw19 | |
| Revision : 0000 | |
| Serial : 0000000000000000 | |
| talvez: 800-1000Mhz | |
| PCB LEGEND: OG2101A | |
| # cat /proc/version | |
| Linux version 4.9.118 (shenzhiyuan@user-System-Asus-Z390) (gcc version 6.4.1 (OpenWrt/Linaro GCC 6.4-2017.11 2017-11) ) #2 PREEMPT Thu Sep 23 06:40:57 UTC 2021 |
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| Erro GPIO | |
| -- log original, quando o firmware da camera inicia os Apps originais | |
| insmod /home/app/localko/cpld_periph.ko hw=0000000000000000000000000000000000000000000000000000000000000000 | |
| #cat /sys/kernel/debug/gpio | |
| gpiochip1: GPIOs 0-287, parent: platform/pio, pio | |
| gpio-0 ( |? ) in lo | |
| gpio-22 ( |sysfs ) in lo | |
| gpio-68 ( |card-pwr-gpios ) out lo | |
| gpio-115 ( |phy-rst ) out hi | |
| gpio-144 ( |reset_btn ) in hi | |
| gpio-145 ( |led_orange ) out hi | |
| gpio-166 ( |cd ) in lo | |
| gpio-198 ( |sysfs ) out hi | |
| gpio-235 ( |ir_cut_anode ) out lo | |
| gpio-236 ( |ir_cut_cathode ) out lo | |
| gpio-237 ( |led_bule ) out hi | |
| gpio-238 ( |speaker_en ) out hi | |
| gpio-255 ( |led_white ) out lo | |
| gpio-259 ( |? ) in hi | |
| gpio-260 ( |? ) in hi | |
| -- log com minhas modificações onde os apps não são executados.. | |
| (sem o cpld_periph.ko) | |
| #cat /sys/kernel/debug/gpio | |
| gpiochip1: GPIOs 0-287, parent: platform/pio, pio: | |
| gpio-0 ( |? ) in lo | |
| gpio-68 ( |card-pwr-gpios ) out lo | |
| gpio-115 ( |phy-rst ) out hi | |
| gpio-166 ( |cd ) in lo | |
| gpio-198 ( |sysfs ) out hi | |
| gpio-259 ( |? ) in hi | |
| gpio-260 ( |? ) in hi | |
| # insmod /tmp/sd/i2c-gpio.ko | |
| insmod: can't insert '/tmp/sd/i2c-gpio.ko': Operation not permitted | |
| ... | |
| <4>[ 32.379264] i2c_gpio: loading out-of-tree module taints kernel. | |
| <3>[ 32.379755] i2c_gpio_soft_init SDA=236 , SCL=235 | |
| <6>[ 32.385106] In ETX_I2C_Init | |
| <3>[ 32.386007] i2c_gpio_soft_init SDA=236 , SCL=235 | |
| <6>[ 32.391383] In ETX_I2C_Init | |
| <3>[ 32.391392] ERROR (-16): SCL GPIO 235 request | |
| --- | |
| https://elixir.bootlin.com/linux/v4.6/source/include/uapi/asm-generic/errno-base.h#L19 | |
| #define EBUSY 16 /* Device or resource busy */ | |
| DEPOIS DE RESTARTAR: | |
| # As operações com gpiofs funcionam, | |
| echo 235 > /sys/class/gpio/export | |
| echo out > /sys/class/gpio/gpio235/direction | |
| echo 0 > /sys/class/gpio/gpio235/value | |
| nota: compilei a libgpiod, mas acho que talvez não esteja compativel com o Kernel.. | |
| # ./gpioinfo | |
| gpiochip0 - 32 lines: | |
| ./gpioinfo: unable to retrieve the line object from chip: Invalid argument | |
| # ./gpioinfo gpiochip1 | |
| gpiochip1 - 288 lines: | |
| unable to retrieve the line object from chip: Invalid argument | |
| # ./gpioget gpiochip1 235 | |
| unable to request lines: Invalid argument | |
| # ./gpiodetect | |
| gpiochip0 [r_pio] (32 lines) | |
| gpiochip1 [pio] (288 lines) | |
| # ./gpioset gpiochip1 235=1 | |
| unable to request lines: Invalid argument | |
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| /dts-v1/; | |
| / { | |
| compatible = "allwinner,sun8iw19p1"; | |
| model = "sun8iw19"; | |
| interrupt-parent = <0x01>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| sram_a1 { | |
| compatible = "allwinner,sram_a1"; | |
| reg = <0x00 0x10000 0x00 0x10000>; | |
| }; | |
| ac200 { | |
| compatible = "allwinner,sunxi-ac200"; | |
| status = "okay"; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| clocks { | |
| compatible = "allwinner,clk-init"; | |
| device_type = "clocks"; | |
| ranges; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| reg = <0x00 0x3001000 0x00 0x1000 0x00 0x7010000 0x00 0x400 0x00 0x7000000 0x00 0x200>; | |
| pwm { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x67>; | |
| clock-output-names = "pwm"; | |
| linux,phandle = <0x67>; | |
| }; | |
| g2d { | |
| compatible = "allwinner,periph-clock"; | |
| assigned-clock-rates = <0x11e1a300>; | |
| #clock-cells = <0x00>; | |
| assigned-clocks = <0x0b>; | |
| phandle = <0x0b>; | |
| clock-output-names = "g2d"; | |
| linux,phandle = <0x0b>; | |
| }; | |
| dbgsys { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "dbgsys"; | |
| }; | |
| twi3 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x2e>; | |
| clock-output-names = "twi3"; | |
| linux,phandle = <0x2e>; | |
| }; | |
| pll_video0 { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x06>; | |
| clock-output-names = "pll_video0"; | |
| linux,phandle = <0x06>; | |
| }; | |
| cpurapbs1 { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpurapbs1"; | |
| }; | |
| spi2 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x4c>; | |
| clock-output-names = "spi2"; | |
| linux,phandle = <0x4c>; | |
| }; | |
| osc48m { | |
| compatible = "allwinner,fixed-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x09>; | |
| clock-output-names = "osc48m"; | |
| clock-frequency = <0x2dc6c00>; | |
| linux,phandle = <0x09>; | |
| }; | |
| i2s1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x3d>; | |
| clock-output-names = "i2s1"; | |
| linux,phandle = <0x3d>; | |
| }; | |
| hosc { | |
| compatible = "allwinner,fixed-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x08>; | |
| clock-output-names = "hosc"; | |
| clock-frequency = <0x16e3600>; | |
| linux,phandle = <0x08>; | |
| }; | |
| cpurcpus { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpurcpus"; | |
| }; | |
| gmac { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x9c>; | |
| clock-output-names = "gmac"; | |
| linux,phandle = <0x9c>; | |
| }; | |
| gpadc { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x9b>; | |
| clock-output-names = "gpadc"; | |
| linux,phandle = <0x9b>; | |
| }; | |
| tcon_lcd { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x64>; | |
| clock-output-names = "tcon_lcd"; | |
| linux,phandle = <0x64>; | |
| }; | |
| sdmmc2_rst { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x53>; | |
| clock-output-names = "sdmmc2_rst"; | |
| linux,phandle = <0x53>; | |
| }; | |
| twi1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x28>; | |
| clock-output-names = "twi1"; | |
| linux,phandle = <0x28>; | |
| }; | |
| spi0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x44>; | |
| clock-output-names = "spi0"; | |
| linux,phandle = <0x44>; | |
| }; | |
| sdmmc0_bus { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x58>; | |
| clock-output-names = "sdmmc0_bus"; | |
| linux,phandle = <0x58>; | |
| }; | |
| osc48md4 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x09>; | |
| clock-mult = <0x01>; | |
| #clock-cells = <0x00>; | |
| phandle = <0x39>; | |
| clock-output-names = "osc48md4"; | |
| linux,phandle = <0x39>; | |
| clock-div = <0x04>; | |
| }; | |
| apb1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "apb1"; | |
| }; | |
| isp { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x89>; | |
| clock-output-names = "isp"; | |
| linux,phandle = <0x89>; | |
| }; | |
| nna { | |
| assigned-clock-parents = <0x0d>; | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| assigned-clocks = <0x0c>; | |
| phandle = <0x0c>; | |
| clock-output-names = "nna"; | |
| linux,phandle = <0x0c>; | |
| }; | |
| pll_ddr0 { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x07>; | |
| clock-output-names = "pll_ddr0"; | |
| linux,phandle = <0x07>; | |
| }; | |
| pll_periph0div25m { | |
| compatible = "allwinner,fixed-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "pll_periph0div25m"; | |
| clock-frequency = <0x17d7840>; | |
| }; | |
| usbohci0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x37>; | |
| clock-output-names = "usbohci0"; | |
| linux,phandle = <0x37>; | |
| }; | |
| dma { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x11>; | |
| clock-output-names = "dma"; | |
| linux,phandle = <0x11>; | |
| }; | |
| pll_audio { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| assigned-clock-rates = <0x1588800>; | |
| #clock-cells = <0x00>; | |
| assigned-clocks = <0x02>; | |
| phandle = <0x02>; | |
| clock-output-names = "pll_audio"; | |
| linux,phandle = <0x02>; | |
| }; | |
| ahb2 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "ahb2"; | |
| }; | |
| psi { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "psi"; | |
| }; | |
| csi_top { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x86>; | |
| clock-output-names = "csi_top"; | |
| linux,phandle = <0x86>; | |
| }; | |
| cpu { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpu"; | |
| }; | |
| sdmmc0_mod { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x57>; | |
| clock-output-names = "sdmmc0_mod"; | |
| linux,phandle = <0x57>; | |
| }; | |
| losc_out { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0xa7>; | |
| clock-output-names = "losc_out"; | |
| linux,phandle = <0xa7>; | |
| }; | |
| uart2 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x1c>; | |
| clock-output-names = "uart2"; | |
| linux,phandle = <0x1c>; | |
| }; | |
| mipi_dphy0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x65>; | |
| clock-output-names = "mipi_dphy0"; | |
| linux,phandle = <0x65>; | |
| }; | |
| csi_master0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x87>; | |
| clock-output-names = "csi_master0"; | |
| linux,phandle = <0x87>; | |
| }; | |
| cpurpio { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x0f>; | |
| clock-output-names = "cpurpio"; | |
| linux,phandle = <0x0f>; | |
| }; | |
| sdmmc1_bus { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x5f>; | |
| clock-output-names = "sdmmc1_bus"; | |
| linux,phandle = <0x5f>; | |
| }; | |
| uart0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x16>; | |
| clock-output-names = "uart0"; | |
| linux,phandle = <0x16>; | |
| }; | |
| cpurapbs2 { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpurapbs2"; | |
| }; | |
| cpurahbs { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpurahbs"; | |
| }; | |
| pll_cpu { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| #clock-cells = <0x00>; | |
| phandle = <0xa0>; | |
| clock-output-names = "pll_cpu"; | |
| linux,phandle = <0xa0>; | |
| }; | |
| usbotg { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x35>; | |
| clock-output-names = "usbotg"; | |
| linux,phandle = <0x35>; | |
| }; | |
| pll_periph0 { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| assigned-clock-rates = <0x23c34600>; | |
| #clock-cells = <0x00>; | |
| phandle = <0x04>; | |
| clock-output-names = "pll_periph0"; | |
| linux,phandle = <0x04>; | |
| }; | |
| dspo { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "dspo"; | |
| }; | |
| cpurowc { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x22>; | |
| clock-output-names = "cpurowc"; | |
| linux,phandle = <0x22>; | |
| }; | |
| ephy_25m { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x9d>; | |
| clock-output-names = "ephy_25m"; | |
| linux,phandle = <0x9d>; | |
| }; | |
| periph32k { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x04>; | |
| clock-mult = <0x02>; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "periph32k"; | |
| clock-div = <0x8f0d>; | |
| }; | |
| twi2 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x2b>; | |
| clock-output-names = "twi2"; | |
| linux,phandle = <0x2b>; | |
| }; | |
| pll_csi { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| assigned-clock-rates = <0x202fbf00>; | |
| #clock-cells = <0x00>; | |
| assigned-clocks = <0x03>; | |
| phandle = <0x03>; | |
| clock-output-names = "pll_csi"; | |
| linux,phandle = <0x03>; | |
| }; | |
| spi1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x48>; | |
| clock-output-names = "spi1"; | |
| linux,phandle = <0x48>; | |
| }; | |
| sdmmc0_rst { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x59>; | |
| clock-output-names = "sdmmc0_rst"; | |
| linux,phandle = <0x59>; | |
| }; | |
| pll_uni { | |
| compatible = "allwinner,pll-clock"; | |
| lock-mode = "new"; | |
| assigned-clock-rates = <0x23c34600>; | |
| #clock-cells = <0x00>; | |
| phandle = <0x05>; | |
| clock-output-names = "pll_uni"; | |
| linux,phandle = <0x05>; | |
| }; | |
| sdmmc1_mod { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x5e>; | |
| clock-output-names = "sdmmc1_mod"; | |
| linux,phandle = <0x5e>; | |
| }; | |
| cpuapb { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpuapb"; | |
| }; | |
| i2s0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x3a>; | |
| clock-output-names = "i2s0"; | |
| linux,phandle = <0x3a>; | |
| }; | |
| apb2 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "apb2"; | |
| }; | |
| cpurapbs2_pll { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpurapbs2_pll"; | |
| }; | |
| mipi_host0 { | |
| assigned-clock-parents = <0x08>; | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| assigned-clocks = <0x0e>; | |
| phandle = <0x0e>; | |
| clock-output-names = "mipi_host0"; | |
| linux,phandle = <0x0e>; | |
| }; | |
| usbehci0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x36>; | |
| clock-output-names = "usbehci0"; | |
| linux,phandle = <0x36>; | |
| }; | |
| hoscd2 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x08>; | |
| clock-mult = <0x01>; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "hoscd2"; | |
| clock-div = <0x02>; | |
| }; | |
| codec_4x { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "codec_4x"; | |
| }; | |
| sdmmc2_bus { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x52>; | |
| clock-output-names = "sdmmc2_bus"; | |
| linux,phandle = <0x52>; | |
| }; | |
| twi0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x25>; | |
| clock-output-names = "twi0"; | |
| linux,phandle = <0x25>; | |
| }; | |
| display_top { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x63>; | |
| clock-output-names = "display_top"; | |
| linux,phandle = <0x63>; | |
| }; | |
| ahb3 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "ahb3"; | |
| }; | |
| losc { | |
| compatible = "allwinner,fixed-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x12>; | |
| clock-output-names = "losc"; | |
| clock-frequency = <0x8000>; | |
| linux,phandle = <0x12>; | |
| }; | |
| codec_1x { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x40>; | |
| clock-output-names = "codec_1x"; | |
| linux,phandle = <0x40>; | |
| }; | |
| iosc { | |
| compatible = "allwinner,fixed-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "iosc"; | |
| clock-frequency = <0xf42400>; | |
| }; | |
| pll_audiox4 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x02>; | |
| clock-mult = <0x04>; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "pll_audiox4"; | |
| clock-div = <0x01>; | |
| }; | |
| hstimer { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "hstimer"; | |
| }; | |
| usbohci0_12m { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x38>; | |
| clock-output-names = "usbohci0_12m"; | |
| linux,phandle = <0x38>; | |
| }; | |
| dcxo_out { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "dcxo_out"; | |
| }; | |
| ahb1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "ahb1"; | |
| }; | |
| sdram { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "sdram"; | |
| }; | |
| pll_unix2 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x05>; | |
| clock-mult = <0x02>; | |
| #clock-cells = <0x00>; | |
| phandle = <0x50>; | |
| clock-output-names = "pll_unix2"; | |
| linux,phandle = <0x50>; | |
| clock-div = <0x01>; | |
| }; | |
| eise { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x15>; | |
| clock-output-names = "eise"; | |
| linux,phandle = <0x15>; | |
| }; | |
| pio { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x10>; | |
| clock-output-names = "pio"; | |
| linux,phandle = <0x10>; | |
| }; | |
| uart3 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x1f>; | |
| clock-output-names = "uart3"; | |
| linux,phandle = <0x1f>; | |
| }; | |
| ve { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x13>; | |
| clock-output-names = "ve"; | |
| linux,phandle = <0x13>; | |
| }; | |
| pll_audiox2 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x02>; | |
| clock-mult = <0x02>; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "pll_audiox2"; | |
| clock-div = <0x01>; | |
| }; | |
| csi_master1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x88>; | |
| clock-output-names = "csi_master1"; | |
| linux,phandle = <0x88>; | |
| }; | |
| sdmmc1_rst { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x60>; | |
| clock-output-names = "sdmmc1_rst"; | |
| linux,phandle = <0x60>; | |
| }; | |
| ths { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x94>; | |
| clock-output-names = "ths"; | |
| linux,phandle = <0x94>; | |
| }; | |
| sdmmc2_mod { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x51>; | |
| clock-output-names = "sdmmc2_mod"; | |
| linux,phandle = <0x51>; | |
| }; | |
| pll_periph0x2 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x04>; | |
| clock-mult = <0x02>; | |
| #clock-cells = <0x00>; | |
| phandle = <0x0d>; | |
| clock-output-names = "pll_periph0x2"; | |
| linux,phandle = <0x0d>; | |
| clock-div = <0x01>; | |
| }; | |
| iommu { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0xa6>; | |
| clock-output-names = "iommu"; | |
| linux,phandle = <0xa6>; | |
| }; | |
| avs { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "avs"; | |
| }; | |
| usbphy0 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x34>; | |
| clock-output-names = "usbphy0"; | |
| linux,phandle = <0x34>; | |
| }; | |
| pll_video0x4 { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x06>; | |
| clock-mult = <0x04>; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "pll_video0x4"; | |
| clock-div = <0x01>; | |
| }; | |
| axi { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "axi"; | |
| }; | |
| de { | |
| compatible = "allwinner,periph-clock"; | |
| assigned-clock-rates = <0x11e1a300>; | |
| #clock-cells = <0x00>; | |
| assigned-clocks = <0x0a>; | |
| phandle = <0x0a>; | |
| clock-output-names = "de"; | |
| linux,phandle = <0x0a>; | |
| }; | |
| nna_rts { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x66>; | |
| clock-output-names = "nna_rst"; | |
| linux,phandle = <0x66>; | |
| }; | |
| mbus { | |
| compatible = "allwinner,fixed-factor-clock"; | |
| clocks = <0x07>; | |
| clock-mult = <0x01>; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "mbus"; | |
| clock-div = <0x04>; | |
| }; | |
| cpurcpus_pll { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "cpurcpus_pll"; | |
| }; | |
| ce { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x93>; | |
| clock-output-names = "ce"; | |
| linux,phandle = <0x93>; | |
| }; | |
| uart1 { | |
| compatible = "allwinner,periph-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x19>; | |
| clock-output-names = "uart1"; | |
| linux,phandle = <0x19>; | |
| }; | |
| stwi { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| phandle = <0x31>; | |
| clock-output-names = "stwi"; | |
| linux,phandle = <0x31>; | |
| }; | |
| spwm { | |
| compatible = "allwinner,periph-cpus-clock"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "spwm"; | |
| }; | |
| }; | |
| xy_motor { | |
| compatible = "xy,pwm_motor"; | |
| }; | |
| intc-nmi@07010320 { | |
| compatible = "allwinner,sun8i-nmi"; | |
| #interrupt-cells = <0x02>; | |
| interrupt-parent = <0xa5>; | |
| #address-cells = <0x00>; | |
| interrupts = <0x00 0x68 0x04>; | |
| reg = <0x00 0x7010320 0x00 0x0c>; | |
| pad-control-v1 = <0x7000208>; | |
| interrupt-controller; | |
| }; | |
| memory@40000000 { | |
| device_type = "memory"; | |
| reg = <0x00 0x40000000 0x00 0x4000000>; | |
| }; | |
| uboot { | |
| }; | |
| interrupt-controller@03020000 { | |
| compatible = "arm,cortex-a15-gic\0arm,cortex-a9-gic"; | |
| device_type = "gic"; | |
| #interrupt-cells = <0x03>; | |
| interrupt-parent = <0xa5>; | |
| #address-cells = <0x00>; | |
| interrupts = <0x01 0x09 0xf04>; | |
| phandle = <0xa5>; | |
| reg = <0x00 0x3021000 0x00 0x1000 0x00 0x3022000 0x00 0x2000 0x00 0x3024000 0x00 0x2000 0x00 0x3026000 0x00 0x2000>; | |
| linux,phandle = <0xa5>; | |
| interrupt-controller; | |
| }; | |
| opp_dvfs_table { | |
| cluster_num = <0x01>; | |
| opp_table_count = <0x01>; | |
| opp_l_table0 { | |
| compatible = "allwinner,opp_l_table0"; | |
| opp_count = <0x05>; | |
| phandle = <0xa1>; | |
| opp-shared; | |
| linux,phandle = <0xa1>; | |
| opp04 { | |
| opp-microvolt = <0xf4240>; | |
| opp-hz = <0x00 0x41cdb400>; | |
| clock-latency-ns = <0x1e8480>; | |
| pval = <0x1004>; | |
| axi-bus-divide-ratio = <0x03>; | |
| }; | |
| opp02 { | |
| opp-microvolt = <0xdbba0>; | |
| opp-hz = <0x00 0x365c0400>; | |
| clock-latency-ns = <0x1e8480>; | |
| pval = <0xc80>; | |
| axi-bus-divide-ratio = <0x03>; | |
| }; | |
| opp00 { | |
| opp-microvolt = <0xc8320>; | |
| opp-hz = <0x00 0x23c34600>; | |
| clock-latency-ns = <0x1e8480>; | |
| pval = <0x8fc>; | |
| axi-bus-divide-ratio = <0x03>; | |
| }; | |
| opp03 { | |
| opp-microvolt = <0xea600>; | |
| opp-hz = <0x00 0x3c14dc00>; | |
| clock-latency-ns = <0x1e8480>; | |
| pval = <0xe10>; | |
| axi-bus-divide-ratio = <0x03>; | |
| }; | |
| opp01 { | |
| opp-microvolt = <0xd1f60>; | |
| opp-hz = <0x00 0x30a32c00>; | |
| clock-latency-ns = <0x1e8480>; | |
| pval = <0xb54>; | |
| axi-bus-divide-ratio = <0x03>; | |
| }; | |
| }; | |
| }; | |
| psci { | |
| compatible = "arm,psci-1.0"; | |
| method = "smc"; | |
| }; | |
| interrupt-controller@0 { | |
| compatible = "allwinner,sunxi-wakeupgen"; | |
| #interrupt-cells = <0x03>; | |
| interrupt-parent = <0xa5>; | |
| phandle = <0x01>; | |
| linux,phandle = <0x01>; | |
| interrupt-controller; | |
| }; | |
| sram_a2 { | |
| compatible = "allwinner,sram_a2"; | |
| reg = <0x00 0x40000 0x00 0x14000>; | |
| }; | |
| n_brom { | |
| compatible = "allwinner,n-brom"; | |
| reg = <0x00 0x00 0x00 0xc000>; | |
| }; | |
| aliases { | |
| pwm = "/soc@03000000/pwm@0300a000\0/soc@03000000/pwm@0300a000"; | |
| pwm9 = "/soc@03000000/pwm9@0300a000\0/soc@03000000/pwm9@0300a000"; | |
| twi3 = "/soc@03000000/twi@0x05002c00\0/soc@03000000/twi@0x05002c00"; | |
| spi2 = "/soc@03000000/spi@05012000\0/soc@03000000/spi@05012000"; | |
| lcd0 = "/soc@03000000/lcd0@01c0c000\0/soc@03000000/lcd0@01c0c000"; | |
| pwm7 = "/soc@03000000/pwm7@0300a000\0/soc@03000000/pwm7@0300a000"; | |
| twi1 = "/soc@03000000/twi@0x05002400\0/soc@03000000/twi@0x05002400"; | |
| spi0 = "/soc@03000000/spi@05010000\0/soc@03000000/spi@05010000"; | |
| global_timer0 = "/soc@03000000/timer@03009000\0/soc@03000000/timer@03009000"; | |
| gmac0 = "/soc@03000000/eth@05020000\0/soc@03000000/eth@05020000"; | |
| pwm5 = "/soc@03000000/pwm5@0300a000\0/soc@03000000/pwm5@0300a000"; | |
| pwm3 = "/soc@03000000/pwm3@0300a000\0/soc@03000000/pwm3@0300a000"; | |
| serial3 = "/soc@03000000/uart@05000c00\0/soc@03000000/uart@05000c00"; | |
| pwm1 = "/soc@03000000/pwm1@0300a000\0/soc@03000000/pwm1@0300a000"; | |
| serial1 = "/soc@03000000/uart@05000400\0/soc@03000000/uart@05000400"; | |
| twi4 = "/soc@03000000/twi@0x07081400\0/soc@03000000/twi@0x07081400"; | |
| pwm8 = "/soc@03000000/pwm8@0300a000\0/soc@03000000/pwm8@0300a000"; | |
| disp = "/soc@03000000/disp@01000000\0/soc@03000000/disp@01000000"; | |
| twi2 = "/soc@03000000/twi@0x05002800\0/soc@03000000/twi@0x05002800"; | |
| spi1 = "/soc@03000000/spi@05011000\0/soc@03000000/spi@05011000"; | |
| pwm6 = "/soc@03000000/pwm6@0300a000\0/soc@03000000/pwm6@0300a000"; | |
| mmc2 = "/soc@03000000/sdmmc@04022000\0/soc@03000000/sdmmc@04022000"; | |
| twi0 = "/soc@03000000/twi@0x05002000\0/soc@03000000/twi@0x05002000"; | |
| pwm4 = "/soc@03000000/pwm4@0300a000\0/soc@03000000/pwm4@0300a000"; | |
| mmc0 = "/soc@03000000/sdmmc@04020000\0/soc@03000000/sdmmc@04020000"; | |
| boot_disp = "/soc@03000000/boot_disp\0/soc@03000000/boot_disp"; | |
| pwm2 = "/soc@03000000/pwm2@0300a000\0/soc@03000000/pwm2@0300a000"; | |
| serial2 = "/soc@03000000/uart@05000800\0/soc@03000000/uart@05000800"; | |
| pwm0 = "/soc@03000000/pwm0@0300a000\0/soc@03000000/pwm0@0300a000"; | |
| serial0 = "/soc@03000000/uart@05000000\0/soc@03000000/uart@05000000"; | |
| }; | |
| chosen { | |
| bootargs = "earlyprintk=sunxi-uart,0x05000000 initcall_debug=0 console=ttyS0,115200 loglevel=4 root=/dev/mtdblock2 rootwait init=/pseudo_init rdinit=/rdinit partitions=boot@mtdblock1:rootfs@mtdblock2:home@mtdblock3:backup@mtdblock4:env@mtdblock5:mfg@mtdblock6:conf@mtdblock7:UDISK@mtdblock8 cma=4M coherent_pool=16K ion_carveout_list= androidboot.hardware=sun8iw19p1 boot_type=3 gpt=1 uboot_message=2018.05(09/23/2021-14:39:58)"; | |
| linux,initrd-start = <0x00 0x800040>; | |
| linux,initrd-end = <0x00 0x1000080>; | |
| }; | |
| soc@03000000 { | |
| compatible = "simple-bus"; | |
| device_type = "soc"; | |
| ranges; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| sound@0 { | |
| compatible = "allwinner,sunxi-codec-machine"; | |
| device_type = "sndcodec"; | |
| status = "okay"; | |
| interrupts = <0x00 0x1c 0x04>; | |
| sunxi,audio-codec = <0x41>; | |
| }; | |
| pinctrl@0300b000 { | |
| compatible = "allwinner,sun8iw19p1-pinctrl"; | |
| clocks = <0x10>; | |
| device_type = "pio"; | |
| gpio-controller; | |
| #interrupt-cells = <0x03>; | |
| input-debounce = <0x00 0x00 0x00 0x01 0x00 0x00 0x00>; | |
| interrupts = <0x00 0x43 0x04 0x00 0x44 0x04 0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04 0x00 0x49 0x04>; | |
| #size-cells = <0x00>; | |
| phandle = <0x5d>; | |
| reg = <0x00 0x300b000 0x00 0x400>; | |
| #gpio-cells = <0x06>; | |
| linux,phandle = <0x5d>; | |
| interrupt-controller; | |
| pwm6@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH6"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x7f>; | |
| linux,phandle = <0x7f>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi3@1 { | |
| allwinner,function = "spi3"; | |
| allwinner,pins = "PI6"; | |
| allwinner,pname = "spi3_cs0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| card2_boot_para@0 { | |
| allwinner,function = "card2_boot_para"; | |
| allwinner,pins = "PF25\0PF24\0PF16\0PF17\0PF18\0PF19\0PF20\0PF21\0PF22\0PF23\0PF31\0PF27"; | |
| allwinner,pname = "sdc_clk\0sdc_cmd\0sdc_d0\0sdc_d1\0sdc_d2\0sdc_d3\0sdc_d4\0sdc_d5\0sdc_d6\0sdc_d7\0sdc_emmc_rst\0sdc_ds"; | |
| allwinner,drive = <0x03>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0xa9>; | |
| allwinner,data = <0xffffffff>; | |
| linux,phandle = <0xa9>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| ts0_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PE0\0PE1\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11"; | |
| allwinner,pname = "ts0_clk\0ts0_err\0ts0_sync\0ts0_dvld\0ts0_d0\0ts0_d1\0ts0_d2\0ts0_d3\0ts0_d4\0ts0_d5\0ts0_d6\0ts0_d7"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| daudio1_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x3f>; | |
| linux,phandle = <0x3f>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm1@0 { | |
| allwinner,function = "pwm1"; | |
| allwinner,pins = "PH1"; | |
| allwinner,pname = "pwm1_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x74>; | |
| linux,phandle = <0x74>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi1@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH11\0PH12\0PH13\0PH14\0PH15"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x4b>; | |
| linux,phandle = <0x4b>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc1@0 { | |
| allwinner,function = "sdc1"; | |
| allwinner,pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5"; | |
| allwinner,drive = <0x03>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x61>; | |
| linux,phandle = <0x61>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| pwm9@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PD22"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x85>; | |
| linux,phandle = <0x85>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| csi_mclk1@0 { | |
| allwinner,function = "csi_mclk1"; | |
| allwinner,pins = "PE1"; | |
| allwinner,pname = "csi_mclk1"; | |
| allwinner,drive = <0x02>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x8c>; | |
| linux,phandle = <0x8c>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| uart0@0 { | |
| allwinner,function = "uart0"; | |
| allwinner,pins = "PH9\0PH10"; | |
| allwinner,pname = "uart0_tx\0uart0_rx"; | |
| allwinner,drive = <0xffffffff>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0xad>; | |
| allwinner,data = <0xffffffff>; | |
| linux,phandle = <0xad>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| twi0@0 { | |
| allwinner,function = "twi0"; | |
| allwinner,pins = "PI3\0PI4"; | |
| allwinner,pname = "twi0_scl\0twi0_sda"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x26>; | |
| linux,phandle = <0x26>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm4@0 { | |
| allwinner,function = "pwm4"; | |
| allwinner,pins = "PH4"; | |
| allwinner,pname = "pwm4_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x7a>; | |
| linux,phandle = <0x7a>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| csi1@0 { | |
| allwinner,function = "csi1"; | |
| allwinner,pins = "PE0\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11\0PE12\0PE13\0PE14\0PE15\0PE18\0PE19\0PE20\0PE21"; | |
| allwinner,pname = "csi1_pck\0csi1_hsync\0csi1_vsync\0csi1_d0\0csi1_d1\0csi1_d2\0csi1_d3\0csi1_d4\0csi1_d5\0csi1_d6\0csi1_d7\0csi1_d8\0csi1_d9\0csi1_d10\0csi1_d11\0csi1_d12\0csi1_d13\0csi1_d14\0csi1_d15"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x8e>; | |
| linux,phandle = <0x8e>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi1@0 { | |
| allwinner,function = "spi1"; | |
| allwinner,pins = "PH11\0PH12\0PH3"; | |
| allwinner,pname = "spi1_sclk\0spi1_mosi\0spi1_miso"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x49>; | |
| linux,phandle = <0x49>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| daudio0@0 { | |
| allwinner,function = "i2s0"; | |
| allwinner,pins = "PH0\0PH1\0PH2\0PH3\0PH4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0x3b>; | |
| linux,phandle = <0x3b>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| uart3@0 { | |
| allwinner,function = "uart3"; | |
| allwinner,pins = "PG0\0PG1\0PG2\0PG3"; | |
| allwinner,pname = "uart3_tx\0uart3_rx\0uart3_rts\0uart3_cts"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x20>; | |
| linux,phandle = <0x20>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| scr0@1 { | |
| allwinner,function = "sim0"; | |
| allwinner,pins = "PH22\0PH23"; | |
| allwinner,pname = "scr0_vppen\0scr0_vppp"; | |
| allwinner,drive = <0x00>; | |
| allwinner,muxsel = <0x02>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| pwm2@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH2"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x77>; | |
| linux,phandle = <0x77>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi3@0 { | |
| allwinner,function = "twi3"; | |
| allwinner,pins = "PH13\0PH14"; | |
| allwinner,pname = "twi3_scl\0twi3_sda"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x2f>; | |
| linux,phandle = <0x2f>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc2@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PC1\0PC4\0PC5\0PC6\0PC7\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x56>; | |
| linux,phandle = <0x56>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| ts2@0 { | |
| allwinner,function = "ts2"; | |
| allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11"; | |
| allwinner,pname = "ts2_clk\0ts2_err\0ts2_sync\0ts2_dvld\0ts2_d0\0ts2_d1\0ts2_d2\0ts2_d3\0ts2_d4\0ts2_d5\0ts2_d6\0ts2_d7"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm7@0 { | |
| allwinner,function = "pwm7"; | |
| allwinner,pins = "PH7"; | |
| allwinner,pname = "pwm7_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x80>; | |
| linux,phandle = <0x80>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| uart1@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PG6\0PG7\0PG4\0PG5"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x1b>; | |
| linux,phandle = <0x1b>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| aif3@0 { | |
| allwinner,function = "aif3"; | |
| allwinner,pins = "PG10\0PG11\0PG12\0PG13"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| nand0@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PC0\0PC1\0PC2\0PC3\0PC4\0PC5\0PC6\0PC7\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi1@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PI1\0PI2"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x2a>; | |
| linux,phandle = <0x2a>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc0@2 { | |
| allwinner,function = "uart0_jtag"; | |
| allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0x5c>; | |
| linux,phandle = <0x5c>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| aif2_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH1\0PH2\0PH3\0PH4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm5@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH5"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x7d>; | |
| linux,phandle = <0x7d>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi2@1 { | |
| allwinner,function = "spi2"; | |
| allwinner,pins = "PE21"; | |
| allwinner,pname = "spi2_cs0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x4e>; | |
| linux,phandle = <0x4e>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| ts1_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PE7\0PE8\0PE9\0PE10\0PE11"; | |
| allwinner,pname = "ts1_clk\0ts1_err\0ts1_sync\0ts1_dvld\0ts1_d0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| scr1@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PD15\0PD16\0PD12\0PD13\0PD14\0PE14\0PE15"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| gmac@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD18\0PD20\0PD21"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x9f>; | |
| linux,phandle = <0x9f>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| nand0@0 { | |
| allwinner,function = "nand0"; | |
| allwinner,pins = "PC0\0PC1\0PC2\0PC4\0PC6\0PC7\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14"; | |
| allwinner,pname = "nand0_we\0nand0_ale\0nand0_cle\0nand0_nre\0nand0_d7\0nand0_d6\0nand0_d5\0nand0_d4\0nand0_ndqs\0nand0_d3\0nand0_d2\0nand0_d1\0nand0_d0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm0@0 { | |
| allwinner,function = "pwm0"; | |
| allwinner,pins = "PH0"; | |
| allwinner,pname = "pwm0_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x72>; | |
| linux,phandle = <0x72>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi0@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PC0\0PC1\0PC2\0PC3\0PC4\0PC5\0PC6"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x47>; | |
| linux,phandle = <0x47>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc0@0 { | |
| allwinner,function = "sdc0"; | |
| allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; | |
| allwinner,drive = <0x03>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x5a>; | |
| linux,phandle = <0x5a>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| pwm8@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH8"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x83>; | |
| linux,phandle = <0x83>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| csi_mclk0@0 { | |
| allwinner,function = "csi_mclk0"; | |
| allwinner,pins = "PI0"; | |
| allwinner,pname = "csi_mclk0"; | |
| allwinner,drive = <0x02>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x8a>; | |
| linux,phandle = <0x8a>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| hdmi@2 { | |
| allwinner,function = "hcec"; | |
| allwinner,pins = "PH15"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| scr1@0 { | |
| allwinner,function = "sim1"; | |
| allwinner,pins = "PD15\0PD16\0PD12\0PD13\0PD14"; | |
| allwinner,pname = "scr1_rst\0scr1_det\0scr1_vccen\0scr1_sck\0scr1_sda"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| pwm3@0 { | |
| allwinner,function = "pwm3"; | |
| allwinner,pins = "PH3"; | |
| allwinner,pname = "pwm3_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x78>; | |
| linux,phandle = <0x78>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi3@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PI3\0PI4\0PI5\0PI6"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi0@0 { | |
| allwinner,function = "spi0"; | |
| allwinner,pins = "PC0\0PC2\0PC3\0PC5\0PC4"; | |
| allwinner,pname = "spi0_sclk\0spi0_mosi\0spi0_miso\0spi0_hold\0spi0_wp"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x45>; | |
| linux,phandle = <0x45>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| vdevice@0 { | |
| allwinner,function = "vdevice"; | |
| allwinner,pins = "PC0\0PC1"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x92>; | |
| linux,phandle = <0x92>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| uart2@0 { | |
| allwinner,function = "uart2"; | |
| allwinner,pins = "PE18\0PE19\0PE20\0PE21"; | |
| allwinner,pname = "uart2_tx\0uart2_rx\0uart2_rts\0uart2_cts"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x1d>; | |
| linux,phandle = <0x1d>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| pwm1@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH1"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x75>; | |
| linux,phandle = <0x75>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi2@0 { | |
| allwinner,function = "twi2"; | |
| allwinner,pins = "PH5\0PH6"; | |
| allwinner,pname = "twi2_scl\0twi2_sda"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x2c>; | |
| linux,phandle = <0x2c>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| hdmi@0 { | |
| allwinner,function = "ddc"; | |
| allwinner,pins = "PH13\0PH14"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc1@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x62>; | |
| linux,phandle = <0x62>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| ts1@0 { | |
| allwinner,function = "ts1"; | |
| allwinner,pins = "PE7\0PE8\0PE9\0PE10\0PE11"; | |
| allwinner,pname = "ts1_clk\0ts1_err\0ts1_sync\0ts1_dvld\0ts1_d0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| csi_mclk1@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PE1"; | |
| allwinner,pname = "csi_mclk1"; | |
| allwinner,drive = <0x02>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x8d>; | |
| linux,phandle = <0x8d>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm6@0 { | |
| allwinner,function = "pwm6"; | |
| allwinner,pins = "PH6"; | |
| allwinner,pname = "pwm6_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x7e>; | |
| linux,phandle = <0x7e>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi3@0 { | |
| allwinner,function = "spi3"; | |
| allwinner,pins = "PI3\0PI4\0PI5"; | |
| allwinner,pname = "spi3_sclk\0spi3_mosi\0spi3_miso"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi_para@0 { | |
| allwinner,function = "twi_para"; | |
| allwinner,pins = "PH14\0PH15"; | |
| allwinner,pname = "twi_scl\0twi_sda"; | |
| allwinner,drive = <0xffffffff>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0xaa>; | |
| allwinner,data = <0xffffffff>; | |
| linux,phandle = <0xaa>; | |
| allwinner,pull = <0xffffffff>; | |
| }; | |
| uart0@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH9\0PH10"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x18>; | |
| linux,phandle = <0x18>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| aif2@0 { | |
| allwinner,function = "aif2"; | |
| allwinner,pins = "PH1\0PH2\0PH3\0PH4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi0@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PI3\0PI4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x27>; | |
| linux,phandle = <0x27>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| aif3_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PG10\0PG11\0PG12\0PG13"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm4@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x7b>; | |
| linux,phandle = <0x7b>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| card0_boot_para@0 { | |
| allwinner,function = "card0_boot_para"; | |
| allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; | |
| allwinner,pname = "sdc_d1\0sdc_d0\0sdc_clk\0sdc_cmd\0sdc_d3\0sdc_d2"; | |
| allwinner,drive = <0xffffffff>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0xa8>; | |
| allwinner,data = <0xffffffff>; | |
| linux,phandle = <0xa8>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| csi1@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PE0\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11\0PE12\0PE13\0PE14\0PE15\0PE18\0PE19\0PE20\0PE21"; | |
| allwinner,pname = "csi1_pck\0csi1_hsync\0csi1_vsync\0csi1_d0\0csi1_d1\0csi1_d2\0csi1_d3\0csi1_d4\0csi1_d5\0csi1_d6\0csi1_d7\0csi1_d8\0csi1_d9\0csi1_d10\0csi1_d11\0csi1_d12\0csi1_d13\0csi1_d14\0csi1_d15"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x8f>; | |
| linux,phandle = <0x8f>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi1@1 { | |
| allwinner,function = "spi1"; | |
| allwinner,pins = "PH14\0PH15"; | |
| allwinner,pname = "spi1_cs0\0spi1_cs1"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x4a>; | |
| linux,phandle = <0x4a>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| ts2_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11"; | |
| allwinner,pname = "ts2_clk\0ts2_err\0ts2_sync\0ts2_dvld\0ts2_d0\0ts2_d1\0ts2_d2\0ts2_d3\0ts2_d4\0ts2_d5\0ts2_d6\0ts2_d7"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm9@0 { | |
| allwinner,function = "pwm9"; | |
| allwinner,pins = "PD22"; | |
| allwinner,pname = "pwm9_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x84>; | |
| linux,phandle = <0x84>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| uart3@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PG0\0PG1\0PG2\0PG3"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x21>; | |
| linux,phandle = <0x21>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| scr0@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH21\0PH22\0PH23\0PH24\0PH25\0PH26\0P27"; | |
| allwinner,drive = <0x00>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| jtag_para@0 { | |
| allwinner,function = "jtag_para"; | |
| allwinner,pins = "PH9\0PH10\0PH11\0PH12"; | |
| allwinner,pname = "jtag_ms\0jtag_ck\0jtag_do\0jtag_di"; | |
| allwinner,drive = <0xffffffff>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0xac>; | |
| allwinner,data = <0xffffffff>; | |
| linux,phandle = <0xac>; | |
| allwinner,pull = <0xffffffff>; | |
| }; | |
| twi3@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH13\0PH14"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x30>; | |
| linux,phandle = <0x30>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc2@2 { | |
| allwinner,function = "sdc2"; | |
| allwinner,pins = "PC0"; | |
| allwinner,drive = <0x02>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0x55>; | |
| linux,phandle = <0x55>; | |
| allwinner,pull = <0x02>; | |
| }; | |
| pwm7@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH7"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x81>; | |
| linux,phandle = <0x81>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| uart_para@0 { | |
| allwinner,function = "uart_para"; | |
| allwinner,pins = "PH9\0PH10"; | |
| allwinner,pname = "uart_debug_tx\0uart_debug_rx"; | |
| allwinner,drive = <0xffffffff>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0xab>; | |
| allwinner,data = <0xffffffff>; | |
| linux,phandle = <0xab>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| owc0@0 { | |
| allwinner,function = "owc0"; | |
| allwinner,pins = "PH4"; | |
| allwinner,pname = "owc0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x23>; | |
| linux,phandle = <0x23>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| daudio0_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH0\0PH1\0PH2\0PH3\0PH4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x3c>; | |
| linux,phandle = <0x3c>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| scr0@0 { | |
| allwinner,function = "sim0"; | |
| allwinner,pins = "PH21\0PH24\0PH25\0PH26\0PH27"; | |
| allwinner,pname = "scr0_rst\0scr0_det\0scr0_vccen\0scr0_sck\0scr0_sda"; | |
| allwinner,drive = <0x00>; | |
| allwinner,muxsel = <0x02>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| owc0_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH4"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x24>; | |
| linux,phandle = <0x24>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm2@0 { | |
| allwinner,function = "pwm2"; | |
| allwinner,pins = "PH2"; | |
| allwinner,pname = "pwm2_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x76>; | |
| linux,phandle = <0x76>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi2@2 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PE18\0PE19\0PE20\0PW21"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x4f>; | |
| linux,phandle = <0x4f>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc2@0 { | |
| allwinner,function = "sdc2"; | |
| allwinner,pins = "PC1\0PC4\0PC5\0PC6\0PC7\0PC8\0PC9\0PC11\0PC12\0PC13\0PC14\0PC0"; | |
| allwinner,drive = <0x02>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0x54>; | |
| linux,phandle = <0x54>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| uart1@0 { | |
| allwinner,function = "uart1"; | |
| allwinner,pins = "PG6\0PG7\0PG4\0PG5"; | |
| allwinner,pname = "uart1_tx\0uart1_rx\0uart1_rts\0uart1_cts"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x1a>; | |
| linux,phandle = <0x1a>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| nand0@1 { | |
| allwinner,function = "nand0"; | |
| allwinner,pins = "PC3\0PC5"; | |
| allwinner,pname = "nand0_ce0\0nand0_rb0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| pwm0@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x73>; | |
| linux,phandle = <0x73>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi1@0 { | |
| allwinner,function = "twi1"; | |
| allwinner,pins = "PI1\0PI2"; | |
| allwinner,pname = "twi1_scl\0twi1_sda"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x29>; | |
| linux,phandle = <0x29>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| sdc0@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x5b>; | |
| linux,phandle = <0x5b>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| ts0@0 { | |
| allwinner,function = "ts0"; | |
| allwinner,pins = "PE0\0PE1\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11"; | |
| allwinner,pname = "ts0_clk\0ts0_err\0ts0_sync\0ts0_dvld\0ts0_d0\0ts0_d1\0ts0_d2\0ts0_d3\0ts0_d4\0ts0_d5\0ts0_d6\0ts0_d7"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| csi_mclk0@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PI0"; | |
| allwinner,pname = "csi_mclk0"; | |
| allwinner,drive = <0x02>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x8b>; | |
| linux,phandle = <0x8b>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm5@0 { | |
| allwinner,function = "pwm5"; | |
| allwinner,pins = "PH5"; | |
| allwinner,pname = "pwm5_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x7c>; | |
| linux,phandle = <0x7c>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi2@0 { | |
| allwinner,function = "spi2"; | |
| allwinner,pins = "PE18\0PE19\0PE20"; | |
| allwinner,pname = "spi2_sclk\0spi2_mosi\0spi2_miso"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x4d>; | |
| linux,phandle = <0x4d>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| daudio1@0 { | |
| allwinner,function = "i2s1"; | |
| allwinner,pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0x3e>; | |
| linux,phandle = <0x3e>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| hdmi@3 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH15"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| scr1@1 { | |
| allwinner,function = "sim1"; | |
| allwinner,pins = "PE14\0PE15"; | |
| allwinner,pname = "scr1_vppen\0scr1_vppp"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| gmac@0 { | |
| allwinner,function = "gmac0"; | |
| allwinner,pins = "PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD18\0PD20\0PD21"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| phandle = <0x9e>; | |
| linux,phandle = <0x9e>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm3@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH3"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x79>; | |
| linux,phandle = <0x79>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| spi0@1 { | |
| allwinner,function = "spi0"; | |
| allwinner,pins = "PC1\0PC6"; | |
| allwinner,pname = "spi0_cs0\0spi0_cs1"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x04>; | |
| phandle = <0x46>; | |
| linux,phandle = <0x46>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| ts3_sleep@0 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PD7\0PD8\0PD9\0PD10\0PD11"; | |
| allwinner,pname = "ts3_clk\0ts3_err\0ts3_sync\0ts3_dvld\0ts3_d0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| ts3@0 { | |
| allwinner,function = "ts3"; | |
| allwinner,pins = "PD7\0PD8\0PD9\0PD10\0PD11"; | |
| allwinner,pname = "ts3_clk\0ts3_err\0ts3_sync\0ts3_dvld\0ts3_d0"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x05>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| pwm8@0 { | |
| allwinner,function = "pwm8"; | |
| allwinner,pins = "PH8"; | |
| allwinner,pname = "pwm8_positive"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x02>; | |
| phandle = <0x82>; | |
| linux,phandle = <0x82>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| uart2@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PE18\0PE19\0PE20\0PE21"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x1e>; | |
| linux,phandle = <0x1e>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| twi2@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH5\0PH6"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x2d>; | |
| linux,phandle = <0x2d>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| hdmi@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PH13\0PH14"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| }; | |
| card2_boot_para { | |
| card_line = <0x08>; | |
| card_ctrl = <0x02>; | |
| device_type = "card2_boot_para"; | |
| card_high_speed = <0x01>; | |
| pinctrl-0 = <0xa9>; | |
| }; | |
| pwm5@0300a000 { | |
| compatible = "allwinner,sunxi-pwm5"; | |
| pinctrl-1 = <0x7d>; | |
| status = "okay"; | |
| phandle = <0x6d>; | |
| pinctrl-0 = <0x7c>; | |
| linux,phandle = <0x6d>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| disp@01000000 { | |
| compatible = "allwinner,sunxi-disp"; | |
| clocks = <0x0a 0x63 0x64 0x65 0x0e>; | |
| status = "okay"; | |
| interrupts = <0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x2d 0x04>; | |
| reg = <0x00 0x1000000 0x00 0x3fffff 0x00 0x6510000 0x00 0xfff 0x00 0x6511000 0x00 0xfff 0x00 0x6504000 0x00 0x2000>; | |
| iommus = <0x14 0x00 0x00>; | |
| fb_base = <0x00>; | |
| boot_disp = <0x00>; | |
| }; | |
| pinctrl@07022000 { | |
| compatible = "allwinner,sun8iw19p1-r-pinctrl"; | |
| clocks = <0x0f>; | |
| device_type = "r_pio"; | |
| gpio-controller; | |
| #interrupt-cells = <0x03>; | |
| interrupts = <0x00 0x6a 0x04>; | |
| #size-cells = <0x00>; | |
| reg = <0x00 0x7022000 0x00 0x400>; | |
| #gpio-cells = <0x06>; | |
| interrupt-controller; | |
| s_twi0@0 { | |
| allwinner,function = "s_twi0"; | |
| allwinner,pins = "PL0\0PL1"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x03>; | |
| phandle = <0x32>; | |
| linux,phandle = <0x32>; | |
| allwinner,pull = <0x01>; | |
| }; | |
| s_twi0@1 { | |
| allwinner,function = "io_disabled"; | |
| allwinner,pins = "PL0\0PL1"; | |
| allwinner,drive = <0x01>; | |
| allwinner,muxsel = <0x07>; | |
| phandle = <0x33>; | |
| linux,phandle = <0x33>; | |
| allwinner,pull = <0x00>; | |
| }; | |
| }; | |
| vind@0 { | |
| compatible = "allwinner,sunxi-vin-media\0simple-bus"; | |
| clocks = <0x86 0x03 0x87 0x08 0x03 0x88 0x08 0x03 0x89 0x05>; | |
| pinctrl-3 = <0x8d>; | |
| pinctrl-1 = <0x8b>; | |
| vind0_clk = <0x1017df80>; | |
| vind0_isp = <0xbebc200>; | |
| ranges; | |
| status = "okay"; | |
| #address-cells = <0x02>; | |
| interrupts = <0x00 0x5c 0x04>; | |
| #size-cells = <0x02>; | |
| pinctrl-2 = <0x8c>; | |
| reg = <0x00 0x6600800 0x00 0x200 0x00 0x6600000 0x00 0x800>; | |
| pinctrl-0 = <0x8a>; | |
| device_id = <0x00>; | |
| pinctrl-names = "mclk0-default\0mclk0-sleep\0mclk1-default\0mclk1-sleep"; | |
| sensor@0 { | |
| sensor0_fmt = <0x01>; | |
| compatible = "allwinner,sunxi-sensor"; | |
| clocks = <0x87 0x08 0x03>; | |
| sensor0_power_en; | |
| sensor0_avdd_vol = <0x2ab980>; | |
| sensor0_dvdd-supply; | |
| sensor0_mclk_id = <0x00>; | |
| sensor0_twi_addr = <0x78>; | |
| act_handle = <0x91>; | |
| sensor0_mname = "sp2305_mipi"; | |
| flash_handle = <0x90>; | |
| sensor0_iovdd-supply; | |
| pinctrl-1 = <0x8b>; | |
| device_type = "sensor0"; | |
| sensor0_pos = "rear"; | |
| sensor0_reset = <0x5d 0x08 0x03 0x01 0x00 0x01 0x00>; | |
| sensor0_vflip = <0x00>; | |
| sensor0_isp_used = <0x01>; | |
| status = "okay"; | |
| sensor0_pwdn = <0x5d 0x08 0x04 0x01 0x00 0x01 0x00>; | |
| sensor0_dvdd_vol = <0x124f80>; | |
| sensor0_twi_cci_id = <0x01>; | |
| sensor0_hflip = <0x00>; | |
| pinctrl-0 = <0x8a>; | |
| sensor0_iovdd_vol = <0x1b7740>; | |
| device_id = <0x00>; | |
| sensor0_stby_mode = <0x00>; | |
| pinctrl-names = "mclk0-default\0mclk0-sleep"; | |
| sensor0_avdd-supply; | |
| }; | |
| actuator@0 { | |
| compatible = "allwinner,sunxi-actuator"; | |
| actuator0_slave = <0x18>; | |
| device_type = "actuator0"; | |
| actuator0_afvdd_vol = <0x2ab980>; | |
| actuator0_name = "ad5820_act"; | |
| actuator0_afvdd = "afvcc-csi"; | |
| status = "disabled"; | |
| phandle = <0x91>; | |
| actuator0_af_pwdn; | |
| linux,phandle = <0x91>; | |
| }; | |
| isp@1 { | |
| compatible = "allwinner,sunxi-isp"; | |
| status = "okay"; | |
| device_id = <0x01>; | |
| }; | |
| scaler@3 { | |
| compatible = "allwinner,sunxi-scaler"; | |
| status = "okay"; | |
| reg = <0x00 0x2104c00 0x00 0x400>; | |
| iommus = <0x14 0x05 0x01>; | |
| device_id = <0x03>; | |
| }; | |
| vinc@2 { | |
| vinc2_rear_sensor_sel = <0x00>; | |
| vinc2_isp_tx_ch = <0x00>; | |
| vinc2_isp_sel = <0x00>; | |
| vinc2_sensor_list = <0x00>; | |
| compatible = "allwinner,sunxi-vin-core"; | |
| vinc2_csi_sel = <0x00>; | |
| device_type = "vinc2"; | |
| vinc2_mipi_sel = <0x00>; | |
| status = "okay"; | |
| interrupts = <0x00 0x4c 0x04>; | |
| vinc2_front_sensor_sel = <0x00>; | |
| reg = <0x00 0x6609400 0x00 0x200>; | |
| iommus = <0x14 0x04 0x01>; | |
| device_id = <0x02>; | |
| }; | |
| scaler@1 { | |
| compatible = "allwinner,sunxi-scaler"; | |
| status = "okay"; | |
| reg = <0x00 0x2104400 0x00 0x400>; | |
| iommus = <0x14 0x05 0x01>; | |
| device_id = <0x01>; | |
| }; | |
| vinc@0 { | |
| compatible = "allwinner,sunxi-vin-core"; | |
| device_type = "vinc0"; | |
| vinc0_isp_tx_ch = <0x00>; | |
| vinc0_isp_sel = <0x00>; | |
| status = "okay"; | |
| vinc0_csi_sel = <0x00>; | |
| interrupts = <0x00 0x4a 0x04>; | |
| vinc0_front_sensor_sel = <0x00>; | |
| vinc0_rear_sensor_sel = <0x00>; | |
| vinc0_sensor_list = <0x00>; | |
| reg = <0x00 0x6609000 0x00 0x200>; | |
| iommus = <0x14 0x04 0x01>; | |
| device_id = <0x00>; | |
| vinc0_mipi_sel = <0x00>; | |
| }; | |
| csi@0 { | |
| compatible = "allwinner,sunxi-csi"; | |
| device_type = "csi0"; | |
| status = "okay"; | |
| interrupts = <0x00 0x4e 0x04>; | |
| reg = <0x00 0x6601000 0x00 0x1000>; | |
| iommus = <0x14 0x04 0x01>; | |
| device_id = <0x00>; | |
| }; | |
| sensor@1 { | |
| compatible = "allwinner,sunxi-sensor"; | |
| clocks = <0x88 0x08 0x03>; | |
| sensor1_hflip = <0x00>; | |
| sensor1_iovdd_vol = <0x2ab980>; | |
| act_handle; | |
| sensor1_avdd-supply; | |
| flash_handle; | |
| pinctrl-1 = <0x8d>; | |
| sensor1_stby_mode = <0x00>; | |
| device_type = "sensor1"; | |
| sensor1_fmt = <0x00>; | |
| sensor1_dvdd-supply; | |
| sensor1_pwdn = <0x5d 0x08 0x04 0x01 0x00 0x01 0x00>; | |
| sensor1_power_en; | |
| sensor1_avdd_vol = <0x2ab980>; | |
| sensor1_iovdd-supply; | |
| sensor1_mclk_id = <0x01>; | |
| sensor1_twi_addr = <0x6c>; | |
| status = "disabled"; | |
| sensor1_mname = "ov5647"; | |
| sensor1_pos = "front"; | |
| sensor1_reset = <0x5d 0x08 0x03 0x01 0x00 0x01 0x00>; | |
| sensor1_isp_used = <0x00>; | |
| sensor1_vflip = <0x00>; | |
| pinctrl-0 = <0x8c>; | |
| device_id = <0x01>; | |
| sensor1_twi_cci_id = <0x00>; | |
| sensor1_dvdd_vol = <0x16e360>; | |
| pinctrl-names = "mclk1-default\0mclk1-sleep"; | |
| }; | |
| flash@0 { | |
| compatible = "allwinner,sunxi-flash"; | |
| flash0_flvdd = [00]; | |
| device_type = "flash0"; | |
| flash0_en; | |
| status = "disabled"; | |
| phandle = <0x90>; | |
| flash0_mode; | |
| flash0_flvdd_vol; | |
| device_id = <0x00>; | |
| linux,phandle = <0x90>; | |
| flash0_type = <0x02>; | |
| }; | |
| isp@0 { | |
| compatible = "allwinner,sunxi-isp"; | |
| status = "okay"; | |
| interrupts = <0x00 0x21 0x04>; | |
| reg = <0x00 0x2100000 0x00 0x800>; | |
| iommus = <0x14 0x05 0x01>; | |
| device_id = <0x00>; | |
| }; | |
| vinc@3 { | |
| compatible = "allwinner,sunxi-vin-core"; | |
| device_type = "vinc3"; | |
| vinc3_sensor_list = <0x00>; | |
| vinc3_front_sensor_sel = <0x00>; | |
| vinc3_isp_sel = <0x00>; | |
| vinc3_isp_tx_ch = <0x00>; | |
| vinc3_csi_sel = <0x00>; | |
| status = "okay"; | |
| interrupts = <0x00 0x4d 0x04>; | |
| vinc3_rear_sensor_sel = <0x00>; | |
| vinc3_mipi_sel = <0x00>; | |
| reg = <0x00 0x6609600 0x00 0x200>; | |
| iommus = <0x14 0x04 0x01>; | |
| device_id = <0x03>; | |
| }; | |
| mipi@0 { | |
| compatible = "allwinner,sunxi-mipi"; | |
| status = "okay"; | |
| interrupts = <0x00 0x52 0x04>; | |
| reg = <0x00 0x660c000 0x00 0x1000>; | |
| device_id = <0x00>; | |
| }; | |
| scaler@2 { | |
| compatible = "allwinner,sunxi-scaler"; | |
| status = "okay"; | |
| reg = <0x00 0x2104800 0x00 0x400>; | |
| iommus = <0x14 0x05 0x01>; | |
| device_id = <0x02>; | |
| }; | |
| vinc@1 { | |
| compatible = "allwinner,sunxi-vin-core"; | |
| vinc1_mipi_sel = <0x00>; | |
| vinc1_front_sensor_sel = <0x00>; | |
| device_type = "vinc1"; | |
| vinc1_rear_sensor_sel = <0x00>; | |
| status = "okay"; | |
| interrupts = <0x00 0x4b 0x04>; | |
| vinc1_isp_tx_ch = <0x00>; | |
| reg = <0x00 0x6609200 0x00 0x200>; | |
| vinc1_isp_sel = <0x00>; | |
| iommus = <0x14 0x04 0x01>; | |
| device_id = <0x01>; | |
| vinc1_csi_sel = <0x00>; | |
| vinc1_sensor_list = <0x00>; | |
| }; | |
| scaler@0 { | |
| compatible = "allwinner,sunxi-scaler"; | |
| status = "okay"; | |
| reg = <0x00 0x2104000 0x00 0x400>; | |
| iommus = <0x14 0x05 0x01>; | |
| device_id = <0x00>; | |
| }; | |
| csi@1 { | |
| compatible = "allwinner,sunxi-csi"; | |
| pinctrl-1 = <0x8f>; | |
| device_type = "csi1"; | |
| status = "okay"; | |
| interrupts = <0x00 0x4f 0x04>; | |
| reg = <0x00 0x6602000 0x00 0x1000>; | |
| iommus = <0x14 0x04 0x01>; | |
| pinctrl-0 = <0x8e>; | |
| device_id = <0x01>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| }; | |
| platform { | |
| device_type = "platform"; | |
| eraseflag = <0x01>; | |
| }; | |
| clock { | |
| pll8 = <0x168>; | |
| pll6 = <0x258>; | |
| device_type = "clock"; | |
| pll4 = <0x12c>; | |
| pll9 = <0x129>; | |
| pll10 = <0x108>; | |
| }; | |
| uart@05000400 { | |
| compatible = "allwinner,sun8i-uart"; | |
| clocks = <0x19>; | |
| pinctrl-1 = <0x1b>; | |
| device_type = "uart1"; | |
| status = "disabled"; | |
| uart1_port = <0x01>; | |
| interrupts = <0x00 0x32 0x04>; | |
| reg = <0x00 0x5000400 0x00 0x400>; | |
| pinctrl-0 = <0x1a>; | |
| uart1_type = <0x04>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| gpadc { | |
| channel0_compare_higdata = <0x124f80>; | |
| compatible = "allwinner,sunxi-gpadc"; | |
| clocks = <0x9b>; | |
| key0_vol = <0x320>; | |
| key_cnt = <0x01>; | |
| status = "disable"; | |
| channel_chd_select = <0x01>; | |
| interrupts = <0x00 0x00 0x00>; | |
| channel_num = <0x01>; | |
| key0_val = <0x73>; | |
| channel0_compare_lowdata = <0x19f0a0>; | |
| channel_cld_select = <0x01>; | |
| channel_data_select = <0x00>; | |
| reg = <0x00 0x5070000 0x00 0x400>; | |
| channel_compare_select = <0x01>; | |
| channel_select = <0x01>; | |
| }; | |
| udc-controller@0x05100000 { | |
| compatible = "allwinner,sunxi-udc"; | |
| clocks = <0x34 0x35>; | |
| status = "okay"; | |
| interrupts = <0x00 0x40 0x04>; | |
| reg = <0x00 0x5100000 0x00 0x1000 0x00 0x00 0x00 0x100>; | |
| }; | |
| pwm2@0300a000 { | |
| compatible = "allwinner,sunxi-pwm2"; | |
| pinctrl-1 = <0x77>; | |
| status = "okay"; | |
| phandle = <0x6a>; | |
| pinctrl-0 = <0x76>; | |
| linux,phandle = <0x6a>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| g2d@01480000 { | |
| compatible = "allwinner,sunxi-g2d"; | |
| clocks = <0x0b>; | |
| status = "okay"; | |
| interrupts = <0x00 0x15 0x04>; | |
| reg = <0x00 0x1480000 0x00 0xbffff>; | |
| iommus = <0x14 0x06 0x01>; | |
| }; | |
| spi@05011000 { | |
| compatible = "allwinner,sun50i-spi"; | |
| clocks = <0x04 0x48>; | |
| pinctrl-1 = <0x4b>; | |
| device_type = "spi1"; | |
| spi1_cs_bitmap = <0x03>; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x37 0x04>; | |
| spi1_cs_number = <0x02>; | |
| #size-cells = <0x00>; | |
| reg = <0x00 0x5011000 0x00 0x1000>; | |
| clock-frequency = <0xbebc200>; | |
| pinctrl-0 = <0x49 0x4a>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| twi@0x05002800 { | |
| compatible = "allwinner,sun8i-twi"; | |
| clocks = <0x2b>; | |
| pinctrl-1 = <0x2d>; | |
| device_type = "twi2"; | |
| status = "disable"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x2b 0x04>; | |
| #size-cells = <0x00>; | |
| twi_drv_used = <0x01>; | |
| reg = <0x00 0x5002800 0x00 0x400>; | |
| clock-frequency = <0x30d40>; | |
| pinctrl-0 = <0x2c>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| sdmmc@04020000 { | |
| no-sdio; | |
| cap-mmc-highspeed; | |
| compatible = "allwinner,sunxi-mmc-v4p1x"; | |
| clocks = <0x08 0x50 0x57 0x58 0x59>; | |
| cap-sd-highspeed; | |
| pinctrl-1 = <0x5b>; | |
| device_type = "sdc0"; | |
| clock-names = "osc24m\0pll_periph\0mmc\0ahb\0rst"; | |
| cd-gpios = <0x5d 0x05 0x06 0x00 0x01 0x03 0xffffffff>; | |
| cap-wait-while-busy; | |
| status = "okay"; | |
| interrupts = <0x00 0x2e 0x04>; | |
| bus-width = <0x04>; | |
| sunxi-signal-vol-sw-without-pmu; | |
| pinctrl-2 = <0x5c>; | |
| sunxi-power-save-mode; | |
| sd-uhs-sdr50; | |
| reg = <0x00 0x4020000 0x00 0x1000>; | |
| sd-uhs-sdr104; | |
| pinctrl-0 = <0x5a>; | |
| sd-uhs-ddr50; | |
| min-frequency = <0x186a0>; | |
| cd-used-24M; | |
| max-frequency = <0x8f0d180>; | |
| card-pwr-gpios = <0x5d 0x02 0x04 0x01 0x01 0x02 0xffffffff>; | |
| pinctrl-names = "default\0sleep\0uart_jtag"; | |
| ctl-spec-caps = <0x08>; | |
| }; | |
| uart@05000c00 { | |
| compatible = "allwinner,sun8i-uart"; | |
| clocks = <0x1f>; | |
| uart3_port = <0x03>; | |
| pinctrl-1 = <0x21>; | |
| device_type = "uart3"; | |
| uart3_type = <0x04>; | |
| status = "disabled"; | |
| interrupts = <0x00 0x34 0x04>; | |
| reg = <0x00 0x5000c00 0x00 0x400>; | |
| pinctrl-0 = <0x20>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| codec@0x05096000 { | |
| rate_max = <0x2ee00>; | |
| compatible = "allwinner,sunxi-internal-codec"; | |
| clocks = <0x02 0x40>; | |
| digital_vol = <0x00>; | |
| pa_msleep_time = <0xa0>; | |
| period_bytes_max = <0x10000>; | |
| adcdrc_cfg = <0x00>; | |
| dacdrc_cfg = <0x01>; | |
| device_type = "codec"; | |
| buffer_bytes_max = <0x20000>; | |
| fifo_size = <0x80>; | |
| lineout_vol = <0x1f>; | |
| status = "okay"; | |
| periods_max = <0x08>; | |
| phandle = <0x41>; | |
| channels_max = <0x08>; | |
| adchpf_cfg = <0x01>; | |
| dachpf_cfg = <0x00>; | |
| reg = <0x00 0x5096000 0x00 0x320>; | |
| pa_level = <0x01>; | |
| main_gain = <0x17>; | |
| linux,phandle = <0x41>; | |
| }; | |
| auto_print { | |
| device_type = "auto_print"; | |
| status = "disabled"; | |
| }; | |
| card0_boot_para { | |
| card_line = <0x04>; | |
| card_ctrl = <0x00>; | |
| pinctrl-1 = <0x5b>; | |
| device_type = "card0_boot_para"; | |
| status = "okay"; | |
| card_high_speed = <0x01>; | |
| pinctrl-0 = <0xa8>; | |
| card-pwr-gpios = <0x5d 0x02 0x04 0x01 0x01 0x02 0xffffffff>; | |
| time_pwroff_ms = <0xc8>; | |
| }; | |
| pwm9@0300a000 { | |
| compatible = "allwinner,sunxi-pwm9"; | |
| pinctrl-1 = <0x85>; | |
| status = "okay"; | |
| phandle = <0x71>; | |
| pinctrl-0 = <0x84>; | |
| linux,phandle = <0x71>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| uart@05000000 { | |
| compatible = "allwinner,sun8i-uart"; | |
| clocks = <0x16>; | |
| pinctrl-1 = <0x18>; | |
| device_type = "uart0"; | |
| status = "okay"; | |
| interrupts = <0x00 0x31 0x04>; | |
| uart0_port = <0x00>; | |
| reg = <0x00 0x5000000 0x00 0x400>; | |
| pinctrl-0 = <0xad>; | |
| uart0_type = <0x02>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| nna@02400000 { | |
| compatible = "allwinner,sunxi-nna"; | |
| clocks = <0x0c 0x66>; | |
| status = "okay"; | |
| interrupts = <0x00 0x14 0x04>; | |
| reg = <0x00 0x2400000 0x00 0x1ffff>; | |
| iommus = <0x14 0x02 0x01>; | |
| }; | |
| pwm6@0300a000 { | |
| compatible = "allwinner,sunxi-pwm6"; | |
| pinctrl-1 = <0x7f>; | |
| status = "okay"; | |
| phandle = <0x6e>; | |
| pinctrl-0 = <0x7e>; | |
| linux,phandle = <0x6e>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| ehci0-controller@0x05101000 { | |
| compatible = "allwinner,sunxi-ehci0"; | |
| clocks = <0x34 0x36>; | |
| hci_ctrl_no = <0x00>; | |
| status = "okay"; | |
| interrupts = <0x00 0x41 0x04>; | |
| reg = <0x00 0x5101000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>; | |
| }; | |
| daudio@0x05091000 { | |
| rate_max = <0x2ee00>; | |
| pcm_lrck_period = <0x80>; | |
| compatible = "allwinner,sunxi-daudio"; | |
| clocks = <0x02 0x3d>; | |
| mclk_div = <0x01>; | |
| period_bytes_max = <0x10000>; | |
| rx_data_mode = <0x00>; | |
| pinctrl-1 = <0x3f>; | |
| device_type = "daudio1"; | |
| sign_extend = <0x00>; | |
| buffer_bytes_max = <0x20000>; | |
| fifo_size = <0x80>; | |
| tdm_config = <0x01>; | |
| slot_width_select = <0x20>; | |
| status = "disabled"; | |
| periods_max = <0x08>; | |
| msb_lsb_first = <0x00>; | |
| frametype = <0x00>; | |
| tx_data_mode = <0x00>; | |
| phandle = <0x43>; | |
| channels_max = <0x08>; | |
| reg = <0x00 0x5091000 0x00 0x7c>; | |
| pinctrl-0 = <0x3e>; | |
| linux,phandle = <0x43>; | |
| tdm_num = <0x01>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| pwm@0300a000 { | |
| compatible = "allwinner,sunxi-pwm"; | |
| clocks = <0x67>; | |
| status = "okay"; | |
| pwm-base = <0x00>; | |
| pwm-number = <0x0a>; | |
| reg = <0x00 0x300a000 0x00 0x400>; | |
| pwms = <0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71>; | |
| }; | |
| lcd0@01c0c000 { | |
| compatible = "allwinner,sunxi-lcd0"; | |
| status = "okay"; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| product { | |
| version = "100"; | |
| device_type = "product"; | |
| machine = "evb"; | |
| }; | |
| s_owc@07040400 { | |
| compatible = "allwinner,sunxi-owc"; | |
| clocks = <0x08 0x22>; | |
| pinctrl-1 = <0x24>; | |
| device_type = "s_owc0"; | |
| status = "okay"; | |
| interrupts = <0x00 0x72 0x04>; | |
| reg = <0x00 0x7040400 0x00 0x30>; | |
| pinctrl-0 = <0x23>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| twi@0x05002400 { | |
| compatible = "allwinner,sun8i-twi"; | |
| clocks = <0x28>; | |
| pinctrl-1 = <0x2a>; | |
| device_type = "twi1"; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x2a 0x04>; | |
| #size-cells = <0x00>; | |
| twi_drv_used = <0x01>; | |
| reg = <0x00 0x5002400 0x00 0x400>; | |
| clock-frequency = <0x61a80>; | |
| pinctrl-0 = <0x29>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| rtc@07000000 { | |
| compatible = "allwinner,sun8i-rtc\0allwinner,sunxi-rtc"; | |
| gpr_len = <0x08>; | |
| wakeup-source; | |
| auto_switch; | |
| device_type = "rtc"; | |
| interrupts = <0x00 0x69 0x04>; | |
| reg = <0x00 0x7000000 0x00 0x400>; | |
| gpr_offset = <0x100>; | |
| }; | |
| pwm3@0300a000 { | |
| compatible = "allwinner,sunxi-pwm3"; | |
| pinctrl-1 = <0x79>; | |
| status = "okay"; | |
| phandle = <0x6b>; | |
| pinctrl-0 = <0x78>; | |
| linux,phandle = <0x6b>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| watchdog@030090a0 { | |
| compatible = "allwinner,sun50i-wdt"; | |
| interrupts = <0x00 0x0e 0x04>; | |
| reg = <0x00 0x30090a0 0x00 0x20>; | |
| }; | |
| sound@1 { | |
| signal_inversion = <0x01>; | |
| compatible = "allwinner,sunxi-daudio0-machine"; | |
| sunxi,daudio-controller = <0x42>; | |
| daudio_master = <0x04>; | |
| device_type = "snddaudio0"; | |
| audio_format = <0x01>; | |
| status = "okay"; | |
| }; | |
| partitions { | |
| device_type = "partitions"; | |
| UDISK { | |
| device_type = "UDISK"; | |
| offset = <0x3d20>; | |
| size = <0x00>; | |
| }; | |
| mfg { | |
| device_type = "mfg"; | |
| offset = <0x3c20>; | |
| size = <0x80>; | |
| }; | |
| rootfs { | |
| device_type = "rootfs"; | |
| offset = <0xea0>; | |
| size = <0x900>; | |
| }; | |
| home { | |
| device_type = "home"; | |
| offset = <0x17a0>; | |
| size = <0x1a00>; | |
| }; | |
| env { | |
| device_type = "env"; | |
| offset = <0x3b20>; | |
| size = <0x100>; | |
| }; | |
| backup { | |
| device_type = "backup"; | |
| offset = <0x31a0>; | |
| size = <0x980>; | |
| }; | |
| conf { | |
| device_type = "conf"; | |
| offset = <0x3ca0>; | |
| size = <0x80>; | |
| }; | |
| boot { | |
| device_type = "boot"; | |
| offset = <0x20>; | |
| size = <0xe80>; | |
| }; | |
| }; | |
| cpu_budget_cool { | |
| state1 = <0x927c0 0x01>; | |
| compatible = "allwinner,budget_cooling"; | |
| device_type = "cpu_budget_cooling"; | |
| cluster_num = <0x01>; | |
| status = "okay"; | |
| state0 = <0x10d880 0x01>; | |
| phandle = <0x97>; | |
| state_cnt = <0x02>; | |
| #cooling-cells = <0x02>; | |
| linux,phandle = <0x97>; | |
| }; | |
| usbc0@0 { | |
| rndis_wceis = <0x01>; | |
| usb_drv_vbus_gpio; | |
| compatible = "allwinner,sunxi-otg-manager"; | |
| usb_wakeup_suspend = <0x00>; | |
| device_type = "usbc0"; | |
| usb_port_type = <0x02>; | |
| usb_host_init_state = <0x01>; | |
| usb_det_vbus_gpio; | |
| status = "okay"; | |
| usb_serial_unique = <0x00>; | |
| usb_id_gpio; | |
| usb_detect_mode = <0x00>; | |
| usb_luns = <0x03>; | |
| usb_regulator_io = "nocare"; | |
| usb_serial_number = "20080411"; | |
| usb_detect_type = <0x00>; | |
| }; | |
| dma-controller@03002000 { | |
| #dma-cells = <0x01>; | |
| compatible = "allwinner,sun8i-dma"; | |
| clocks = <0x11>; | |
| interrupts = <0x00 0x0a 0x04>; | |
| reg = <0x00 0x3002000 0x00 0x1000>; | |
| }; | |
| vdevice@0 { | |
| compatible = "allwinner,sun8i-vdevice"; | |
| device_type = "Vdevice"; | |
| status = "disabled"; | |
| interrupt-parent = <0x5d>; | |
| interrupts = <0x03 0x03 0x04>; | |
| pinctrl-0 = <0x92>; | |
| test-gpios = <0x5d 0x02 0x03 0x01 0x02 0x02 0x01>; | |
| pinctrl-names = "default"; | |
| }; | |
| spi@05010000 { | |
| compatible = "allwinner,sun50i-spi"; | |
| spi0_cs_bitmap = <0x03>; | |
| clocks = <0x04 0x44>; | |
| spi0_cs_number = <0x02>; | |
| pinctrl-1 = <0x47>; | |
| device_type = "spi0"; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x36 0x04>; | |
| #size-cells = <0x00>; | |
| reg = <0x00 0x5010000 0x00 0x1000>; | |
| clock-frequency = <0x11e1a300>; | |
| pinctrl-0 = <0x45 0x46>; | |
| pinctrl-names = "default\0sleep"; | |
| spi_board0 { | |
| compatible = "m25p80"; | |
| device_type = "spi_board0"; | |
| spi-rx-bus-width = <0x01>; | |
| reg = <0x00>; | |
| spi-tx-bus-width = <0x01>; | |
| spi-max-frequency = <0x2faf080>; | |
| }; | |
| }; | |
| pwm0@0300a000 { | |
| compatible = "allwinner,sunxi-pwm0"; | |
| pinctrl-1 = <0x73>; | |
| status = "okay"; | |
| phandle = <0x68>; | |
| pinctrl-0 = <0x72>; | |
| linux,phandle = <0x68>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| sdmmc@04022000 { | |
| sdc_tm4_sm1_freq1 = <0x00>; | |
| cap-mmc-highspeed; | |
| sdc_tm4_sm4_freq1 = <0x04>; | |
| compatible = "allwinner,sunxi-mmc-v4p5x"; | |
| clocks = <0x08 0x50 0x51 0x52 0x53>; | |
| cap-sd-highspeed; | |
| sdc_tm4_sm0_freq0 = <0x00>; | |
| pinctrl-1 = <0x56>; | |
| device_type = "sdc2"; | |
| sdc_tm4_sm3_freq0 = <0x5000000>; | |
| clock-names = "osc24m\0pll_periph\0mmc\0ahb\0rst"; | |
| sdc_tm4_sm2_freq1 = <0x00>; | |
| cap-wait-while-busy; | |
| status = "disable"; | |
| interrupts = <0x00 0x30 0x04>; | |
| sdc_tm4_sm1_freq0 = <0x00>; | |
| bus-width = <0x08>; | |
| sdc_tm4_sm4_freq0 = <0x50000>; | |
| mmc-high-capacity-erase-size; | |
| sdc_tm4_sm0_freq1 = <0x00>; | |
| sdc_tm4_sm3_freq1 = <0x05>; | |
| reg = <0x00 0x4022000 0x00 0x1000>; | |
| pinctrl-0 = <0x54 0x55>; | |
| sdc_tm4_sm2_freq0 = <0x00>; | |
| cap-erase; | |
| max-frequency = <0x2faf080>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| twi@0x05002c00 { | |
| compatible = "allwinner,sun8i-twi"; | |
| clocks = <0x2e>; | |
| pinctrl-1 = <0x30>; | |
| device_type = "twi3"; | |
| status = "disable"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x2c 0x04>; | |
| #size-cells = <0x00>; | |
| twi_drv_used = <0x01>; | |
| reg = <0x00 0x5002c00 0x00 0x400>; | |
| clock-frequency = <0x30d40>; | |
| pinctrl-0 = <0x2f>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| twi@0x07081400 { | |
| compatible = "allwinner,sun8i-twi"; | |
| clocks = <0x31>; | |
| pinctrl-1 = <0x33>; | |
| device_type = "twi4"; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x6b 0x04>; | |
| #size-cells = <0x00>; | |
| reg = <0x00 0x7081400 0x00 0x400>; | |
| clock-frequency = <0x30d40>; | |
| pinctrl-0 = <0x32>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| ve@01c0e000 { | |
| compatible = "allwinner,sunxi-cedar-ve"; | |
| clocks = <0x05 0x13>; | |
| interrupts = <0x00 0x19 0x04>; | |
| reg = <0x00 0x1c0e000 0x00 0x1000 0x00 0x3000000 0x00 0x10 0x00 0x3001000 0x00 0x800 0x00 0x7010000 0x00 0x300>; | |
| iommus = <0x14 0x03 0x01>; | |
| }; | |
| thermal-zones { | |
| ddr_thermal_zone { | |
| thermal-sensors = <0x9a 0x03>; | |
| polling-delay = <0x2710>; | |
| polling-delay-passive = <0x3e8>; | |
| trips { | |
| t0 { | |
| hysteresis = <0x00>; | |
| temperature = <0x1c138>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| cpu_thermal_zone { | |
| thermal-sensors = <0x95 0x00>; | |
| polling-delay = <0x3e8>; | |
| polling-delay-passive = <0x3e8>; | |
| trips { | |
| t2 { | |
| hysteresis = <0x00>; | |
| temperature = <0x1c138>; | |
| type = "critical"; | |
| }; | |
| t0 { | |
| hysteresis = <0x00>; | |
| temperature = <0x13880>; | |
| type = "passive"; | |
| phandle = <0x96>; | |
| linux,phandle = <0x96>; | |
| }; | |
| }; | |
| cooling-maps { | |
| bind0 { | |
| trip = <0x96>; | |
| contribution = <0x00>; | |
| cooling-device = <0x97 0x01 0x01>; | |
| }; | |
| }; | |
| }; | |
| isp_thermal_zone { | |
| thermal-sensors = <0x99 0x02>; | |
| polling-delay = <0x2710>; | |
| polling-delay-passive = <0x3e8>; | |
| trips { | |
| t0 { | |
| hysteresis = <0x00>; | |
| temperature = <0x1c138>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| ve_thermal_zone { | |
| thermal-sensors = <0x98 0x01>; | |
| polling-delay = <0x2710>; | |
| polling-delay-passive = <0x3e8>; | |
| trips { | |
| t0 { | |
| hysteresis = <0x00>; | |
| temperature = <0x1c138>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| nmi@0x01f00c00 { | |
| compatible = "allwinner,sunxi-nmi"; | |
| nmi_irq_en = <0x40>; | |
| nmi_irq_ctrl = <0x0c>; | |
| nmi_irq_mask = <0x50>; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| nmi_irq_status = <0x10>; | |
| reg = <0x00 0x1f00c00 0x00 0x50>; | |
| }; | |
| power_sply { | |
| dcdc1_vol = <0xbb8>; | |
| dcdc5_vol = <0x5dc>; | |
| device_type = "power_sply"; | |
| aldo2_vol = <0x708>; | |
| dcdc2_vol = <0x4b0>; | |
| aldo3_vol = <0xbb8>; | |
| dcdc3_vol = <0x4b0>; | |
| dcdc4_vol = <0x4b0>; | |
| }; | |
| tr@01000000 { | |
| compatible = "allwinner,sun50i-tr"; | |
| clocks = <0x0a>; | |
| status = "okay"; | |
| interrupts = <0x00 0x60 0x04>; | |
| reg = <0x00 0x1000000 0x00 0x200bc>; | |
| }; | |
| twi@0x05002000 { | |
| compatible = "allwinner,sun8i-twi"; | |
| clocks = <0x25>; | |
| pinctrl-1 = <0x27>; | |
| device_type = "twi0"; | |
| status = "disable"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x29 0x04>; | |
| #size-cells = <0x00>; | |
| twi_drv_used = <0x01>; | |
| reg = <0x00 0x5002000 0x00 0x400>; | |
| clock-frequency = <0x61a80>; | |
| pinctrl-0 = <0x26>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| ce@1904000 { | |
| compatible = "allwinner,sunxi-ce"; | |
| clocks = <0x93 0x0d>; | |
| interrupts = <0x00 0x23 0x01 0x00 0x24 0x01>; | |
| device_name = "ce"; | |
| reg = <0x00 0x1904000 0x00 0xa0 0x00 0x1904800 0x00 0xa0>; | |
| clock-frequency = <0x11e1a300>; | |
| }; | |
| uart_para { | |
| device_type = "uart_para"; | |
| uart_debug_port = <0x00>; | |
| pinctrl-0 = <0xab>; | |
| }; | |
| pwm7@0300a000 { | |
| compatible = "allwinner,sunxi-pwm7"; | |
| pinctrl-1 = <0x81>; | |
| status = "okay"; | |
| phandle = <0x6f>; | |
| pinctrl-0 = <0x80>; | |
| linux,phandle = <0x6f>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| ise@01c10000 { | |
| compatible = "allwinner,sunxi-ise"; | |
| interrupts = <0x00 0x18 0x04>; | |
| reg = <0x00 0x1c10000 0x00 0x1000 0x00 0x3001000 0x00 0x800>; | |
| }; | |
| daudio@0x05090000 { | |
| rate_max = <0x2ee00>; | |
| pcm_lrck_period = <0x80>; | |
| compatible = "allwinner,sunxi-daudio"; | |
| clocks = <0x02 0x3a>; | |
| mclk_div = <0x00>; | |
| period_bytes_max = <0x10000>; | |
| rx_data_mode = <0x00>; | |
| pinctrl-1 = <0x3c>; | |
| device_type = "daudio0"; | |
| sign_extend = <0x00>; | |
| buffer_bytes_max = <0x20000>; | |
| fifo_size = <0x80>; | |
| tdm_config = <0x01>; | |
| slot_width_select = <0x20>; | |
| status = "okay"; | |
| periods_max = <0x08>; | |
| msb_lsb_first = <0x00>; | |
| frametype = <0x00>; | |
| tx_data_mode = <0x00>; | |
| phandle = <0x42>; | |
| channels_max = <0x08>; | |
| reg = <0x00 0x5090000 0x00 0x7c>; | |
| pinctrl-0 = <0x3b>; | |
| linux,phandle = <0x42>; | |
| tdm_num = <0x00>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| thermal_sensor { | |
| compatible = "allwinner,thermal_sensor"; | |
| clocks = <0x08 0x94>; | |
| combine_num = <0x04>; | |
| shut_temp = <0x1c138>; | |
| status = "okay"; | |
| interrupts = <0x00 0x01 0x00>; | |
| reg = <0x00 0x5070400 0x00 0x400>; | |
| sensor_num = <0x04>; | |
| ths_combine2 { | |
| compatible = "allwinner,ths_combine"; | |
| #thermal-sensor-cells = <0x01>; | |
| combine_sensor_type = "ISP"; | |
| combine_sensor_id = <0x02>; | |
| combine_sensor_num = <0x01>; | |
| phandle = <0x99>; | |
| combine_sensor_temp_type = "max"; | |
| linux,phandle = <0x99>; | |
| }; | |
| ths_combine0 { | |
| compatible = "allwinner,ths_combine"; | |
| #thermal-sensor-cells = <0x01>; | |
| combine_sensor_type = "CPU"; | |
| combine_sensor_id = <0x00>; | |
| combine_sensor_num = <0x01>; | |
| phandle = <0x95>; | |
| combine_sensor_temp_type = "max"; | |
| linux,phandle = <0x95>; | |
| }; | |
| ths_combine3 { | |
| compatible = "allwinner,ths_combine"; | |
| #thermal-sensor-cells = <0x01>; | |
| combine_sensor_type = "DDR"; | |
| combine_sensor_id = <0x03>; | |
| combine_sensor_num = <0x01>; | |
| phandle = <0x9a>; | |
| combine_sensor_temp_type = "max"; | |
| linux,phandle = <0x9a>; | |
| }; | |
| ths_combine1 { | |
| compatible = "allwinner,ths_combine"; | |
| #thermal-sensor-cells = <0x01>; | |
| combine_sensor_type = "VE"; | |
| combine_sensor_id = <0x01>; | |
| combine_sensor_num = <0x01>; | |
| phandle = <0x98>; | |
| combine_sensor_temp_type = "max"; | |
| linux,phandle = <0x98>; | |
| }; | |
| }; | |
| pwm4@0300a000 { | |
| compatible = "allwinner,sunxi-pwm4"; | |
| pinctrl-1 = <0x7b>; | |
| status = "okay"; | |
| phandle = <0x6c>; | |
| pinctrl-0 = <0x7a>; | |
| linux,phandle = <0x6c>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| twi_para { | |
| device_type = "twi_para"; | |
| twi_port = <0x00>; | |
| pinctrl-0 = <0xaa>; | |
| }; | |
| pm_para { | |
| device_type = "pm_para"; | |
| standby_mode = <0x01>; | |
| }; | |
| jtag_para { | |
| jtag_enable = <0x01>; | |
| device_type = "jtag_para"; | |
| pinctrl-0 = <0xac>; | |
| }; | |
| boot_disp { | |
| compatible = "allwinner,boot_disp"; | |
| }; | |
| card_boot { | |
| sprite_gpio0 = <0x5d 0x04 0x11 0x01 0xffffffff 0xffffffff 0xffffffff>; | |
| device_type = "card_boot"; | |
| logical_start = <0xa000>; | |
| }; | |
| ohci0-controller@0x05101400 { | |
| compatible = "allwinner,sunxi-ohci0"; | |
| clocks = <0x34 0x37 0x38 0x39 0x08 0x12>; | |
| hci_ctrl_no = <0x00>; | |
| status = "okay"; | |
| interrupts = <0x00 0x42 0x04>; | |
| reg = <0x00 0x5101000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x5100000 0x00 0x1000>; | |
| }; | |
| pwm1@0300a000 { | |
| compatible = "allwinner,sunxi-pwm1"; | |
| pinctrl-1 = <0x75>; | |
| status = "okay"; | |
| phandle = <0x69>; | |
| pinctrl-0 = <0x74>; | |
| linux,phandle = <0x69>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| spi@05012000 { | |
| compatible = "allwinner,sun50i-spi"; | |
| clocks = <0x04 0x4c>; | |
| pinctrl-1 = <0x4f>; | |
| device_type = "spi2"; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x38 0x04>; | |
| #size-cells = <0x00>; | |
| reg = <0x00 0x5012000 0x00 0x1000>; | |
| clock-frequency = <0xbebc200>; | |
| pinctrl-0 = <0x4d 0x4e>; | |
| spi2_cs_bitmap = <0x01>; | |
| spi2_cs_number = <0x01>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| sdmmc@04021000 { | |
| cap-mmc-highspeed; | |
| compatible = "allwinner,sunxi-mmc-v4p1x"; | |
| clocks = <0x08 0x50 0x5e 0x5f 0x60>; | |
| cap-sd-highspeed; | |
| sunxi-dly-208M = <0x01 0x00 0x00 0x00 0x01>; | |
| pinctrl-1 = <0x62>; | |
| device_type = "sdc1"; | |
| cap-sdio-irq; | |
| clock-names = "osc24m\0pll_periph\0mmc\0ahb\0rst"; | |
| cap-wait-while-busy; | |
| keep-power-in-suspend; | |
| status = "okay"; | |
| interrupts = <0x00 0x2f 0x04>; | |
| bus-width = <0x04>; | |
| sunxi-dly-104M = <0x01 0x00 0x00 0x00 0x01>; | |
| reg = <0x00 0x4021000 0x00 0x1000>; | |
| pinctrl-0 = <0x61>; | |
| sunxi-dly-52M-ddr4 = <0x01 0x00 0x00 0x00 0x02>; | |
| ignore-pm-notify; | |
| max-frequency = <0x2faf080>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| uart@05000800 { | |
| compatible = "allwinner,sun8i-uart"; | |
| clocks = <0x1c>; | |
| pinctrl-1 = <0x1e>; | |
| device_type = "uart2"; | |
| uart2_port = <0x02>; | |
| status = "disabled"; | |
| interrupts = <0x00 0x33 0x04>; | |
| uart2_type = <0x04>; | |
| reg = <0x00 0x5000800 0x00 0x400>; | |
| pinctrl-0 = <0x1d>; | |
| pinctrl-names = "default\0sleep"; | |
| }; | |
| sound@2 { | |
| signal_inversion = <0x01>; | |
| compatible = "allwinner,sunxi-daudio1-machine"; | |
| sunxi,daudio-controller = <0x43>; | |
| daudio_master = <0x04>; | |
| device_type = "snddaudio1"; | |
| audio_format = <0x01>; | |
| status = "disabled"; | |
| }; | |
| timer@03009000 { | |
| compatible = "allwinner,sun4i-a10-timer"; | |
| clocks = <0x08 0x12>; | |
| device_type = "soc_timer"; | |
| interrupts = <0x00 0x3c 0x04>; | |
| reg = <0x00 0x3009000 0x00 0x90>; | |
| }; | |
| eise@0x02300000 { | |
| compatible = "allwinner,sunxi-eise"; | |
| clocks = <0x05 0x15>; | |
| interrupts = <0x00 0x1a 0x04>; | |
| reg = <0x00 0x2300000 0x00 0x1000 0x00 0x3001000 0x00 0x800>; | |
| iommus = <0x14 0x01 0x01>; | |
| }; | |
| target { | |
| storage_type = <0x03>; | |
| device_type = "target"; | |
| boot_clock = <0x330>; | |
| }; | |
| pwm8@0300a000 { | |
| compatible = "allwinner,sunxi-pwm8"; | |
| pinctrl-1 = <0x83>; | |
| status = "okay"; | |
| phandle = <0x70>; | |
| pinctrl-0 = <0x82>; | |
| linux,phandle = <0x70>; | |
| reg_base = <0x300a000>; | |
| pinctrl-names = "active\0sleep"; | |
| }; | |
| eth@05020000 { | |
| phy-rst = <0x5d 0x03 0x13 0x01 0x01 0x01 0x00>; | |
| compatible = "allwinner,sunxi-gmac"; | |
| clocks = <0x9c 0x9d>; | |
| pinctrl-1 = <0x9f>; | |
| gmac-power2; | |
| clock-names = "gmac\0ephy"; | |
| use_ephy25m = <0x01>; | |
| gmac-power0; | |
| status = "okay"; | |
| interrupts = <0x00 0x1b 0x04>; | |
| tx-delay = <0x07>; | |
| reg = <0x00 0x5020000 0x00 0xffff 0x00 0x3000030 0x00 0x04>; | |
| phy-mode = "rmii"; | |
| pinctrl-0 = <0x9e>; | |
| gmac-power1; | |
| interrupt-names = "gmacirq"; | |
| pinctrl-names = "default\0sleep"; | |
| rx-delay = <0x1f>; | |
| }; | |
| }; | |
| sunxi-chipid@03006200 { | |
| compatible = "allwinner,sunxi-chipid"; | |
| device_type = "chipid"; | |
| reg = <0x00 0x3006200 0x00 0xc0>; | |
| }; | |
| prcm { | |
| compatible = "allwinner,prcm"; | |
| reg = <0x00 0x1f01400 0x00 0x400>; | |
| }; | |
| ion { | |
| compatible = "allwinner,sunxi-ion"; | |
| heap_sys_contig@0 { | |
| compatible = "allwinner,sys_contig"; | |
| heap-name = "sys_contig"; | |
| heap-id = <0x01>; | |
| heap-base = <0x00>; | |
| heap-type = "ion_contig"; | |
| heap-size = <0x00>; | |
| }; | |
| heap_cma@0 { | |
| compatible = "allwinner,cma"; | |
| heap-name = "cma"; | |
| heap-id = <0x04>; | |
| heap-base = <0x00>; | |
| heap-type = "ion_cma"; | |
| heap-size = <0x00>; | |
| }; | |
| heap_sys_user@0 { | |
| compatible = "allwinner,sys_user"; | |
| heap-name = "sys_user"; | |
| heap-id = <0x00>; | |
| heap-base = <0x00>; | |
| heap-type = "ion_system"; | |
| heap-size = <0x00>; | |
| }; | |
| }; | |
| ramoops@0x48106000 { | |
| compatible = "ramoops"; | |
| record-size = <0x20000>; | |
| pmsg-size = <0x20000>; | |
| console-size = <0x20000>; | |
| reg = <0x00 0x48106000 0x00 0x60000>; | |
| }; | |
| dramfreq { | |
| compatible = "allwinner,sunxi-dramfreq"; | |
| status = "okay"; | |
| interrupts = <0x00 0x45 0x04>; | |
| reg = <0x00 0x1c62000 0x00 0x1000 0x00 0x1c63000 0x00 0x1000 0x00 0x1c20000 0x00 0x800>; | |
| }; | |
| sram_ctrl { | |
| compatible = "allwinner,sram_ctrl"; | |
| device_type = "sram_ctrl"; | |
| reg = <0x00 0x3000000 0x00 0x100>; | |
| }; | |
| sunxi-sid@03006000 { | |
| compatible = "allwinner,sunxi-sid"; | |
| device_type = "sid"; | |
| reg = <0x00 0x3006000 0x00 0x200>; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| interrupt-parent = <0xa5>; | |
| interrupts = <0x01 0x0d 0x308 0x01 0x0e 0x308 0x01 0x0b 0x308 0x01 0x0a 0x308>; | |
| arm,cpu-registers-not-fw-configured; | |
| clock-frequency = <0x16e3600>; | |
| }; | |
| wlan { | |
| compatible = "allwinner,sunxi-wlan"; | |
| clocks = <0xa7>; | |
| wlan_usbnum = <0x03>; | |
| wlan_busnum = <0x01>; | |
| status = "okay"; | |
| wakeup_source = <0x00>; | |
| }; | |
| cpuscfg { | |
| compatible = "allwinner,cpuscfg"; | |
| reg = <0x00 0x1f01c00 0x00 0x400>; | |
| }; | |
| mbus-controller@047FA000 { | |
| compatible = "allwinner,sun8i-mbus"; | |
| #mbus-cells = <0x01>; | |
| reg = <0x00 0x4002000 0x00 0x1000>; | |
| }; | |
| iommu@030f0000 { | |
| compatible = "allwinner,sunxi-iommu"; | |
| clocks = <0xa6>; | |
| #iommu-cells = <0x02>; | |
| clock-names = "iommu"; | |
| status = "okay"; | |
| interrupts = <0x00 0x5f 0x04>; | |
| phandle = <0x14>; | |
| reg = <0x00 0x30f0000 0x00 0x1000>; | |
| linux,phandle = <0x14>; | |
| interrupt-names = "iommu-irq"; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a7-pmu"; | |
| interrupts = <0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04>; | |
| }; | |
| cpus { | |
| enable-method = "allwinner,sun8iw19p1"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| idle-states { | |
| entry-method = "arm,psci"; | |
| cpu-sleep-0 { | |
| compatible = "arm,idle-state"; | |
| arm,psci-suspend-param = <0x10000>; | |
| phandle = <0xa2>; | |
| exit-latency-us = <0x5a>; | |
| entry-latency-us = <0x2d>; | |
| local-timer-stop; | |
| linux,phandle = <0xa2>; | |
| min-residency-us = <0xbb8>; | |
| }; | |
| sys-sleep-0 { | |
| compatible = "arm,idle-state"; | |
| arm,psci-suspend-param = <0x2010000>; | |
| phandle = <0xa4>; | |
| exit-latency-us = <0xffffffff>; | |
| entry-latency-us = <0xffffffff>; | |
| local-timer-stop; | |
| linux,phandle = <0xa4>; | |
| min-residency-us = <0xffffffff>; | |
| }; | |
| cluster-sleep-0 { | |
| compatible = "arm,idle-state"; | |
| arm,psci-suspend-param = <0x1010000>; | |
| phandle = <0xa3>; | |
| exit-latency-us = <0x23a>; | |
| entry-latency-us = <0x37>; | |
| local-timer-stop; | |
| linux,phandle = <0xa3>; | |
| min-residency-us = <0x4268>; | |
| }; | |
| }; | |
| cpu@0 { | |
| compatible = "arm,cortex-a7"; | |
| clocks = <0xa0>; | |
| cpu-idle-states = <0xa2 0xa3 0xa4>; | |
| cooling-min-level = <0x05>; | |
| device_type = "cpu"; | |
| enable-method = "psci"; | |
| operating-points-v2 = <0xa1>; | |
| dynamic-power-coefficient = <0x96>; | |
| reg = <0x00>; | |
| clock-frequency = <0x3c14dc00>; | |
| clock-latency = <0x1e8480>; | |
| cooling-max-level = <0x00>; | |
| #cooling-cells = <0x02>; | |
| }; | |
| }; | |
| s_brom { | |
| compatible = "allwinner,s-brom"; | |
| reg = <0x00 0x00 0x00 0x10000>; | |
| }; | |
| dram { | |
| dram_mr2 = <0x00>; | |
| dram_tpr7 = <0x1621121e>; | |
| compatible = "allwinner,dram"; | |
| clocks = <0x07>; | |
| dram_zq = <0xbf9>; | |
| dram_mr0 = <0xe73>; | |
| dram_tpr13 = <0x34000903>; | |
| dram_tpr5 = <0x48484848>; | |
| dram_tpr11 = <0x120000>; | |
| device_type = "dram"; | |
| dram_tpr3 = <0xb4787896>; | |
| clock-names = "pll_ddr0"; | |
| dram_tpr1 = <0x131a10c>; | |
| dram_type = <0x02>; | |
| dram_mr3 = <0x00>; | |
| dram_tpr8 = <0x00>; | |
| dram_para1 = <0xd2>; | |
| dram_mr1 = <0x02>; | |
| dram_tpr6 = <0x48>; | |
| dram_tpr12 = <0x23>; | |
| dram_tpr4 = <0x00>; | |
| dram_clk = <0x210>; | |
| dram_tpr10 = <0x00>; | |
| dram_tpr2 = <0x57041>; | |
| dram_odt_en = <0x00>; | |
| dram_tpr0 = <0x471992>; | |
| dram_tpr9 = <0x00>; | |
| dram_para2 = <0x400000>; | |
| }; | |
| cpucfg@09010000 { | |
| compatible = "allwinner,sunxi-cpucfg"; | |
| reg = <0x00 0x9010000 0x00 0xc8>; | |
| }; | |
| }; |
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