Saving registers on Aarch64 in a core-dump-ready format

saveregister.S

.macro saveregister
    // Registers are saved in the following order (see also: user_regs_struct):
    //       x0    x1  ... x28   x29   x30   SP   PC  PSTATE
    // at: -110  -108  ... -30   -28   -20  -18  -10     -08 (hex) with respect to SP-at-entry

    // Start by saving these:
    //   [sp, #-0x40] <== x26; x27
    //   [sp, #-0x30] <== x28; x29
    stp x26, x27, [sp, #-0x40]
    stp x28, x29, [sp, #-0x30]

    // Now that x26 through x29 are backed up, we can use them to save original x30, SP, PC (ELR) and PSTATE (SPSR):
    //   [sp, #-0x20] <== x26 i.e. x30; x27 i.e. SP
    //   [sp, #-0x10] <== x28 i.e. ELR; x29 i.e. SPSR
    mov x26, x30
    mov x27, sp
    mrs x28, ELR_EL3
    mrs x29, SPSR_EL3

    stp x26, x27, [sp, #-0x20]
    stp x28, x29, [sp, #-0x10]

    // Adjust SP and push the rest of the GPRs (last-to-first)
    sub sp, sp, #0x40
    stp x24, x25, [sp, #-0x10]!
    stp x22, x23, [sp, #-0x10]!
    stp x20, x21, [sp, #-0x10]!
    stp x18, x19, [sp, #-0x10]!
    stp x16, x17, [sp, #-0x10]!
    stp x14, x15, [sp, #-0x10]!
    stp x12, x13, [sp, #-0x10]!
    stp x10, x11, [sp, #-0x10]!
    stp x8, x9, [sp, #-0x10]!
    stp x6, x7, [sp, #-0x10]!
    stp x4, x5, [sp, #-0x10]!
    stp x2, x3, [sp, #-0x10]!
    stp x0, x1, [sp, #-0x10]!
.endm