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marcosnils/ring-armv6.patch

Last active May 21, 2024 04:05
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ring armv6 patch
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ring-armv6.patch
diff --git a/crypto/chacha/asm/chacha-armv4.pl b/crypto/chacha/asm/chacha-armv4.pl
index 0b1592d6b..9af11605e 100755
--- a/crypto/chacha/asm/chacha-armv4.pl
+++ b/crypto/chacha/asm/chacha-armv4.pl
@@ -175,7 +175,9 @@ $code.=<<___;
@ Silence ARMv8 deprecated IT instruction warnings. This file is used by both
@ ARMv7 and ARMv8 processors and does not use ARMv8 instructions.
+#if __ARM_MAX_ARCH__>=7
.arch armv7-a
+#endif
.text
#if defined(__thumb2__) || defined(__clang__)
diff --git a/crypto/fipsmodule/bn/asm/armv4-mont.pl b/crypto/fipsmodule/bn/asm/armv4-mont.pl
index c145f857d..aab799ce4 100644
--- a/crypto/fipsmodule/bn/asm/armv4-mont.pl
+++ b/crypto/fipsmodule/bn/asm/armv4-mont.pl
@@ -101,7 +101,9 @@ $code=<<___;
@ Silence ARMv8 deprecated IT instruction warnings. This file is used by both
@ ARMv7 and ARMv8 processors and does not use ARMv8 instructions.
+#if __ARM_MAX_ARCH__>=7
.arch armv7-a
+#endif
.text
#if defined(__thumb2__)
diff --git a/crypto/fipsmodule/modes/asm/ghash-armv4.pl b/crypto/fipsmodule/modes/asm/ghash-armv4.pl
index 8e2a11f62..8ea6c6486 100644
--- a/crypto/fipsmodule/modes/asm/ghash-armv4.pl
+++ b/crypto/fipsmodule/modes/asm/ghash-armv4.pl
@@ -109,7 +109,9 @@ $code=<<___;
@ Silence ARMv8 deprecated IT instruction warnings. This file is used by both
@ ARMv7 and ARMv8 processors and does not use ARMv8 instructions. (ARMv8 PMULL
@ instructions are in aesv8-armx.pl.)
+#if __ARM_MAX_ARCH__>=7
.arch armv7-a
+#endif
.text
#if defined(__thumb2__) || defined(__clang__)
diff --git a/crypto/fipsmodule/sha/asm/sha256-armv4.pl b/crypto/fipsmodule/sha/asm/sha256-armv4.pl
index 82ed50219..843341b27 100644
--- a/crypto/fipsmodule/sha/asm/sha256-armv4.pl
+++ b/crypto/fipsmodule/sha/asm/sha256-armv4.pl
@@ -186,7 +186,9 @@ $code=<<___;
@ Silence ARMv8 deprecated IT instruction warnings. This file is used by both
@ ARMv7 and ARMv8 processors. It does have ARMv8-only code, but those
@ instructions are manually-encoded. (See unsha256.)
+#if __ARM_MAX_ARCH__>=7
.arch armv7-a
+#endif
.text
#if defined(__thumb2__)
diff --git a/crypto/fipsmodule/sha/asm/sha512-armv4.pl b/crypto/fipsmodule/sha/asm/sha512-armv4.pl
index 1f4ec286e..4b09b7acb 100644
--- a/crypto/fipsmodule/sha/asm/sha512-armv4.pl
+++ b/crypto/fipsmodule/sha/asm/sha512-armv4.pl
@@ -212,7 +212,9 @@ $code=<<___;
@ Silence ARMv8 deprecated IT instruction warnings. This file is used by both
@ ARMv7 and ARMv8 processors and does not use ARMv8 instructions.
+#if __ARM_MAX_ARCH__>=7
.arch armv7-a
+#endif
#ifdef __ARMEL__
# define LO 0
diff --git a/include/ring-core/arm_arch.h b/include/ring-core/arm_arch.h
index 2fc0fc042..240f226af 100644
--- a/include/ring-core/arm_arch.h
+++ b/include/ring-core/arm_arch.h
@@ -90,7 +90,7 @@
// Even when building for 32-bit ARM, support for aarch64 crypto instructions
// will be included.
-#define __ARM_MAX_ARCH__ 8
+#define __ARM_MAX_ARCH__ 6
#endif // __ASSEMBLER__
diff --git a/include/ring-core/asm_base.h b/include/ring-core/asm_base.h
index 1d8cf5fb8..9761cd7de 100644
--- a/include/ring-core/asm_base.h
+++ b/include/ring-core/asm_base.h
@@ -81,7 +81,7 @@
// Even when building for 32-bit ARM, support for aarch64 crypto instructions
// will be included.
-#define __ARM_MAX_ARCH__ 8
+#define __ARM_MAX_ARCH__ 6
// Support macros for
// - Armv8.3-A Pointer Authentication and
diff --git a/src/aead/aes.rs b/src/aead/aes.rs
index 18f6ab80a..81c5a4fb3 100644
--- a/src/aead/aes.rs
+++ b/src/aead/aes.rs
@@ -145,26 +145,25 @@ impl Key {
};
match detect_implementation(cpu_features) {
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::HWAES => {
- set_encrypt_key!(aes_hw_set_encrypt_key, bytes, key_bits, &mut key)?
- }
-
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::VPAES_BSAES => {
- set_encrypt_key!(vpaes_set_encrypt_key, bytes, key_bits, &mut key)?
- }
-
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::HWAES => {
+ //set_encrypt_key!(aes_hw_set_encrypt_key, bytes, key_bits, &mut key)?
+ //}
+
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::VPAES_BSAES => {
+ //set_encrypt_key!(vpaes_set_encrypt_key, bytes, key_bits, &mut key)?
+ //}
Implementation::NOHW => {
set_encrypt_key!(aes_nohw_set_encrypt_key, bytes, key_bits, &mut key)?
}
@@ -176,22 +175,21 @@ impl Key {
#[inline]
pub fn encrypt_block(&self, a: Block, cpu_features: cpu::Features) -> Block {
match detect_implementation(cpu_features) {
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::HWAES => encrypt_block!(aes_hw_encrypt, a, self),
-
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::VPAES_BSAES => encrypt_block!(vpaes_encrypt, a, self),
-
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::HWAES => encrypt_block!(aes_hw_encrypt, a, self),
+
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::VPAES_BSAES => encrypt_block!(vpaes_encrypt, a, self),
Implementation::NOHW => encrypt_block!(aes_nohw_encrypt, a, self),
}
}
@@ -215,61 +213,60 @@ impl Key {
assert_eq!(in_out_len % BLOCK_LEN, 0);
match detect_implementation(cpu_features) {
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::HWAES => {
- ctr32_encrypt_blocks!(aes_hw_ctr32_encrypt_blocks, in_out, src, &self.inner, ctr)
- }
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm", target_arch = "x86_64"))]
- Implementation::VPAES_BSAES => {
- // 8 blocks is the cut-off point where it's faster to use BSAES.
- #[cfg(target_arch = "arm")]
- let in_out = if in_out_len >= 8 * BLOCK_LEN {
- let remainder = in_out_len % (8 * BLOCK_LEN);
- let bsaes_in_out_len = if remainder < (4 * BLOCK_LEN) {
- in_out_len - remainder
- } else {
- in_out_len
- };
-
- let mut bsaes_key = AES_KEY {
- rd_key: [0u32; 4 * (MAX_ROUNDS + 1)],
- rounds: 0,
- };
- prefixed_extern! {
- fn vpaes_encrypt_key_to_bsaes(bsaes_key: &mut AES_KEY, vpaes_key: &AES_KEY);
- }
- unsafe {
- vpaes_encrypt_key_to_bsaes(&mut bsaes_key, &self.inner);
- }
- ctr32_encrypt_blocks!(
- bsaes_ctr32_encrypt_blocks,
- &mut in_out[..(src.start + bsaes_in_out_len)],
- src.clone(),
- &bsaes_key,
- ctr
- );
-
- &mut in_out[bsaes_in_out_len..]
- } else {
- in_out
- };
-
- ctr32_encrypt_blocks!(vpaes_ctr32_encrypt_blocks, in_out, src, &self.inner, ctr)
- }
-
- #[cfg(target_arch = "x86")]
- Implementation::VPAES_BSAES => {
- super::shift::shift_full_blocks(in_out, src, |input| {
- self.encrypt_iv_xor_block(ctr.increment(), Block::from(input), cpu_features)
- });
- }
-
+ /* #[cfg(any(*/
+ /*target_arch = "aarch64",*/
+ /*target_arch = "arm",*/
+ /*target_arch = "x86_64",*/
+ /*target_arch = "x86"*/
+ /*))]*/
+ /*Implementation::HWAES => {*/
+ /*ctr32_encrypt_blocks!(aes_hw_ctr32_encrypt_blocks, in_out, src, &self.inner, ctr)*/
+ /*}*/
+
+ /*#[cfg(any(target_arch = "aarch64", target_arch = "arm", target_arch = "x86_64"))]*/
+ /*Implementation::VPAES_BSAES => {*/
+ /*// 8 blocks is the cut-off point where it's faster to use BSAES.*/
+ /*#[cfg(target_arch = "arm")]*/
+ /*let in_out = if in_out_len >= 8 * BLOCK_LEN {*/
+ /*let remainder = in_out_len % (8 * BLOCK_LEN);*/
+ /*let bsaes_in_out_len = if remainder < (4 * BLOCK_LEN) {*/
+ /*in_out_len - remainder*/
+ /*} else {*/
+ /*in_out_len*/
+ /*};*/
+
+ /*let mut bsaes_key = AES_KEY {*/
+ /*rd_key: [0u32; 4 * (MAX_ROUNDS + 1)],*/
+ /*rounds: 0,*/
+ /*};*/
+ /*prefixed_extern! {*/
+ /*fn vpaes_encrypt_key_to_bsaes(bsaes_key: &mut AES_KEY, vpaes_key: &AES_KEY);*/
+ /*}*/
+ /*unsafe {*/
+ /*vpaes_encrypt_key_to_bsaes(&mut bsaes_key, &self.inner);*/
+ /*}*/
+ /*ctr32_encrypt_blocks!(*/
+ /*bsaes_ctr32_encrypt_blocks,*/
+ /*&mut in_out[..(src.start + bsaes_in_out_len)],*/
+ /*src.clone(),*/
+ /*&bsaes_key,*/
+ /*ctr*/
+ /*);*/
+
+ /*&mut in_out[bsaes_in_out_len..]*/
+ /*} else {*/
+ /*in_out*/
+ /*};*/
+
+ /*ctr32_encrypt_blocks!(vpaes_ctr32_encrypt_blocks, in_out, src, &self.inner, ctr)*/
+ /*}*/
+
+ /*#[cfg(target_arch = "x86")]*/
+ /*Implementation::VPAES_BSAES => {*/
+ /*super::shift::shift_full_blocks(in_out, src, |input| {*/
+ /*self.encrypt_iv_xor_block(ctr.increment(), Block::from(input), cpu_features)*/
+ /*});*/
+ /* }*/
Implementation::NOHW => {
ctr32_encrypt_blocks!(aes_nohw_ctr32_encrypt_blocks, in_out, src, &self.inner, ctr)
}
@@ -287,8 +284,9 @@ impl Key {
#[cfg(any(target_arch = "x86_64", target_arch = "aarch64"))]
#[must_use]
- pub fn is_aes_hw(&self, cpu_features: cpu::Features) -> bool {
- matches!(detect_implementation(cpu_features), Implementation::HWAES)
+ pub fn is_aes_hw(&self, _cpu_features: cpu::Features) -> bool {
+ //matches!(detect_implementation(cpu_features), Implementation::HWAES)
+ false
}
#[cfg(any(target_arch = "x86_64", target_arch = "aarch64"))]
@@ -367,7 +365,7 @@ pub enum Implementation {
target_arch = "x86_64",
target_arch = "x86"
))]
- HWAES = 1,
+ //HWAES = 1,
// On "arm" only, this indicates that the bsaes implementation may be used.
#[cfg(any(
@@ -376,12 +374,11 @@ pub enum Implementation {
target_arch = "x86_64",
target_arch = "x86"
))]
- VPAES_BSAES = 2,
-
+ //VPAES_BSAES = 2,
NOHW = 3,
}
-fn detect_implementation(cpu_features: cpu::Features) -> Implementation {
+fn detect_implementation(_cpu_features: cpu::Features) -> Implementation {
// `cpu_features` is only used for specific platforms.
#[cfg(not(any(
target_arch = "aarch64",
@@ -391,33 +388,33 @@ fn detect_implementation(cpu_features: cpu::Features) -> Implementation {
)))]
let _cpu_features = cpu_features;
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- {
- if cpu::arm::AES.available(cpu_features) {
- return Implementation::HWAES;
- }
- }
-
- #[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
- {
- if cpu::intel::AES.available(cpu_features) {
- return Implementation::HWAES;
- }
- }
-
- #[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
- {
- if cpu::intel::SSSE3.available(cpu_features) {
- return Implementation::VPAES_BSAES;
- }
- }
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- {
- if cpu::arm::NEON.available(cpu_features) {
- return Implementation::VPAES_BSAES;
- }
- }
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //{
+ //if cpu::arm::AES.available(cpu_features) {
+ //return Implementation::HWAES;
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
+ //{
+ //if cpu::intel::AES.available(cpu_features) {
+ //return Implementation::HWAES;
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
+ //{
+ //if cpu::intel::SSSE3.available(cpu_features) {
+ //return Implementation::VPAES_BSAES;
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //{
+ //if cpu::arm::NEON.available(cpu_features) {
+ //return Implementation::VPAES_BSAES;
+ //}
+ //}
{
Implementation::NOHW
diff --git a/src/aead/gcm.rs b/src/aead/gcm.rs
index 7bd144428..2a2ca29d8 100644
--- a/src/aead/gcm.rs
+++ b/src/aead/gcm.rs
@@ -43,41 +43,40 @@ impl Key {
let h_table = &mut key.h_table;
match detect_implementation(cpu_features) {
- #[cfg(target_arch = "x86_64")]
- Implementation::CLMUL if has_avx_movbe(cpu_features) => {
- prefixed_extern! {
- fn gcm_init_avx(HTable: &mut HTable, h: &[u64; 2]);
- }
- unsafe {
- gcm_init_avx(h_table, &h);
- }
- }
-
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::CLMUL => {
- prefixed_extern! {
- fn gcm_init_clmul(Htable: &mut HTable, h: &[u64; 2]);
- }
- unsafe {
- gcm_init_clmul(h_table, &h);
- }
- }
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- Implementation::NEON => {
- prefixed_extern! {
- fn gcm_init_neon(Htable: &mut HTable, h: &[u64; 2]);
- }
- unsafe {
- gcm_init_neon(h_table, &h);
- }
- }
-
+ //#[cfg(target_arch = "x86_64")]
+ //Implementation::CLMUL if has_avx_movbe(cpu_features) => {
+ //prefixed_extern! {
+ //fn gcm_init_avx(HTable: &mut HTable, h: &[u64; 2]);
+ //}
+ //unsafe {
+ //gcm_init_avx(h_table, &h);
+ //}
+ //}
+
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::CLMUL => {
+ //prefixed_extern! {
+ //fn gcm_init_clmul(Htable: &mut HTable, h: &[u64; 2]);
+ //}
+ //unsafe {
+ //gcm_init_clmul(h_table, &h);
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //Implementation::NEON => {
+ //prefixed_extern! {
+ //fn gcm_init_neon(Htable: &mut HTable, h: &[u64; 2]);
+ //}
+ //unsafe {
+ //gcm_init_neon(h_table, &h);
+ //}
+ //}
Implementation::Fallback => {
h_table.Htable[0] = gcm_nohw::init(h);
}
@@ -166,56 +165,55 @@ impl Context {
let h_table = &self.inner.Htable;
match detect_implementation(self.cpu_features) {
- #[cfg(target_arch = "x86_64")]
- Implementation::CLMUL if has_avx_movbe(self.cpu_features) => {
- prefixed_extern! {
- fn gcm_ghash_avx(
- xi: &mut Xi,
- Htable: &HTable,
- inp: *const [u8; BLOCK_LEN],
- len: crate::c::size_t,
- );
- }
- unsafe {
- gcm_ghash_avx(xi, h_table, input.as_ptr(), input_bytes);
- }
- }
-
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::CLMUL => {
- prefixed_extern! {
- fn gcm_ghash_clmul(
- xi: &mut Xi,
- Htable: &HTable,
- inp: *const [u8; BLOCK_LEN],
- len: crate::c::size_t,
- );
- }
- unsafe {
- gcm_ghash_clmul(xi, h_table, input.as_ptr(), input_bytes);
- }
- }
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- Implementation::NEON => {
- prefixed_extern! {
- fn gcm_ghash_neon(
- xi: &mut Xi,
- Htable: &HTable,
- inp: *const [u8; BLOCK_LEN],
- len: crate::c::size_t,
- );
- }
- unsafe {
- gcm_ghash_neon(xi, h_table, input.as_ptr(), input_bytes);
- }
- }
-
+ //#[cfg(target_arch = "x86_64")]
+ //Implementation::CLMUL if has_avx_movbe(self.cpu_features) => {
+ //prefixed_extern! {
+ //fn gcm_ghash_avx(
+ //xi: &mut Xi,
+ //Htable: &HTable,
+ //inp: *const [u8; BLOCK_LEN],
+ //len: crate::c::size_t,
+ //);
+ //}
+ //unsafe {
+ //gcm_ghash_avx(xi, h_table, input.as_ptr(), input_bytes);
+ //}
+ //}
+
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::CLMUL => {
+ //prefixed_extern! {
+ //fn gcm_ghash_clmul(
+ //xi: &mut Xi,
+ //Htable: &HTable,
+ //inp: *const [u8; BLOCK_LEN],
+ //len: crate::c::size_t,
+ //);
+ //}
+ //unsafe {
+ //gcm_ghash_clmul(xi, h_table, input.as_ptr(), input_bytes);
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //Implementation::NEON => {
+ //prefixed_extern! {
+ //fn gcm_ghash_neon(
+ //xi: &mut Xi,
+ //Htable: &HTable,
+ //inp: *const [u8; BLOCK_LEN],
+ //len: crate::c::size_t,
+ //);
+ //}
+ //unsafe {
+ //gcm_ghash_neon(xi, h_table, input.as_ptr(), input_bytes);
+ //}
+ //}
Implementation::Fallback => {
gcm_nohw::ghash(xi, h_table.Htable[0], input);
}
@@ -232,31 +230,30 @@ impl Context {
let h_table = &self.inner.Htable;
match detect_implementation(self.cpu_features) {
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- Implementation::CLMUL => {
- prefixed_extern! {
- fn gcm_gmult_clmul(xi: &mut Xi, Htable: &HTable);
- }
- unsafe {
- gcm_gmult_clmul(xi, h_table);
- }
- }
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- Implementation::NEON => {
- prefixed_extern! {
- fn gcm_gmult_neon(xi: &mut Xi, Htable: &HTable);
- }
- unsafe {
- gcm_gmult_neon(xi, h_table);
- }
- }
-
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //Implementation::CLMUL => {
+ //prefixed_extern! {
+ //fn gcm_gmult_clmul(xi: &mut Xi, Htable: &HTable);
+ //}
+ //unsafe {
+ //gcm_gmult_clmul(xi, h_table);
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //Implementation::NEON => {
+ //prefixed_extern! {
+ //fn gcm_gmult_neon(xi: &mut Xi, Htable: &HTable);
+ //}
+ //unsafe {
+ //gcm_gmult_neon(xi, h_table);
+ //}
+ //}
Implementation::Fallback => {
gcm_nohw::gmult(xi, h_table.Htable[0]);
}
@@ -276,10 +273,11 @@ impl Context {
#[cfg(target_arch = "x86_64")]
pub(super) fn is_avx(&self) -> bool {
- match detect_implementation(self.cpu_features) {
- Implementation::CLMUL => has_avx_movbe(self.cpu_features),
- _ => false,
- }
+ //match detect_implementation(self.cpu_features) {
+ //Implementation::CLMUL => has_avx_movbe(self.cpu_features),
+ //_ => false,
+ //}
+ false
}
#[cfg(target_arch = "aarch64")]
@@ -335,52 +333,50 @@ struct ContextInner {
#[allow(clippy::upper_case_acronyms)]
enum Implementation {
- #[cfg(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- ))]
- CLMUL,
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- NEON,
-
+ //#[cfg(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //))]
+ //CLMUL,
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //NEON,
Fallback,
}
#[inline]
-fn detect_implementation(cpu_features: cpu::Features) -> Implementation {
+fn detect_implementation(_cpu_features: cpu::Features) -> Implementation {
// `cpu_features` is only used for specific platforms.
- #[cfg(not(any(
- target_arch = "aarch64",
- target_arch = "arm",
- target_arch = "x86_64",
- target_arch = "x86"
- )))]
- let _cpu_features = cpu_features;
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- {
- if cpu::arm::PMULL.available(cpu_features) {
- return Implementation::CLMUL;
- }
- }
-
- #[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
- {
- if cpu::intel::FXSR.available(cpu_features) && cpu::intel::PCLMULQDQ.available(cpu_features)
- {
- return Implementation::CLMUL;
- }
- }
-
- #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
- {
- if cpu::arm::NEON.available(cpu_features) {
- return Implementation::NEON;
- }
- }
+ //#[cfg(not(any(
+ //target_arch = "aarch64",
+ //target_arch = "arm",
+ //target_arch = "x86_64",
+ //target_arch = "x86"
+ //)))]
+ //let _cpu_features = cpu_features;
+
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //{
+ //if cpu::arm::PMULL.available(cpu_features) {
+ //return Implementation::CLMUL;
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
+ //{
+ //if cpu::intel::FXSR.available(cpu_features) && cpu::intel::PCLMULQDQ.available(cpu_features)
+ //{
+ //return Implementation::CLMUL;
+ //}
+ //}
+
+ //#[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
+ //{
+ //if cpu::arm::NEON.available(cpu_features) {
+ //return Implementation::NEON;
+ //}
+ //}
Implementation::Fallback
}
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