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@csrohit
Last active January 15, 2024 16:20
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scan-adc
/* Set peripheral address as ADC data register */
DMA1_Channel1->CPAR = (uint32_t)&ADC1->DR;
/* Set memory address as adc_value buffer */
DMA1_Channel1->CMAR = (uint32_t)adc_value;
/* Set number of transfers */
DMA1_Channel1->CNDTR = 2U;
/* Set transfer direction : Peripheral -> Memory */
DMA1_Channel1->CCR &= ~DMA_CCR_DIR;
/* Enable memory increment */
DMA1_Channel1->CCR |= DMA_CCR_MINC;
/* Disable perpheral increment */
DMA1_Channel1->CCR &= ~DMA_CCR_PINC;
/* Set total conversions = 2 */
ADC1->SQR1 &= ~ADC_SQR1_L;
ADC1->SQR1 |= 1 << ADC_SQR1_L_Pos;
/* Configure PA1 & PA2 in analog input mode */
GPIOA->CRL &= ~(GPIO_CRL_CNF1 | GPIO_CRL_MODE1);
GPIOA->CRL &= ~(GPIO_CRL_CNF2 | GPIO_CRL_MODE2);
ADC1->SMPR2 |= (ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP1_0);
ADC1->SMPR2 |= (ADC_SMPR2_SMP2_1 | ADC_SMPR2_SMP2_0);
/* Enable SCAN mode */
ADC1->CR1 |= ADC_CR1_SCAN;
/* Enable DMA request generation */
ADC1->CR2 |= ADC_CR2_DMA;
ADC1->SQR3 &= ~(ADC_SQR3_SQ1 | ADC_SQR3_SQ2);
ADC1->SQR3 |= 1 << ADC_SQR3_SQ1_Pos;
ADC1->SQR3 |= 2 << ADC_SQR3_SQ2_Po
/* Set memory size = 16 bits */
DMA1_Channel1->CCR &= ~DMA_CCR_MSIZE;
DMA1_Channel1->CCR |= DMA_CCR_MSIZE_0;
/* Set peripheral size=16bits */
DMA1_Channel1->CCR &= ~DMA_CCR_PSIZE;
DMA1_Channel1->CCR |= DMA_CCR_PSIZE_0;
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