demux1to4.v

`timescale 1ns / 1ps

module demux1to4(
    input Data_i,
    input[1:0] sel,
    output reg Data_1_o,
    output reg Data_2_o,
    output reg Data_3_o
    );

    always @(Data_i or sel)
    begin
        case (sel)
            2'b00 : begin
                        Data_1_o = 0;
                        Data_2_o = 0;
                        Data_3_o = 0;
                      end
            2'b01 : begin
            $display("01");
                        Data_1_o = Data_i;
                        Data_2_o = 0;
                        Data_3_o = 0;
                      end
            2'b10 : begin
            $display("10");
                        Data_1_o = 0;
                        Data_2_o = Data_i;
                        Data_3_o = 0;
                      end
            2'b11 : begin
            $display("11");
                        Data_1_o = 0;
                        Data_2_o = 0;
                        Data_3_o = Data_i;
                      end
        endcase
    end
    
endmodule