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| diff --git a/sail_latex_riscv/commands.tex b/sail_latex_riscv/commands.tex | |
| index c98a894e..6ddc4805 100644 | |
| --- a/sail_latex_riscv/commands.tex | |
| +++ b/sail_latex_riscv/commands.tex | |
| @@ -33,8 +33,7 @@ | |
| \newcommand{\sailRISCVvalundefinedUnit}{\saildoclabelled{sailRISCVzundefinedzyunit}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzundefined_unitd751910db26c6cf7ec5d02a503ad4f9e.tex}}}} | |
| -\newcommand{\sailRISCVvaledivInt}{\saildoclabelled{sailRISCVzedivzyint}{\saildocval{ Euclidean division | |
| - | |
| +\newcommand{\sailRISCVvaledivInt}{\saildoclabelled{sailRISCVzedivzyint}{\saildocval{Euclidean division | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzediv_int5aaf4d3d5a3d15a7aebaf90d3bfb6650.tex}}}} | |
| \newcommand{\sailRISCVvalemodInt}{\saildoclabelled{sailRISCVzemodzyint}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzemod_int8e3d74b3b6a72e24e6bd03570d8e21ba.tex}}}} | |
| @@ -141,12 +140,13 @@ | |
| \newcommand{\sailRISCVvalprerrInt}{\saildoclabelled{sailRISCVzprerrzyint}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzprerr_int00b48f715fbb32df5901801dff63b643.tex}}}} | |
| -\newcommand{\sailRISCVvalpowTwo}{\saildoclabelled{sailRISCVzpow2}{\saildocval{We have special support for raising values to the power of two. Any Sail expression \lstinline`2 ^ x` will be compiled to this builtin. | |
| +\newcommand{\sailRISCVvalpowTwo}{\saildoclabelled{sailRISCVzpow2}{\saildocval{ | |
| +We have special support for raising values to the power of two. Any Sail expression \lstinline`2 ^ x` will be compiled to this builtin. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzpow2e971ce2f9ebb899590551317286dfd1b.tex}}}} | |
| -\newcommand{\sailRISCVvalShlEight}{\saildoclabelled{sailRISCVzzyshl8}{\saildocval{A common idiom in asl is to take two bits of an opcode and convert in into a variable like | |
| - | |
| +\newcommand{\sailRISCVvalShlEight}{\saildoclabelled{sailRISCVzzyshl8}{\saildocval{ | |
| +A common idiom in asl is to take two bits of an opcode and convert in into a variable like | |
| \lstinputlisting[language=sail]{sail_latex_riscv/blocka2cd1c63e1ba9c2d625830f7e4de8f31.sail}\lstinline{pow2} ensures that in this case the typechecker knows that the end result will be a value in the set \lstinline`{8, 16, 32, 64}` | |
| Similarly, we define shifts of 32 and 1 (i.e., powers of two). | |
| @@ -177,16 +177,13 @@ The most general shift operations also allow negative shifts which go in the opp | |
| \newcommand{\sailRISCVoverloadAshrInt}{\saildoclabelled{sailRISCVoverloadAzshrzyint}{\saildocoverload{}{\lstinputlisting[language=sail]{sail_latex_riscv/overloadAzshr_int5f4032eb21b9c850a9e2a8de5872a2a2.tex}}}} | |
| -\newcommand{\sailRISCVvaltdivInt}{\saildoclabelled{sailRISCVztdivzyint}{\saildocval{ Truncating division (rounds towards zero) | |
| - | |
| +\newcommand{\sailRISCVvaltdivInt}{\saildoclabelled{sailRISCVztdivzyint}{\saildocval{Truncating division (rounds towards zero) | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valztdiv_int5e119ac7ab9ff04c8877846f345d1159.tex}}}} | |
| -\newcommand{\sailRISCVvalTmodInt}{\saildoclabelled{sailRISCVzzytmodzyint}{\saildocval{ Remainder for truncating division (has sign of dividend) | |
| - | |
| +\newcommand{\sailRISCVvalTmodInt}{\saildoclabelled{sailRISCVzzytmodzyint}{\saildocval{Remainder for truncating division (has sign of dividend) | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valz_tmod_inta2984ba6dbfa10758476d9b3b7f62560.tex}}}} | |
| -\newcommand{\sailRISCVvalTmodIntPositive}{\saildoclabelled{sailRISCVzzytmodzyintzypositive}{\saildocval{ If we know the second argument is positive, we know the result is positive | |
| - | |
| +\newcommand{\sailRISCVvalTmodIntPositive}{\saildoclabelled{sailRISCVzzytmodzyintzypositive}{\saildocval{If we know the second argument is positive, we know the result is positive | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valz_tmod_int_positive6f0621d972182279e90a43c082e50c10.tex}}}} | |
| \newcommand{\sailRISCVoverloadAtmodInt}{\saildoclabelled{sailRISCVoverloadAztmodzyint}{\saildocoverload{}{\lstinputlisting[language=sail]{sail_latex_riscv/overloadAztmod_int76b131b53b88df8b201279295eacebbe.tex}}}} | |
| @@ -251,7 +248,8 @@ The most general shift operations also allow negative shifts which go in the opp | |
| \newcommand{\sailRISCVfnnLeadingSpaces}{\saildoclabelled{sailRISCVfnznzyleadingzyspaces}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzn_leading_spaces05ea6c2f03435a60412f4bef062a912a.tex}}}} | |
| -\newcommand{\sailRISCVvalspc}{\saildoclabelled{sailRISCVzspc}{\saildocval{In a string mapping this is treated as \lstinline`[ ]+`, i.e one or more space | |
| +\newcommand{\sailRISCVvalspc}{\saildoclabelled{sailRISCVzspc}{\saildocval{ | |
| +In a string mapping this is treated as \lstinline`[ ]+`, i.e one or more space | |
| characters. It is printed as a single space \lstinline`" "`. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzspca574d99b4c3d28e08386a1f673633994.tex}}}} | |
| @@ -264,7 +262,8 @@ characters. It is printed as a single space \lstinline`" "`. | |
| \newcommand{\sailRISCVfnspcBackwardsMatches}{\saildoclabelled{sailRISCVfnzspczybackwardszymatches}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzspc_backwards_matches6b6357587b217ae24d7055f09204bd11.tex}}}} | |
| -\newcommand{\sailRISCVvaloptSpc}{\saildoclabelled{sailRISCVzoptzyspc}{\saildocval{In a string mapping this is treated as \lstinline`[ ]*`, \saildocabbrev{i.e.} zero or more space | |
| +\newcommand{\sailRISCVvaloptSpc}{\saildoclabelled{sailRISCVzoptzyspc}{\saildocval{ | |
| +In a string mapping this is treated as \lstinline`[ ]*`, i.e. zero or more space | |
| characters. It is printed as the empty string. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzopt_spc4aab1150dfed90f36fea1776963edbf0.tex}}}} | |
| @@ -277,7 +276,8 @@ characters. It is printed as the empty string. | |
| \newcommand{\sailRISCVfnoptSpcBackwardsMatches}{\saildoclabelled{sailRISCVfnzoptzyspczybackwardszymatches}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzopt_spc_backwards_matchesbc78b9c02b7156c6cfcb17a7d5067f87.tex}}}} | |
| -\newcommand{\sailRISCVvaldefSpc}{\saildoclabelled{sailRISCVzdefzyspc}{\saildocval{Like \lstinline`opt_spc`, in a string mapping this is treated as \lstinline`[ ]*`, \saildocabbrev{i.e.} zero or more space | |
| +\newcommand{\sailRISCVvaldefSpc}{\saildoclabelled{sailRISCVzdefzyspc}{\saildocval{ | |
| +Like \lstinline`opt_spc`, in a string mapping this is treated as \lstinline`[ ]*`, i.e. zero or more space | |
| characters. It differs however in that it is printed as a single space \lstinline`" "`. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzdef_spce04ebdaa1e0acd4aa4dd3326642e673e.tex}}}} | |
| @@ -314,6 +314,8 @@ characters. It differs however in that it is printed as a single space \lstinlin | |
| \newcommand{\sailRISCVvalcountLeadingZeros}{\saildoclabelled{sailRISCVzcountzyleadingzyzzeros}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzcount_leading_zzeros315ae28f559df1d42a7d2ca4cfff2905.tex}}}} | |
| +\newcommand{\sailRISCVvalcountTrailingZeros}{\saildoclabelled{sailRISCVzcountzytrailingzyzzeros}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzcount_trailing_zzerosc0611ce8bb078e41da1b3c72d6758584.tex}}}} | |
| + | |
| \newcommand{\sailRISCVvalprintBits}{\saildoclabelled{sailRISCVzprintzybits}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzprint_bits30cf225474fbf3e575d7aa83aa309559.tex}}}} | |
| \newcommand{\sailRISCVvalprerrBits}{\saildoclabelled{sailRISCVzprerrzybits}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzprerr_bits932899725108ebe483d3226f250f2b92.tex}}}} | |
| @@ -322,11 +324,13 @@ characters. It differs however in that it is printed as a single space \lstinlin | |
| \newcommand{\sailRISCVvalsailZeroExtend}{\saildoclabelled{sailRISCVzsailzyzzerozyextend}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzsail_zzero_extend411875c18d3b332113845d17151890c2.tex}}}} | |
| -\newcommand{\sailRISCVvaltruncate}{\saildoclabelled{sailRISCVztruncate}{\saildocval{\lstinline{sail_zero_extend}\lstinline`(v, n)` truncates \lstinline`v`, keeping only the \emph{least} significant \lstinline`n` bits. | |
| +\newcommand{\sailRISCVvaltruncate}{\saildoclabelled{sailRISCVztruncate}{\saildocval{ | |
| +\lstinline{sail_zero_extend}\lstinline`(v, n)` truncates \lstinline`v`, keeping only the \emph{least} significant \lstinline`n` bits. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valztruncatea666e28ae0c8ca7327a2b3fcd1ed4ec7.tex}}}} | |
| -\newcommand{\sailRISCVvaltruncateLSB}{\saildoclabelled{sailRISCVztruncateLSB}{\saildocval{\lstinline{truncate}\lstinline`(v, n)` truncates \lstinline`v`, keeping only the \emph{most} significant \lstinline`n` bits. | |
| +\newcommand{\sailRISCVvaltruncateLSB}{\saildoclabelled{sailRISCVztruncateLSB}{\saildocval{ | |
| +\lstinline{truncate}\lstinline`(v, n)` truncates \lstinline`v`, keeping only the \emph{most} significant \lstinline`n` bits. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valztruncatelsb4d124c6ec672453343dc0b20d295e82d.tex}}}} | |
| @@ -408,11 +412,13 @@ characters. It differs however in that it is printed as a single space \lstinlin | |
| \newcommand{\sailRISCVvalsetSliceBits}{\saildoclabelled{sailRISCVzsetzyslicezybits}{\saildocval{}{\lstinputlisting[language=sail]{sail_latex_riscv/valzset_slice_bits5956200094c551f35973411fcc90a521.tex}}}} | |
| -\newcommand{\sailRISCVvalunsigned}{\saildoclabelled{sailRISCVzunsigned}{\saildocval{converts a bit vector of length $n$ to an integer in the range $0$ to $2^n - 1$. | |
| +\newcommand{\sailRISCVvalunsigned}{\saildoclabelled{sailRISCVzunsigned}{\saildocval{ | |
| +converts a bit vector of length $n$ to an integer in the range $0$ to $2^n - 1$. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzunsigned1010eda2cdd2666cd8fd0ddf82ac526f.tex}}}} | |
| -\newcommand{\sailRISCVvalsigned}{\saildoclabelled{sailRISCVzsigned}{\saildocval{converts a bit vector of length $n$ to an integer in the range $-2^{n-1}$ to $2^{n-1} - 1$ using twos-complement. | |
| +\newcommand{\sailRISCVvalsigned}{\saildoclabelled{sailRISCVzsigned}{\saildocval{ | |
| +converts a bit vector of length $n$ to an integer in the range $-2^{n-1}$ to $2^{n-1} - 1$ using twos-complement. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzsigned36d2317f34f1dacb4e465e6e56b185e6.tex}}}} | |
| @@ -1056,7 +1062,7 @@ characters. It differs however in that it is printed as a single space \lstinlin | |
| \newcommand{\sailRISCVletcapResetT}{\saildoclabelled{sailRISCVletzcapzyresetzyT}{\saildoclet{}{\lstinputlisting[language=sail]{sail_latex_riscv/letzcap_reset_t56aac6ecd6f934ba784056463b1e3b8b.tex}}}} | |
| -\newcommand{\sailRISCVtypeCapability}{\saildoclabelled{sailRISCVtypezCapability}{\saildoctype{ A partially decompressed version of a capability -- E, B, T, | |
| +\newcommand{\sailRISCVtypeCapability}{\saildoclabelled{sailRISCVtypezCapability}{\saildoctype{A partially decompressed version of a capability -- E, B, T, | |
| lenMSB, sealed and otype fields are not present in all formats and are | |
| populated by capBitsToCapability. | |
| @@ -1120,13 +1126,15 @@ populated by capBitsToCapability. | |
| \newcommand{\sailRISCVfnsetCapPerms}{\saildoclabelled{sailRISCVfnzsetCapPerms}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzsetcappermsbb03905a9ed7e94e44018326fd80a0d0.tex}}}} | |
| -\newcommand{\sailRISCVvalgetCapFlags}{\saildoclabelled{sailRISCVzgetCapFlags}{\saildocval{Gets the architecture specific capability flags for given capability. | |
| +\newcommand{\sailRISCVvalgetCapFlags}{\saildoclabelled{sailRISCVzgetCapFlags}{\saildocval{ | |
| +Gets the architecture specific capability flags for given capability. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzgetcapflags06024d55b7e2cd94f99830e3c12d9adf.tex}}}} | |
| \newcommand{\sailRISCVfngetCapFlags}{\saildoclabelled{sailRISCVfnzgetCapFlags}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzgetcapflags06024d55b7e2cd94f99830e3c12d9adf.tex}}}} | |
| -\newcommand{\sailRISCVvalsetCapFlags}{\saildoclabelled{sailRISCVzsetCapFlags}{\saildocval{\lstinline{getCapFlags}\lstinline`(cap, flags)` sets the architecture specific capability flags on \lstinline`cap` | |
| +\newcommand{\sailRISCVvalsetCapFlags}{\saildoclabelled{sailRISCVzsetCapFlags}{\saildocval{ | |
| +\lstinline{getCapFlags}\lstinline`(cap, flags)` sets the architecture specific capability flags on \lstinline`cap` | |
| to \lstinline`flags` and returns the result as new capability. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzsetcapflags1cebd5e15eac27fc3dbd3e6dc534158a.tex}}}} | |
| @@ -1137,8 +1145,9 @@ to \lstinline`flags` and returns the result as new capability. | |
| \newcommand{\sailRISCVfnisCapSealed}{\saildoclabelled{sailRISCVfnzisCapSealed}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnziscapsealeda9077bc28a9d2efcd12e42755a4de536.tex}}}} | |
| -\newcommand{\sailRISCVvalhasReservedOType}{\saildoclabelled{sailRISCVzhasReservedOType}{\saildocval{Tests whether the capability has a reserved otype (larger than \hyperref[sailRISCVzcapzymaxzyotype]{\lstinline{cap_max_otype}}). | |
| -Note that this includes both sealed (\saildocabbrev{e.g.} sentry) and unsealed (all ones) | |
| +\newcommand{\sailRISCVvalhasReservedOType}{\saildoclabelled{sailRISCVzhasReservedOType}{\saildocval{ | |
| +Tests whether the capability has a reserved otype (larger than \hyperref[sailRISCVzcapzymaxzyotype]{\lstinline{cap_max_otype}}). | |
| +Note that this includes both sealed (e.g. sentry) and unsealed (all ones) | |
| otypes. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzhasreservedotypee1cbb5365f130582a0df82f04b53cb52.tex}}}} | |
| @@ -1451,7 +1460,8 @@ otypes. | |
| \newcommand{\sailRISCVfnprivLevelToBits}{\saildoclabelled{sailRISCVfnzprivLevelzytozybits}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzprivlevel_to_bits4b6f72dec94db401093759e81957be6b.tex}}}} | |
| -\newcommand{\sailRISCVvalprivLevelOfBits}{\saildoclabelled{sailRISCVzprivLevelzyofzybits}{\saildocval{Converts the given 2-bit privilege level code to the \hyperref[sailRISCVzPrivilege]{\lstinline{Privilege}} enum. | |
| +\newcommand{\sailRISCVvalprivLevelOfBits}{\saildoclabelled{sailRISCVzprivLevelzyofzybits}{\saildocval{ | |
| +Converts the given 2-bit privilege level code to the \hyperref[sailRISCVzPrivilege]{\lstinline{Privilege}} enum. | |
| Calling with a reserved code will result in an internal error. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzprivlevel_of_bitsf8754d7aa9d9aeada7d193ecf64e148c.tex}}}} | |
| @@ -1858,7 +1868,8 @@ Calling with a reserved code will result in an internal error. | |
| \newcommand{\sailRISCVfnwordWidthBytes}{\saildoclabelled{sailRISCVfnzwordzywidthzybytes}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzword_width_bytes3499487c0f03a80d8659fa504a62261f.tex}}}} | |
| -\newcommand{\sailRISCVvalreportInvalidWidth}{\saildoclabelled{sailRISCVzreportzyinvalidzywidth}{\saildocval{Raise an internal error reporting that width w is invalid for access kind, k, | |
| +\newcommand{\sailRISCVvalreportInvalidWidth}{\saildoclabelled{sailRISCVzreportzyinvalidzywidth}{\saildocval{ | |
| +Raise an internal error reporting that width w is invalid for access kind, k, | |
| and current xlen. The file name and line number should be passed in as the | |
| first two arguments using the \textbf{FILE} and \textbf{LINE} built-in macros. | |
| This is mainly used to supress Sail warnings about incomplete matches and | |
| @@ -2937,7 +2948,8 @@ and https://github.com/riscv/sail-riscv/pull/197 . | |
| \newcommand{\sailRISCVfnextInitRegs}{\saildoclabelled{sailRISCVfnzextzyinitzyregs}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzext_init_regs1d9ff00ce58fd5712eb26190e338015a.tex}}}} | |
| -\newcommand{\sailRISCVvalextRvfiInit}{\saildoclabelled{sailRISCVzextzyrvfizyinit}{\saildocval{This function is called after above when running rvfi and allows the model | |
| +\newcommand{\sailRISCVvalextRvfiInit}{\saildoclabelled{sailRISCVzextzyrvfizyinit}{\saildocval{ | |
| +This function is called after above when running rvfi and allows the model | |
| to be initialised differently. For RVFI we initialise cap regs to default | |
| instead of null. | |
| @@ -4893,15 +4905,17 @@ instead of null. | |
| \newcommand{\sailRISCVtypeExtPhysAddrCheck}{\saildoclabelled{sailRISCVtypezExtzyPhysAddrzyCheck}{\saildoctype{}{\lstinputlisting[language=sail]{sail_latex_riscv/typezext_physaddr_checkc3760f9b4fda909a0f48ead90fcc3bf3.tex}}}} | |
| -\newcommand{\sailRISCVvalextCheckPhysMemRead}{\saildoclabelled{sailRISCVzextzycheckzyphyszymemzyread}{\saildocval{Validate a read from physical memory. | |
| -\lstinline{Ext_PhysAddr_Check}(access\_type, paddr, size, aquire, release, reserved, read\_meta) should | |
| +\newcommand{\sailRISCVvalextCheckPhysMemRead}{\saildoclabelled{sailRISCVzextzycheckzyphyszymemzyread}{\saildocval{ | |
| +Validate a read from physical memory. | |
| +\lstinline{Ext_PhysAddr_Check}(access_type, paddr, size, aquire, release, reserved, read_meta) should | |
| return Some(exception) to abort the read or None to allow it to proceed. The | |
| check is performed after PMP checks and does not apply to MMIO memory. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzext_check_phys_mem_readf999b4bc39f7274e42391ca653d8762d.tex}}}} | |
| -\newcommand{\sailRISCVvalextCheckPhysMemWrite}{\saildoclabelled{sailRISCVzextzycheckzyphyszymemzywrite}{\saildocval{Validate a write to physical memory. | |
| -\lstinline{ext_check_phys_mem_read}(write\_kind, paddr, size, data, metadata) should return Some(exception) | |
| +\newcommand{\sailRISCVvalextCheckPhysMemWrite}{\saildoclabelled{sailRISCVzextzycheckzyphyszymemzywrite}{\saildocval{ | |
| +Validate a write to physical memory. | |
| +\lstinline{ext_check_phys_mem_read}(write_kind, paddr, size, data, metadata) should return Some(exception) | |
| to abort the write or None to allow it to proceed. The check is performed | |
| after PMP checks and does not apply to MMIO memory. | |
| @@ -4911,7 +4925,8 @@ after PMP checks and does not apply to MMIO memory. | |
| \newcommand{\sailRISCVfnhandleCheriCapException}{\saildoclabelled{sailRISCVfnzhandlezycherizycapzyexception}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzhandle_cheri_cap_exceptionc1ff083ca6d0a739fb48243e22ff4898.tex}}}} | |
| -\newcommand{\sailRISCVvalhandleCheriRegException}{\saildoclabelled{sailRISCVzhandlezycherizyregzyexception}{\saildocval{Causes the processor to raise a capability exception by writing the given | |
| +\newcommand{\sailRISCVvalhandleCheriRegException}{\saildoclabelled{sailRISCVzhandlezycherizyregzyexception}{\saildocval{ | |
| +Causes the processor to raise a capability exception by writing the given | |
| capability exception cause and register number to the xtval register then | |
| signalling an exception. | |
| @@ -4919,7 +4934,8 @@ signalling an exception. | |
| \newcommand{\sailRISCVfnhandleCheriRegException}{\saildoclabelled{sailRISCVfnzhandlezycherizyregzyexception}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzhandle_cheri_reg_exceptionfad1b48ae08f4eb90d02a5d75771c894.tex}}}} | |
| -\newcommand{\sailRISCVvalhandleCheriPccException}{\saildoclabelled{sailRISCVzhandlezycherizypcczyexception}{\saildocval{Is as \hyperref[sailRISCVzhandlezycherizycapzyexception]{\lstinline{handle_cheri_cap_exception}} except that the capability register | |
| +\newcommand{\sailRISCVvalhandleCheriPccException}{\saildoclabelled{sailRISCVzhandlezycherizypcczyexception}{\saildocval{ | |
| +Is as \hyperref[sailRISCVzhandlezycherizycapzyexception]{\lstinline{handle_cheri_cap_exception}} except that the capability register | |
| number uses the special value 0x10 indicating the PCC register. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzhandle_cheri_pcc_exception3ca0178a61c5394ac2c49197cedda1c1.tex}}}} | |
| @@ -4956,15 +4972,17 @@ number uses the special value 0x10 indicating the PCC register. | |
| \newcommand{\sailRISCVtypeextDataAddrError}{\saildoclabelled{sailRISCVtypezextzydatazyaddrzyerror}{\saildoctype{}{\lstinputlisting[language=sail]{sail_latex_riscv/typezext_data_addr_errora4f74a5b44e1f0d7e46bc0f33c466dea.tex}}}} | |
| -\newcommand{\sailRISCVvalddcAndResultingAddr}{\saildoclabelled{sailRISCVzddczyandzyresultingzyaddr}{\saildocval{Returns the current value of DDC (for subsequent access checks) as well as | |
| +\newcommand{\sailRISCVvalddcAndResultingAddr}{\saildoclabelled{sailRISCVzddczyandzyresultingzyaddr}{\saildocval{ | |
| +Returns the current value of DDC (for subsequent access checks) as well as | |
| the resulting address for a non-CHERI integer-based memory access. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzddc_and_resulting_addr0f0e2d5c6123a71667b35ed17c44868e.tex}}}} | |
| \newcommand{\sailRISCVfnddcAndResultingAddr}{\saildoclabelled{sailRISCVfnzddczyandzyresultingzyaddr}{\saildocfn{}{\lstinputlisting[language=sail]{sail_latex_riscv/fnzddc_and_resulting_addr0f0e2d5c6123a71667b35ed17c44868e.tex}}}} | |
| -\newcommand{\sailRISCVvalgetCheriModeCapAddr}{\saildoclabelled{sailRISCVzgetzycherizymodezycapzyaddr}{\saildocval{For given base register and offset returns, depending on current capability | |
| -mode flag, a bounding capability, effective address, and capreg\_idx (for use | |
| +\newcommand{\sailRISCVvalgetCheriModeCapAddr}{\saildoclabelled{sailRISCVzgetzycherizymodezycapzyaddr}{\saildocval{ | |
| +For given base register and offset returns, depending on current capability | |
| +mode flag, a bounding capability, effective address, and capreg_idx (for use | |
| in cap cause). | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/valzget_cheri_mode_cap_addr267a231c94a9ae3cf08d67cb43590a2e.tex}}}} | |
| @@ -6157,51 +6175,49 @@ in cap cause). | |
| \newcommand{\sailRISCVfclZBSUnderscoreRTYPEexecute}{\saildoclabelled{sailRISCVfclZBSUnderscoreRTYPEzexecute}{\saildocfcl{}{\lstinputlisting[language=sail]{sail_latex_riscv/fclZBSUnderscoreRTYPEzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclAUIPCCexecute}{\saildoclabelled{sailRISCVfclAUIPCCzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of \textbf{PCC}, with the | |
| +\newcommand{\sailRISCVfclAUIPCCexecute}{\saildoclabelled{sailRISCVfclAUIPCCzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the contents of \textbf{PCC}, with the | |
| \textbf{address} replaced with \textbf{PCC}.\textbf{address} $+$ \emph{imm} $\times$ 4096. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclAUIPCCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCJALexecute}{\saildoclabelled{sailRISCVfclCJALzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the next instruction's \textbf{PCC} and | |
| +\newcommand{\sailRISCVfclCJALexecute}{\saildoclabelled{sailRISCVfclCJALzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the next instruction's \textbf{PCC} and | |
| sealed as a sentry. \textbf{PCC}.\textbf{address} is incremented by \emph{imm}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{PCC}.\textbf{address} $+$ \emph{imm} $\lt$ \textbf{PCC}.\textbf{base}. | |
| -\item \textbf{PCC}.\textbf{address} $+$ \emph{imm} $+$ min\_instruction\_bytes $\gt$ \textbf{PCC}.\textbf{top}. | |
| +\item \textbf{PCC}.\textbf{address} $+$ \emph{imm} $+$ min_instruction_bytes $\gt$ \textbf{PCC}.\textbf{top}. | |
| \item \textbf{PCC}.\textbf{address} $+$ \emph{imm} is unaligned, ignoring bit 0. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCJALzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCJALRexecute}{\saildoclabelled{sailRISCVfclCJALRzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the next instruction's \textbf{PCC} and | |
| +\newcommand{\sailRISCVfclCJALRexecute}{\saildoclabelled{sailRISCVfclCJALRzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the next instruction's \textbf{PCC} and | |
| sealed as a sentry. \textbf{PCC} is replaced with the value of capability | |
| register \emph{cs1} with its \textbf{address} incremented by \emph{imm} and the 0th bit of | |
| its \textbf{address} set to 0, and is unsealed if it is a sentry. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed and is not a sentry. | |
| \item \emph{cs1} is a sentry and \emph{imm} $\ne$ 0. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Execute}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Execute}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} $\lt$ \emph{cs1}.\textbf{base}. | |
| -\item \emph{cs1}.\textbf{address} $+$ \emph{imm} $+$ min\_instruction\_bytes $\gt$ \emph{cs1}.\textbf{top}. | |
| +\item \emph{cs1}.\textbf{address} $+$ \emph{imm} $+$ min_instruction_bytes $\gt$ \emph{cs1}.\textbf{top}. | |
| \item \emph{cs1}.\textbf{base} is unaligned (only possible if PCC relocation is enabled). | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} is unaligned, ignoring bit 0. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCJALRzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetPermexecute}{\saildoclabelled{sailRISCVfclCGetPermzexecute}{\saildocfcl{The least significant \hyperref[sailRISCVzcapzyhpermszywidth]{\lstinline{cap_hperms_width}} bits of integer register \emph{rd} are | |
| +\newcommand{\sailRISCVfclCGetPermexecute}{\saildoclabelled{sailRISCVfclCGetPermzexecute}{\saildocfcl{ | |
| +The least significant \hyperref[sailRISCVzcapzyhpermszywidth]{\lstinline{cap_hperms_width}} bits of integer register \emph{rd} are | |
| set equal to the \textbf{perms} field of capability register \emph{cs1}; bits | |
| \hyperref[sailRISCVzcapzyupermszyshift]{\lstinline{cap_uperms_shift}} to \hyperref[sailRISCVzcapzyupermszyshift]{\lstinline{cap_uperms_shift}}+\hyperref[sailRISCVzcapzyupermszywidth]{\lstinline{cap_uperms_width}}-1 of \emph{rd} are set | |
| equal to the \textbf{uperms} field of \emph{cs1}. | |
| @@ -6209,27 +6225,32 @@ The other bits of \emph{rd} are set to zero. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetPermzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetFlagsexecute}{\saildoclabelled{sailRISCVfclCGetFlagszexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the zero-extended \textbf{flags} field of | |
| +\newcommand{\sailRISCVfclCGetFlagsexecute}{\saildoclabelled{sailRISCVfclCGetFlagszexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the zero-extended \textbf{flags} field of | |
| capability register \emph{cs1}. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetFlagszexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetTypeexecute}{\saildoclabelled{sailRISCVfclCGetTypezexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{otype} field of capability | |
| +\newcommand{\sailRISCVfclCGetTypeexecute}{\saildoclabelled{sailRISCVfclCGetTypezexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{otype} field of capability | |
| register \emph{cs1}. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetTypezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetBaseexecute}{\saildoclabelled{sailRISCVfclCGetBasezexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{base} field of capability | |
| +\newcommand{\sailRISCVfclCGetBaseexecute}{\saildoclabelled{sailRISCVfclCGetBasezexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{base} field of capability | |
| register \emph{cs1}. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetBasezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetOffsetexecute}{\saildoclabelled{sailRISCVfclCGetOffsetzexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{offset} field of capability | |
| +\newcommand{\sailRISCVfclCGetOffsetexecute}{\saildoclabelled{sailRISCVfclCGetOffsetzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{offset} field of capability | |
| register \emph{cs1}. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetOffsetzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetHighexecute}{\saildoclabelled{sailRISCVfclCGetHighzexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{high half} of capability | |
| +\newcommand{\sailRISCVfclCGetHighexecute}{\saildoclabelled{sailRISCVfclCGetHighzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{high half} of capability | |
| register \emph{cs1}. | |
| The bits returned here are of the \textbf{in-memory} form of the capability, which | |
| @@ -6242,7 +6263,8 @@ capability is interpreted as a twice-\textbf{XLEN}-bit integer). | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetHighzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetHighexecute}{\saildoclabelled{sailRISCVfclCSetHighzexecute}{\saildocfcl{Capability register \emph{cd} comes to hold the capability from \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCSetHighexecute}{\saildoclabelled{sailRISCVfclCSetHighzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} comes to hold the capability from \emph{cs1} with its | |
| high bits replaced with the value in the integer register \emph{rs2}. The tag | |
| of \emph{cd} is cleared. | |
| @@ -6251,85 +6273,83 @@ instruction yields the same result as writing \emph{cs1} out to memory, | |
| overwriting the high word with \emph{rs2}, and loading that capability-sized | |
| granule into \emph{cd}, although without the memory mutation side-effects. | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetHighzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetLenexecute}{\saildoclabelled{sailRISCVfclCGetLenzexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{length} field of capability | |
| +\newcommand{\sailRISCVfclCGetLenexecute}{\saildoclabelled{sailRISCVfclCGetLenzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{length} field of capability | |
| register \emph{cs1}. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item Due to the compressed representation of capabilities, the actual length | |
| - of capabilities can be $2^{\hyperref[sailRISCVzxlen]{{xlen}}}$; \hyperref[sailRISCVzCGetLen]{\lstinline{CGetLen}} will return the | |
| - maximum value of $2^{\hyperref[sailRISCVzxlen]{{xlen}}}-1$ in this case. | |
| - | |
| +of capabilities can be $2^{\hyperref[sailRISCVzxlen]{\lstinline{{xlen}}}}$; \hyperref[sailRISCVzCGetLen]{\lstinline{CGetLen}} will return the | |
| +maximum value of $2^{\hyperref[sailRISCVzxlen]{\lstinline{{xlen}}}}-1$ in this case. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetLenzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetTopexecute}{\saildoclabelled{sailRISCVfclCGetTopzexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{top} field (\saildocabbrev{i.e.} one past the | |
| +\newcommand{\sailRISCVfclCGetTopexecute}{\saildoclabelled{sailRISCVfclCGetTopzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{top} field (i.e. one past the | |
| last addressable byte) of capability register \emph{cs1}. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item Due to the compressed representation of capabilities, the actual top | |
| - of capabilities can be $2^{\hyperref[sailRISCVzxlen]{{xlen}}}$; \hyperref[sailRISCVzCGetTop]{\lstinline{CGetTop}} will return the | |
| - maximum value of $2^{\hyperref[sailRISCVzxlen]{{xlen}}}-1$ in this case. | |
| - | |
| +of capabilities can be $2^{\hyperref[sailRISCVzxlen]{\lstinline{{xlen}}}}$; \hyperref[sailRISCVzCGetTop]{\lstinline{CGetTop}} will return the | |
| +maximum value of $2^{\hyperref[sailRISCVzxlen]{\lstinline{{xlen}}}}-1$ in this case. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetTopzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetTagexecute}{\saildoclabelled{sailRISCVfclCGetTagzexecute}{\saildocfcl{The low bit of integer register \emph{rd} is set to the \textbf{tag} field of \emph{cs1}. | |
| +\newcommand{\sailRISCVfclCGetTagexecute}{\saildoclabelled{sailRISCVfclCGetTagzexecute}{\saildocfcl{ | |
| +The low bit of integer register \emph{rd} is set to the \textbf{tag} field of \emph{cs1}. | |
| All other bits of \emph{rd} are cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetTagzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetSealedexecute}{\saildoclabelled{sailRISCVfclCGetSealedzexecute}{\saildocfcl{The low bit of integer register \emph{rd} is set to 0 if \emph{cs1} is unsealed | |
| +\newcommand{\sailRISCVfclCGetSealedexecute}{\saildoclabelled{sailRISCVfclCGetSealedzexecute}{\saildocfcl{ | |
| +The low bit of integer register \emph{rd} is set to 0 if \emph{cs1} is unsealed | |
| and to 1 otherwise. | |
| All other bits of \emph{rd} are cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetSealedzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCGetAddrexecute}{\saildoclabelled{sailRISCVfclCGetAddrzexecute}{\saildocfcl{Integer register \emph{rd} is set equal to the \textbf{address} field of capability | |
| +\newcommand{\sailRISCVfclCGetAddrexecute}{\saildoclabelled{sailRISCVfclCGetAddrzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to the \textbf{address} field of capability | |
| register \emph{cs1}. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCGetAddrzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSpecialRWexecute}{\saildoclabelled{sailRISCVfclCSpecialRWzexecute}{\saildocfcl{Capability register \emph{cd} is set equal to special capability register \emph{scr}, | |
| +\newcommand{\sailRISCVfclCSpecialRWexecute}{\saildoclabelled{sailRISCVfclCSpecialRWzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set equal to special capability register \emph{scr}, | |
| and \emph{scr} is set equal to capability register \emph{cs1} if \emph{cs1} is not \textbf{C0}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{scr} does not exist. | |
| \item \emph{scr} is read-only and \emph{cs1} is not \textbf{C0}. | |
| \item \emph{scr} is only accessible to a higher privilege mode. | |
| -\item \emph{scr} requires \textbf{Permit\_Access\_System\_Registers} and that is not | |
| - granted by \textbf{PCC}.\textbf{perms}. | |
| +\item \emph{scr} requires \textbf{Permit_Access_System_Registers} and that is not | |
| +granted by \textbf{PCC}.\textbf{perms}. | |
| \end{itemize} | |
| - | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item Writing \textbf{NULL} to a special capability register cannot be done with \textbf{C0} | |
| - as that only performs a read. An alternative implementation would allocate | |
| - a separate two-operand CSpecialR instruction and interpret \emph{cs1} being | |
| - \textbf{C0} as a write of \textbf{NULL} if the need to use a temporary capability | |
| - register proves to be overly problematic for software. For U-mode | |
| - transitions to domains without \textbf{Permit\_Access\_System\_Registers} only | |
| - \textbf{DDC} should need clearing, which can be done with \hyperref[sailRISCVzCClear]{\lstinline{CClear}}. | |
| - | |
| +as that only performs a read. An alternative implementation would allocate | |
| +a separate two-operand CSpecialR instruction and interpret \emph{cs1} being | |
| +\textbf{C0} as a write of \textbf{NULL} if the need to use a temporary capability | |
| +register proves to be overly problematic for software. For U-mode | |
| +transitions to domains without \textbf{Permit_Access_System_Registers} only | |
| +\textbf{DDC} should need clearing, which can be done with \hyperref[sailRISCVzCClear]{\lstinline{CClear}}. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSpecialRWzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCAndPermexecute}{\saildoclabelled{sailRISCVfclCAndPermzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability | |
| +\newcommand{\sailRISCVfclCAndPermexecute}{\saildoclabelled{sailRISCVfclCAndPermzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the contents of capability | |
| register \emph{cs1} with the \textbf{perms} field set to the bitwise and of its | |
| previous value and bits 0 to \hyperref[sailRISCVzcapzyhpermszywidth]{\lstinline{cap_hperms_width}}-1 of integer register \emph{rs2} | |
| and the \textbf{uperms} field set to the bitwise and of its previous value and | |
| @@ -6338,31 +6358,33 @@ If \emph{cs1} was sealed then \emph{cd}.\textbf{tag} is cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCAndPermzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetFlagsexecute}{\saildoclabelled{sailRISCVfclCSetFlagszexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability | |
| +\newcommand{\sailRISCVfclCSetFlagsexecute}{\saildoclabelled{sailRISCVfclCSetFlagszexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the contents of capability | |
| register \emph{cs1} with the \textbf{flags} field set to bits 0 to \hyperref[sailRISCVzcapzyflagszywidth]{\lstinline{cap_flags_width}}-1 | |
| of integer register \emph{rs2}. If \emph{cs1} was sealed then \emph{cd}.\textbf{tag} is cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetFlagszexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCToPtrexecute}{\saildoclabelled{sailRISCVfclCToPtrzexecute}{\saildocfcl{If the \textbf{tag} field of capability register \emph{cs1} is not set, integer | |
| +\newcommand{\sailRISCVfclCToPtrexecute}{\saildoclabelled{sailRISCVfclCToPtrzexecute}{\saildocfcl{ | |
| +If the \textbf{tag} field of capability register \emph{cs1} is not set, integer | |
| register \emph{rd} is set to 0, otherwise integer register \emph{rd} is set to | |
| \emph{cs1}.\textbf{address} $-$ \emph{cs2}.\textbf{base}. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item \emph{cs2} being sealed will not set \emph{rd} to 0. This is for further study. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCToPtrzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSubexecute}{\saildoclabelled{sailRISCVfclCSubzexecute}{\saildocfcl{Integer register \emph{rd} is set equal to (\emph{cs1}.\textbf{address} $-$ | |
| -\emph{cs2}.\textbf{address}) $\bmod~2^{\hyperref[sailRISCVzxlen]{{xlen}}}$. | |
| +\newcommand{\sailRISCVfclCSubexecute}{\saildoclabelled{sailRISCVfclCSubzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set equal to (\emph{cs1}.\textbf{address} $-$ | |
| +\emph{cs2}.\textbf{address}) $\bmod~2^{\hyperref[sailRISCVzxlen]{\lstinline{{xlen}}}}$. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSubzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCIncOffsetexecute}{\saildoclabelled{sailRISCVfclCIncOffsetzexecute}{\saildocfcl{Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCIncOffsetexecute}{\saildoclabelled{sailRISCVfclCIncOffsetzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| \textbf{address} replaced with \emph{cs1}.\textbf{address} $+$ \emph{rs2}. | |
| If the resulting capability cannot be represented exactly, or if \emph{cs1} was | |
| sealed, then \emph{cd}.\textbf{tag} is cleared. The remaining capability fields are | |
| @@ -6371,7 +6393,8 @@ set to what the in-memory representation of \emph{cs1} with the address set to | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCIncOffsetzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCIncOffsetImmediateexecute}{\saildoclabelled{sailRISCVfclCIncOffsetImmediatezexecute}{\saildocfcl{Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCIncOffsetImmediateexecute}{\saildoclabelled{sailRISCVfclCIncOffsetImmediatezexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| \textbf{address} replaced with \emph{cs1}.\textbf{address} $+$ \emph{imm}. | |
| If the resulting capability cannot be represented exactly, or if \emph{cs1} was | |
| sealed, then \emph{cd}.\textbf{tag} is cleared. The remaining capability fields are | |
| @@ -6380,7 +6403,8 @@ set to what the in-memory representation of \emph{cs1} with the address set to | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCIncOffsetImmediatezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetOffsetexecute}{\saildoclabelled{sailRISCVfclCSetOffsetzexecute}{\saildocfcl{Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCSetOffsetexecute}{\saildoclabelled{sailRISCVfclCSetOffsetzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| \textbf{address} replaced with \emph{cs1}.\textbf{base} $+$ \emph{rs2}. | |
| If the resulting capability cannot be represented exactly, or if \emph{cs1} was | |
| sealed, then \emph{cd}.\textbf{tag} is cleared. The remaining capability fields are | |
| @@ -6389,7 +6413,8 @@ set to what the in-memory representation of \emph{cs1} with the address set to | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetOffsetzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetAddrexecute}{\saildoclabelled{sailRISCVfclCSetAddrzexecute}{\saildocfcl{Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCSetAddrexecute}{\saildoclabelled{sailRISCVfclCSetAddrzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| \textbf{address} replaced with \emph{rs2}. | |
| If the resulting capability cannot be represented exactly, or if \emph{cs1} was | |
| sealed, then \emph{cd}.\textbf{tag} is cleared. The remaining capability fields are | |
| @@ -6398,7 +6423,8 @@ set to what the in-memory representation of \emph{cs1} with the address set to | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetAddrzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetBoundsexecute}{\saildoclabelled{sailRISCVfclCSetBoundszexecute}{\saildocfcl{Capability register \emph{cd} is set to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCSetBoundsexecute}{\saildoclabelled{sailRISCVfclCSetBoundszexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set to capability register \emph{cs1} with its | |
| \textbf{base} field replaced with \emph{cs1}.\textbf{address} and its \textbf{length} field | |
| replaced with integer register \emph{rs2}. If the resulting capability cannot be | |
| represented exactly the \textbf{base} will be rounded down and the \textbf{length} | |
| @@ -6409,7 +6435,8 @@ is cleared if the bounds of the result exceed the bounds of \emph{cs1}, or if | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetBoundszexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetBoundsImmediateexecute}{\saildoclabelled{sailRISCVfclCSetBoundsImmediatezexecute}{\saildocfcl{Capability register \emph{cd} is set to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCSetBoundsImmediateexecute}{\saildoclabelled{sailRISCVfclCSetBoundsImmediatezexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set to capability register \emph{cs1} with its | |
| \textbf{base} field replaced with \emph{cs1}.\textbf{address} and its \textbf{length} field | |
| replaced with \emph{uimm}. If the resulting capability cannot be represented | |
| exactly the \textbf{base} will be rounded down and the \textbf{length} will be rounded | |
| @@ -6419,7 +6446,8 @@ bounds of the result exceed the bounds of \emph{cs1}, or if \emph{cs1} was seale | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetBoundsImmediatezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSetBoundsExactexecute}{\saildoclabelled{sailRISCVfclCSetBoundsExactzexecute}{\saildocfcl{Capability register \emph{cd} is set to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCSetBoundsExactexecute}{\saildoclabelled{sailRISCVfclCSetBoundsExactzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set to capability register \emph{cs1} with its | |
| \textbf{base} field replaced with \emph{cs1}.\textbf{address} and its \textbf{length} field | |
| replaced with integer register \emph{rs2}. If the resulting capability cannot be | |
| represented exactly, the \textbf{tag} field will be cleared (unlike | |
| @@ -6431,55 +6459,54 @@ sealed. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSetBoundsExactzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCClearTagexecute}{\saildoclabelled{sailRISCVfclCClearTagzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of \emph{cs1}, with | |
| +\newcommand{\sailRISCVfclCClearTagexecute}{\saildoclabelled{sailRISCVfclCClearTagzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the contents of \emph{cs1}, with | |
| the \textbf{tag} field cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCClearTagzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCMoveexecute}{\saildoclabelled{sailRISCVfclCMovezexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of \emph{cs1}. | |
| +\newcommand{\sailRISCVfclCMoveexecute}{\saildoclabelled{sailRISCVfclCMovezexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the contents of \emph{cs1}. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCMovezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCClearexecute}{\saildoclabelled{sailRISCVfclCClearzexecute}{\saildocfcl{Capability registers 8 $\times$ \emph{q} $+$ \emph{i} are each set to \textbf{NULL} if the | |
| +\newcommand{\sailRISCVfclCClearexecute}{\saildoclabelled{sailRISCVfclCClearzexecute}{\saildocfcl{ | |
| +Capability registers 8 $\times$ \emph{q} $+$ \emph{i} are each set to \textbf{NULL} if the | |
| \emph{i}th bit of \emph{m} is set, with the exception that the 0th bit of \emph{m} refers | |
| to \textbf{DDC} when \emph{q} is 0, rather than \textbf{C0}. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is designed to accelerate the register clearing that is | |
| - required for secure domain transitions. It is expected that it can be | |
| - implemented efficiently in hardware using a single `valid' bit per | |
| - register that is cleared by this instruction and set on any subsequent | |
| - write to the register. | |
| - | |
| +required for secure domain transitions. It is expected that it can be | |
| +implemented efficiently in hardware using a single `valid' bit per | |
| +register that is cleared by this instruction and set on any subsequent | |
| +write to the register. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCClearzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclFPClearexecute}{\saildoclabelled{sailRISCVfclFPClearzexecute}{\saildocfcl{Floating-point registers 8 $\times$ \emph{q} $+$ \emph{i} are each set to 0 if the | |
| +\newcommand{\sailRISCVfclFPClearexecute}{\saildoclabelled{sailRISCVfclFPClearzexecute}{\saildocfcl{ | |
| +Floating-point registers 8 $\times$ \emph{q} $+$ \emph{i} are each set to 0 if the | |
| \emph{i}th bit of \emph{m} is set. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is designed to accelerate the register clearing that is | |
| - required for secure domain transitions. It is expected that it can be | |
| - implemented efficiently in hardware using a single `valid' bit per | |
| - register that is cleared by this instruction and set on any subsequent | |
| - write to the register. | |
| - | |
| +required for secure domain transitions. It is expected that it can be | |
| +implemented efficiently in hardware using a single `valid' bit per | |
| +register that is cleared by this instruction and set on any subsequent | |
| +write to the register. | |
| \item The 0 value written is FLEN bits wide, the largest supported by the | |
| - implementation, such that the in-memory representation of the register is | |
| - 0, rather than a NaN-boxed narrower value. | |
| - | |
| - | |
| +implementation, such that the in-memory representation of the register is | |
| +0, rather than a NaN-boxed narrower value. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclFPClearzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCFromPtrexecute}{\saildoclabelled{sailRISCVfclCFromPtrzexecute}{\saildocfcl{If the value of integer register \emph{rs2} is 0 then capability register \emph{cd} is | |
| +\newcommand{\sailRISCVfclCFromPtrexecute}{\saildoclabelled{sailRISCVfclCFromPtrzexecute}{\saildocfcl{ | |
| +If the value of integer register \emph{rs2} is 0 then capability register \emph{cd} is | |
| set to \textbf{NULL}. Otherwise capability register \emph{cd} is set to capability | |
| register \emph{cs1} with its \textbf{offset} replaced with \emph{rs2}. If the resulting | |
| capability cannot be represented exactly, or if \emph{cs1} was sealed, then | |
| @@ -6489,7 +6516,8 @@ decodes to. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCFromPtrzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCBuildCapexecute}{\saildoclabelled{sailRISCVfclCBuildCapzexecute}{\saildocfcl{Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| +\newcommand{\sailRISCVfclCBuildCapexecute}{\saildoclabelled{sailRISCVfclCBuildCapzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is set equal to capability register \emph{cs1} with its | |
| \textbf{base}, \textbf{length}, \textbf{address}, \textbf{perms}, \textbf{uperms} and \textbf{flags} | |
| replaced with the corresponding fields in capability register \emph{cs2}. If | |
| \emph{cs2} is a sentry then \emph{cd} is also sealed as a sentry. If the resulting | |
| @@ -6498,80 +6526,79 @@ legally derivable capability, or if \emph{cs1} did not have its \textbf{tag} fie | |
| set, or if \emph{cs1} was sealed, \emph{cd} is replaced with \emph{cs2} with its \textbf{tag} | |
| field cleared. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item Implementations may instead choose to set \emph{cd} to \emph{cs2} with its \textbf{tag} | |
| - set after performing all checks, but the specification derives the result | |
| - from \emph{cs1} in order to convey the provenance associated with this | |
| - operation. | |
| - | |
| +set after performing all checks, but the specification derives the result | |
| +from \emph{cs1} in order to convey the provenance associated with this | |
| +operation. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCBuildCapzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCCopyTypeexecute}{\saildoclabelled{sailRISCVfclCCopyTypezexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability | |
| +\newcommand{\sailRISCVfclCCopyTypeexecute}{\saildoclabelled{sailRISCVfclCCopyTypezexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the contents of capability | |
| register \emph{cs1} with the \textbf{address} set to \emph{cs2}.\textbf{otype} and the | |
| \textbf{tag} field cleared if \emph{cs2} has a reserved \textbf{otype} or if \emph{cs1} | |
| was sealed. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item Reserved otypes always result in untagged capabilities, as, at the | |
| - moment, all reserved otypes are constructed using ambiently-available | |
| - actions. \hyperref[sailRISCVzCCSeal]{\lstinline{CCSeal}} knows how to work with these. | |
| - | |
| +moment, all reserved otypes are constructed using ambiently-available | |
| +actions. \hyperref[sailRISCVzCCSeal]{\lstinline{CCSeal}} knows how to work with these. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCCopyTypezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCRRLexecute}{\saildoclabelled{sailRISCVfclCRRLzexecute}{\saildocfcl{Integer register \emph{rd} is set to the smallest value greater or equal to \emph{rs1} | |
| +\newcommand{\sailRISCVfclCRRLexecute}{\saildoclabelled{sailRISCVfclCRRLzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set to the smallest value greater or equal to \emph{rs1} | |
| that can be used as a length to set exact bounds on a capability that has a | |
| suitably aligned base (as obtained with the help of \hyperref[sailRISCVzCRAM]{\lstinline{CRAM}}). | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCRRLzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCRAMexecute}{\saildoclabelled{sailRISCVfclCRAMzexecute}{\saildocfcl{Integer register \emph{rd} is set to a mask that can be used to round addresses | |
| +\newcommand{\sailRISCVfclCRAMexecute}{\saildoclabelled{sailRISCVfclCRAMzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set to a mask that can be used to round addresses | |
| down to to a value that is sufficiently aligned to set exact bounds for the | |
| nearest representable length of \emph{rs1} (as obtained by \hyperref[sailRISCVzCRRL]{\lstinline{CRRL}}). | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCRAMzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCTestSubsetexecute}{\saildoclabelled{sailRISCVfclCTestSubsetzexecute}{\saildocfcl{Integer register \emph{rd} is set to 1 if the \textbf{tag} fields of capability | |
| +\newcommand{\sailRISCVfclCTestSubsetexecute}{\saildoclabelled{sailRISCVfclCTestSubsetzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set to 1 if the \textbf{tag} fields of capability | |
| registers \emph{cs1} and \emph{cs2} are the same and the bounds and permissions of | |
| \emph{cs2} are a subset of those of \emph{cs1}. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item The operand order for this instruction is reversed compared with the | |
| - normal RISC-V comparison instructions, but this may be changed in future. | |
| - | |
| +normal RISC-V comparison instructions, but this may be changed in future. | |
| \item The \textbf{otype} field is ignored for this instruction, but an alternative | |
| - implementation might wish to consider capabilities with distinct | |
| - \textbf{otype}s as unordered as is done for the \textbf{tag} field. | |
| - | |
| - | |
| +implementation might wish to consider capabilities with distinct | |
| +\textbf{otype}s as unordered as is done for the \textbf{tag} field. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCTestSubsetzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSEQXexecute}{\saildoclabelled{sailRISCVfclCSEQXzexecute}{\saildocfcl{Integer register \emph{rd} is set to 1 if the \textbf{tag} fields and in-memory | |
| +\newcommand{\sailRISCVfclCSEQXexecute}{\saildoclabelled{sailRISCVfclCSEQXzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is set to 1 if the \textbf{tag} fields and in-memory | |
| representations of capability registers \emph{cs1} and \emph{cs2} are identical, | |
| including any reserved encoding bits, otherwise it is set to 0. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSEQXzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSealexecute}{\saildoclabelled{sailRISCVfclCSealzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with capability register \emph{cs1}, and is | |
| +\newcommand{\sailRISCVfclCSealexecute}{\saildoclabelled{sailRISCVfclCSealzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with capability register \emph{cs1}, and is | |
| sealed with \textbf{otype} equal to the \textbf{address} field of capability register | |
| \emph{cs2}. If \emph{cs2} is unable to authorize the sealing, or if \emph{cs1} was already | |
| sealed, then the \textbf{tag} field of \emph{cd} is cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSealzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCCSealexecute}{\saildoclabelled{sailRISCVfclCCSealzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with capability register \emph{cs1}, and is | |
| +\newcommand{\sailRISCVfclCCSealexecute}{\saildoclabelled{sailRISCVfclCCSealzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with capability register \emph{cs1}, and is | |
| conditionally sealed with \textbf{otype} equal to the \textbf{address} field of | |
| capability register \emph{cs2}. The conditions under which the input is passed | |
| through unaltered are intended to permit a fast branchless rederivation | |
| @@ -6580,40 +6607,35 @@ set of \hyperref[sailRISCVzCCopyType]{\lstinline{CCopyType}} and \hyperref[sailR | |
| disk. Other than these conditions, if \emph{cs2} is unable to authorize the | |
| sealing, the \textbf{tag} field of \emph{cd} is cleared. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item The intent is that this is used for rederiving swapped-out capabilities, | |
| - so the expectation is that this whole sequence is guarded by a check on | |
| - whether the \textbf{tag} field of the capability was valid. | |
| - | |
| +so the expectation is that this whole sequence is guarded by a check on | |
| +whether the \textbf{tag} field of the capability was valid. | |
| \item If the input to be conditionally sealed is already sealed it is passed | |
| - through before any futher checks are made. This allows multiple \hyperref[sailRISCVzCCSeal]{\lstinline{CCSeal}}s | |
| - in a chain, any of which can be the one to seal the initial input. The | |
| - intent is that all of these \hyperref[sailRISCVzCCSeal]{\lstinline{CCSeal}}s' authorities will have been produced | |
| - by \hyperref[sailRISCVzCCopyType]{\lstinline{CCopyType}}s of the same input (i.e., they will all attempt to seal to | |
| - the same type), but that's not, strictly, required. Sealed capabilities | |
| - with a reserved \textbf{otype} are also constructed directly by \hyperref[sailRISCVzCBuildCap]{\lstinline{CBuildCap}}. | |
| - | |
| +through before any futher checks are made. This allows multiple \hyperref[sailRISCVzCCSeal]{\lstinline{CCSeal}}s | |
| +in a chain, any of which can be the one to seal the initial input. The | |
| +intent is that all of these \hyperref[sailRISCVzCCSeal]{\lstinline{CCSeal}}s' authorities will have been produced | |
| +by \hyperref[sailRISCVzCCopyType]{\lstinline{CCopyType}}s of the same input (i.e., they will all attempt to seal to | |
| +the same type), but that's not, strictly, required. Sealed capabilities | |
| +with a reserved \textbf{otype} are also constructed directly by \hyperref[sailRISCVzCBuildCap]{\lstinline{CBuildCap}}. | |
| \item To avoid the need to branch on whether the original capability was sealed, | |
| - attempts to seal with the reserved unsealed \textbf{otype} will leave the | |
| - capability unmodified rather than trap. | |
| - | |
| +attempts to seal with the reserved unsealed \textbf{otype} will leave the | |
| +capability unmodified rather than trap. | |
| \item To avoid the need to check which is the correct authority, any sealing | |
| - request where the \textbf{address} of capability register \emph{cs2} is out of | |
| - bounds will leave the capability unmodified rather than trap, as will | |
| - attempts to seal with an invalid capability since it may have become | |
| - unrepresentable but be within its reinterpreted bounds. | |
| - | |
| - | |
| +request where the \textbf{address} of capability register \emph{cs2} is out of | |
| +bounds will leave the capability unmodified rather than trap, as will | |
| +attempts to seal with an invalid capability since it may have become | |
| +unrepresentable but be within its reinterpreted bounds. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCCSealzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnsealexecute}{\saildoclabelled{sailRISCVfclCUnsealzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with capability register \emph{cs1} and is | |
| +\newcommand{\sailRISCVfclCUnsealexecute}{\saildoclabelled{sailRISCVfclCUnsealzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with capability register \emph{cs1} and is | |
| unsealed, using capability register \emph{cs2} as the authority for the unsealing | |
| operation. If \emph{cs2}.\textbf{perms} does not grant \textbf{Global} then \emph{cd}.\textbf{perms} | |
| is stripped of \textbf{Global}. If \emph{cs2} is unable to authorize the unsealing, | |
| @@ -6621,12 +6643,14 @@ the \textbf{tag} field of \emph{cd} is cleared. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnsealzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCSealEntryexecute}{\saildoclabelled{sailRISCVfclCSealEntryzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with capability register \emph{cs1} and | |
| +\newcommand{\sailRISCVfclCSealEntryexecute}{\saildoclabelled{sailRISCVfclCSealEntryzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with capability register \emph{cs1} and | |
| sealed as a sentry. | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCSealEntryzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCInvokeexecute}{\saildoclabelled{sailRISCVfclCInvokezexecute}{\saildocfcl{\textbf{PCC} is set equal to capability register \emph{cs1} and unsealed with the 0th | |
| +\newcommand{\sailRISCVfclCInvokeexecute}{\saildoclabelled{sailRISCVfclCInvokezexecute}{\saildocfcl{ | |
| +\textbf{PCC} is set equal to capability register \emph{cs1} and unsealed with the 0th | |
| bit of its \textbf{address} set to 0, whilst \textbf{C31} is set equal to capability | |
| register \emph{cs2} and unsealed. This provides a constrained form of | |
| non-monotonicity, allowing for fast jumps between protection domains, with | |
| @@ -6634,162 +6658,145 @@ non-monotonicity, allowing for fast jumps between protection domains, with | |
| domain's data. The capabilities must have a matching \textbf{otype} to ensure the | |
| right data is provided for the given jump target. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs2}.\textbf{tag} is not set. | |
| \item \emph{cs1}.\textbf{otype} is reserved. | |
| \item \emph{cs2}.\textbf{otype} is reserved. | |
| \item \emph{cs1}.\textbf{otype} $\ne$ \emph{cs2}.\textbf{otype}. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_CInvoke}. | |
| -\item \emph{cs2}.\textbf{perms} does not grant \textbf{Permit\_CInvoke}. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Execute}. | |
| -\item \emph{cs2}.\textbf{perms} grants \textbf{Permit\_Execute}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_CInvoke}. | |
| +\item \emph{cs2}.\textbf{perms} does not grant \textbf{Permit_CInvoke}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Execute}. | |
| +\item \emph{cs2}.\textbf{perms} grants \textbf{Permit_Execute}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| -\item \emph{cs1}.\textbf{address} $+$ min\_instruction\_bytes $\gt$ \emph{cs1}.\textbf{top}. | |
| +\item \emph{cs1}.\textbf{address} $+$ min_instruction_bytes $\gt$ \emph{cs1}.\textbf{top}. | |
| \item \emph{cs1}.\textbf{base} is unaligned (only possible if PCC relocation is enabled). | |
| \item \emph{cs1}.\textbf{address} is unaligned, ignoring bit 0. | |
| \end{itemize} | |
| - | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item From the point of view of security, this needs to be an atomic operation | |
| - (i.e. the caller cannot decide to just do some of it, because partial | |
| - execution could put the system into an insecure state). From a hardware | |
| - perspective, more complex domain-transition implementations (e.g., to | |
| - implement function-call semantics or message passing) may need to perform | |
| - multiple memory reads and writes, which might take multiple cycles and | |
| - complicate control logic. | |
| - | |
| +(i.e. the caller cannot decide to just do some of it, because partial | |
| +execution could put the system into an insecure state). From a hardware | |
| +perspective, more complex domain-transition implementations (e.g., to | |
| +implement function-call semantics or message passing) may need to perform | |
| +multiple memory reads and writes, which might take multiple cycles and | |
| +complicate control logic. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCInvokezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclJALRUnderscoreCAPexecute}{\saildoclabelled{sailRISCVfclJALRUnderscoreCAPzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the next instruction's \textbf{PCC} and | |
| +\newcommand{\sailRISCVfclJALRUnderscoreCAPexecute}{\saildoclabelled{sailRISCVfclJALRUnderscoreCAPzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the next instruction's \textbf{PCC} and | |
| sealed as a sentry. \textbf{PCC} is replaced with the value of capability | |
| register \emph{cs1} with the 0th bit of its \textbf{address} set to 0 and is unsealed | |
| if it is a sentry. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed and is not a sentry. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Execute}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Execute}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| -\item \emph{cs1}.\textbf{address} $+$ min\_instruction\_bytes $\gt$ \emph{cs1}.\textbf{top}. | |
| +\item \emph{cs1}.\textbf{address} $+$ min_instruction_bytes $\gt$ \emph{cs1}.\textbf{top}. | |
| \item \emph{cs1}.\textbf{base} is unaligned (only possible if PCC relocation is enabled). | |
| \item \emph{cs1}.\textbf{address} is unaligned, ignoring bit 0. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclJALRUnderscoreCAPzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclJALRUnderscorePCCexecute}{\saildoclabelled{sailRISCVfclJALRUnderscorePCCzexecute}{\saildocfcl{Integer register \emph{rd} is replaced with the next instruction's | |
| +\newcommand{\sailRISCVfclJALRUnderscorePCCexecute}{\saildoclabelled{sailRISCVfclJALRUnderscorePCCzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is replaced with the next instruction's | |
| \textbf{PCC}.\textbf{offset}. \textbf{PCC}.\textbf{offset} is replaced with the value of | |
| register \emph{rs1} with the 0th bit set to 0. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{PCC}.\textbf{address} $+$ \emph{rs1} $\lt$ \textbf{PCC}.\textbf{base}. | |
| -\item \textbf{PCC}.\textbf{address} $+$ \emph{rs1} $+$ min\_instruction\_bytes $\gt$ \textbf{PCC}.\textbf{top}. | |
| +\item \textbf{PCC}.\textbf{address} $+$ \emph{rs1} $+$ min_instruction_bytes $\gt$ \textbf{PCC}.\textbf{top}. | |
| \item \textbf{PCC}.\textbf{address} $+$ \emph{rs1} is unaligned, ignoring bit 0. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclJALRUnderscorePCCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclLoadDataDDCexecute}{\saildoclabelled{sailRISCVfclLoadDataDDCzexecute}{\saildocfcl{Integer register \emph{rd} is replaced with the signed or unsigned byte, | |
| +\newcommand{\sailRISCVfclLoadDataDDCexecute}{\saildoclabelled{sailRISCVfclLoadDataDDCzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is replaced with the signed or unsigned byte, | |
| halfword, word or doubleword located in memory at \textbf{DDC}.\textbf{address} $+$ | |
| \emph{rs1}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{DDC}.\textbf{tag} is not set. | |
| \item \textbf{DDC} is sealed. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Load}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Load}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $\lt$ \textbf{DDC}.\textbf{base}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{size} $\gt$ \textbf{DDC}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadDataDDCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclLoadDataCapexecute}{\saildoclabelled{sailRISCVfclLoadDataCapzexecute}{\saildocfcl{Integer register \emph{rd} is replaced with the signed or unsigned byte, | |
| +\newcommand{\sailRISCVfclLoadDataCapexecute}{\saildoclabelled{sailRISCVfclLoadDataCapzexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is replaced with the signed or unsigned byte, | |
| halfword, word or doubleword located in memory at \emph{cs1}.\textbf{address}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Load}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Load}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{size} $\gt$ \emph{cs1}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadDataCapzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclLoadCapDDCexecute}{\saildoclabelled{sailRISCVfclLoadCapDDCzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the capability located in memory | |
| +\newcommand{\sailRISCVfclLoadCapDDCexecute}{\saildoclabelled{sailRISCVfclLoadCapDDCzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the capability located in memory | |
| at \textbf{DDC}.\textbf{address} $+$ \emph{rs1}, and if \textbf{DDC}.\textbf{perms} does not grant | |
| -\textbf{Permit\_Load\_Capability} then \emph{cd}.\textbf{tag} is cleared. | |
| - | |
| -\subsection*{Exceptions} | |
| - | |
| +\textbf{Permit_Load_Capability} then \emph{cd}.\textbf{tag} is cleared. | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{DDC}.\textbf{tag} is not set. | |
| \item \textbf{DDC} is sealed. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Load}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Load}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $\lt$ \textbf{DDC}.\textbf{base}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \textbf{CLEN} $/$ 8 $\gt$ \textbf{DDC}.\textbf{top}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} is unaligned, regardless of whether the | |
| - implementation supports unaligned data accesses. | |
| - | |
| +implementation supports unaligned data accesses. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadCapDDCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclLoadCapCapexecute}{\saildoclabelled{sailRISCVfclLoadCapCapzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the capability located in memory | |
| +\newcommand{\sailRISCVfclLoadCapCapexecute}{\saildoclabelled{sailRISCVfclLoadCapCapzexecute}{\saildocfcl{ | |
| +Capability register \emph{cd} is replaced with the capability located in memory | |
| at \emph{cs1}.\textbf{address}, and if \emph{cs1}.\textbf{perms} does not grant | |
| -\textbf{Permit\_Load\_Capability} then \emph{cd}.\textbf{tag} is cleared. | |
| - | |
| -\subsection*{Exceptions} | |
| - | |
| +\textbf{Permit_Load_Capability} then \emph{cd}.\textbf{tag} is cleared. | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Load}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Load}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \textbf{CLEN} $/$ 8 $\gt$ \emph{cs1}.\textbf{top}. | |
| \item \emph{cs1}.\textbf{address} is unaligned, regardless of whether the implementation | |
| - supports unaligned data accesses. | |
| - | |
| +supports unaligned data accesses. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadCapCapzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCLoadTagsexecute}{\saildoclabelled{sailRISCVfclCLoadTagszexecute}{\saildocfcl{Integer register \emph{rd} is replaced with the tags of the capabilities located | |
| +\newcommand{\sailRISCVfclCLoadTagsexecute}{\saildoclabelled{sailRISCVfclCLoadTagszexecute}{\saildocfcl{ | |
| +Integer register \emph{rd} is replaced with the tags of the capabilities located | |
| in memory at and above \emph{cs1}.\textbf{address}. The 0th bit corresponds to the | |
| first capability in memory. The result is coherent with other processors, as | |
| if the corresponding data words had also been loaded. The number of tags | |
| @@ -6798,52 +6805,42 @@ return the tags held in an L1 cache line, and so we use the constant | |
| \hyperref[sailRISCVzcapszyperzycachezyline]{\lstinline{caps_per_cache_line}}. The number of tags loaded must be a power of two, at | |
| least 1, and no more than \textbf{XLEN}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant both \textbf{Permit\_Load} and | |
| - \textbf{Permit\_Load\_Capability}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant both \textbf{Permit_Load} and | |
| +\textbf{Permit_Load_Capability}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \hyperref[sailRISCVzcapszyperzycachezyline]{\lstinline{caps_per_cache_line}} $\times$ \textbf{CLEN} $/$ 8 | |
| - $\gt$ \emph{cs1}.\textbf{top}. | |
| +$\gt$ \emph{cs1}.\textbf{top}. | |
| \item \emph{cs1}.\textbf{address} is unaligned. | |
| \item The page table entry for \emph{cs1}.\textbf{address} would cause the tag to be | |
| - cleared. | |
| +cleared. | |
| \end{itemize} | |
| - | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item In order to reduce DRAM traffic, implementations may choose to load only | |
| - the tags and not the corresponding data, and may wish to not evict other | |
| - cache lines by treating it as a non-temporal/streaming load. | |
| - | |
| +the tags and not the corresponding data, and may wish to not evict other | |
| +cache lines by treating it as a non-temporal/streaming load. | |
| \item Software can easily discover the number of tags loaded by an | |
| - implementation by storing a series of \textbf{XLEN} capabilities to an aligned | |
| - array and performing a \hyperref[sailRISCVzCLoadTags]{\lstinline{CLoadTags}} operation. This need only be done once. | |
| - | |
| +implementation by storing a series of \textbf{XLEN} capabilities to an aligned | |
| +array and performing a \hyperref[sailRISCVzCLoadTags]{\lstinline{CLoadTags}} operation. This need only be done once. | |
| \item For heterogeneous multi-core or multi-processor systems, all cores must | |
| - return the same number of tags, which will often be based on the smallest | |
| - cache line size in the system. | |
| - | |
| - | |
| -\item Unlike \hyperref[sailRISCVzLoadCapImm]{CLC}, this instruction traps if tags will always be | |
| - unset due to lacking \textbf{Permit\_Load\_Capability} or page table entry | |
| - permissions, since that is likely indicative of a software bug that could | |
| - lead to temporal safety vulnerabilities if capabilities are erroneously | |
| - missed. | |
| - | |
| - | |
| +return the same number of tags, which will often be based on the smallest | |
| +cache line size in the system. | |
| + | |
| +\item Unlike \hyperref[sailRISCVzLoadCapImm]{\lstinline{CLC}}, this instruction traps if tags will always be | |
| +unset due to lacking \textbf{Permit_Load_Capability} or page table entry | |
| +permissions, since that is likely indicative of a software bug that could | |
| +lead to temporal safety vulnerabilities if capabilities are erroneously | |
| +missed. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCLoadTagszexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| \newcommand{\sailRISCVfclLoadResDataDDCexecute}{\saildoclabelled{sailRISCVfclLoadResDataDDCzexecute}{\saildocfcl{}{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadResDataDDCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| @@ -6856,163 +6853,147 @@ An exception is raised if: | |
| \newcommand{\sailRISCVfclLoadResCapModeexecute}{\saildoclabelled{sailRISCVfclLoadResCapModezexecute}{\saildocfcl{}{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadResCapModezexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclStoreDataDDCexecute}{\saildoclabelled{sailRISCVfclStoreDataDDCzexecute}{\saildocfcl{The byte, halfword, word or doubleword located in memory at | |
| +\newcommand{\sailRISCVfclStoreDataDDCexecute}{\saildoclabelled{sailRISCVfclStoreDataDDCzexecute}{\saildocfcl{ | |
| +The byte, halfword, word or doubleword located in memory at | |
| \textbf{DDC}.\textbf{address} $+$ \emph{rs1} is replaced with integer register \emph{rs2}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{DDC}.\textbf{tag} is not set. | |
| \item \textbf{DDC} is sealed. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $\lt$ \textbf{DDC}.\textbf{base}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{size} $\gt$ \textbf{DDC}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclStoreDataDDCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclStoreDataCapexecute}{\saildoclabelled{sailRISCVfclStoreDataCapzexecute}{\saildocfcl{The byte, halfword, word or doubleword located in memory at | |
| +\newcommand{\sailRISCVfclStoreDataCapexecute}{\saildoclabelled{sailRISCVfclStoreDataCapzexecute}{\saildocfcl{ | |
| +The byte, halfword, word or doubleword located in memory at | |
| \emph{cs1}.\textbf{address} is replaced with integer register \emph{rs2}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{size} $\gt$ \emph{cs1}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclStoreDataCapzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclStoreCapDDCexecute}{\saildoclabelled{sailRISCVfclStoreCapDDCzexecute}{\saildocfcl{The capability located in memory at \textbf{DDC}.\textbf{address} $+$ \emph{rs1} is | |
| +\newcommand{\sailRISCVfclStoreCapDDCexecute}{\saildoclabelled{sailRISCVfclStoreCapDDCzexecute}{\saildocfcl{ | |
| +The capability located in memory at \textbf{DDC}.\textbf{address} $+$ \emph{rs1} is | |
| replaced with capability register \emph{cs2}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{DDC}.\textbf{tag} is not set. | |
| \item \textbf{DDC} is sealed. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store}. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store\_Capability} and | |
| - \emph{cs2}.\textbf{tag} is set. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store\_Local\_Capability}, | |
| - \emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store_Capability} and | |
| +\emph{cs2}.\textbf{tag} is set. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store_Local_Capability}, | |
| +\emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $\lt$ \textbf{DDC}.\textbf{base}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \textbf{CLEN} $/$ 8 $\gt$ \textbf{DDC}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclStoreCapDDCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclStoreCapCapexecute}{\saildoclabelled{sailRISCVfclStoreCapCapzexecute}{\saildocfcl{The capability located in memory at \emph{cs1}.\textbf{address} is replaced with | |
| +\newcommand{\sailRISCVfclStoreCapCapexecute}{\saildoclabelled{sailRISCVfclStoreCapCapzexecute}{\saildocfcl{ | |
| +The capability located in memory at \emph{cs1}.\textbf{address} is replaced with | |
| capability register \emph{cs2}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| An exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store}. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store\_Capability} and | |
| - \emph{cs2}.\textbf{tag} is set. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store\_Local\_Capability}, | |
| - \emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store_Capability} and | |
| +\emph{cs2}.\textbf{tag} is set. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store_Local_Capability}, | |
| +\emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| \item \emph{cs1}.\textbf{address} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \textbf{CLEN} $\gt$ \emph{cs1}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclStoreCapCapzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclLoadCapImmexecute}{\saildoclabelled{sailRISCVfclLoadCapImmzexecute}{\saildocfcl{In integer mode, capability register \emph{cd} is replaced with the capability | |
| +\newcommand{\sailRISCVfclLoadCapImmexecute}{\saildoclabelled{sailRISCVfclLoadCapImmzexecute}{\saildocfcl{ | |
| +In integer mode, capability register \emph{cd} is replaced with the capability | |
| located in memory at \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{imm}, and if | |
| -\textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Load\_Capability} then | |
| +\textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Load_Capability} then | |
| \emph{cd}.\textbf{tag} is cleared. In capability mode, capability register \emph{cd} is | |
| replaced with the capability located in memory at \emph{cs1}.\textbf{address} $+$ | |
| -\emph{imm}, and if \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Load\_Capability} then | |
| +\emph{imm}, and if \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Load_Capability} then | |
| \emph{cd}.\textbf{tag} is cleared. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| In integer mode, an exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{DDC}.\textbf{tag} is not set. | |
| \item \textbf{DDC} is sealed. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Load}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Load}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{imm} $\lt$ \textbf{DDC}.\textbf{base}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{imm} $+$ \textbf{CLEN} $/$ 8 $\gt$ | |
| - \textbf{DDC}.\textbf{top}. | |
| +\textbf{DDC}.\textbf{top}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{imm} is unaligned, regardless of | |
| - whether the implementation supports unaligned data accesses. | |
| +whether the implementation supports unaligned data accesses. | |
| \end{itemize} | |
| - | |
| In capability mode, an exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Load}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Load}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} $+$ \textbf{CLEN} $/$ 8 $\gt$ \emph{cs1}.\textbf{top}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} is unaligned, regardless of whether the | |
| - implementation supports unaligned data accesses. | |
| - | |
| +implementation supports unaligned data accesses. | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclLoadCapImmzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclStoreCapImmexecute}{\saildoclabelled{sailRISCVfclStoreCapImmzexecute}{\saildocfcl{In integer mode, the capability located in memory at \textbf{DDC}.\textbf{address} $+$ | |
| +\newcommand{\sailRISCVfclStoreCapImmexecute}{\saildoclabelled{sailRISCVfclStoreCapImmzexecute}{\saildocfcl{ | |
| +In integer mode, the capability located in memory at \textbf{DDC}.\textbf{address} $+$ | |
| \emph{rs1} $+$ \emph{imm} is replaced with capability register \emph{cs2}. In capability | |
| mode, the capability located in memory at \emph{cs1}.\textbf{address} $+$ \emph{imm} is | |
| replaced with capability register \emph{cs2}. | |
| -\subsection*{Exceptions} | |
| - | |
| - | |
| +\subsection*{Exceptions\n | |
| In integer mode, an exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \textbf{DDC}.\textbf{tag} is not set. | |
| \item \textbf{DDC} is sealed. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store}. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store\_Capability} and | |
| - \emph{cs2}.\textbf{tag} is set. | |
| -\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit\_Store\_Local\_Capability}, | |
| - \emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store}. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store_Capability} and | |
| +\emph{cs2}.\textbf{tag} is set. | |
| +\item \textbf{DDC}.\textbf{perms} does not grant \textbf{Permit_Store_Local_Capability}, | |
| +\emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{imm} $\lt$ \textbf{DDC}.\textbf{base}. | |
| \item \textbf{DDC}.\textbf{address} $+$ \emph{rs1} $+$ \emph{imm} $+$ \textbf{CLEN} $/$ 8 $\gt$ | |
| - \textbf{DDC}.\textbf{top}. | |
| +\textbf{DDC}.\textbf{top}. | |
| \end{itemize} | |
| - | |
| In capability mode, an exception is raised if: | |
| - | |
| \begin{itemize} | |
| \item \emph{cs1}.\textbf{tag} is not set. | |
| \item \emph{cs1} is sealed. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store}. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store\_Capability} and | |
| - \emph{cs2}.\textbf{tag} is set. | |
| -\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit\_Store\_Local\_Capability}, | |
| - \emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store}. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store_Capability} and | |
| +\emph{cs2}.\textbf{tag} is set. | |
| +\item \emph{cs1}.\textbf{perms} does not grant \textbf{Permit_Store_Local_Capability}, | |
| +\emph{cs2}.\textbf{tag} is set and \emph{cs2}.\textbf{perms} does not grant \textbf{Global}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} $\lt$ \emph{cs1}.\textbf{base}. | |
| \item \emph{cs1}.\textbf{address} $+$ \emph{imm} $+$ \textbf{CLEN} $/$ 8 $\gt$ \emph{cs1}.\textbf{top}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclStoreCapImmzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| \newcommand{\sailRISCVfclStoreCondDataDDCexecute}{\saildoclabelled{sailRISCVfclStoreCondDataDDCzexecute}{\saildocfcl{}{\lstinputlisting[language=sail]{sail_latex_riscv/fclStoreCondDataDDCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| @@ -7027,120 +7008,111 @@ In capability mode, an exception is raised if: | |
| \newcommand{\sailRISCVfclAMOSwapCapexecute}{\saildoclabelled{sailRISCVfclAMOSwapCapzexecute}{\saildocfcl{}{\lstinputlisting[language=sail]{sail_latex_riscv/fclAMOSwapCapzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCLCexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCLCzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzLoadCapImm]{CLC}. | |
| - | |
| -\subsection*{Notes} | |
| - | |
| +\newcommand{\sailRISCVfclCUnderscoreCLCexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCLCzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzLoadCapImm]{\lstinline{CLC}}. | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item For RV32 this replaces the encoding of \hyperref[sailRISCVzCzEFLW]{\lstinline{C.FLW}}, RV64 uses \hyperref[sailRISCVzCzEFLD]{\lstinline{C.FLD}}. | |
| - | |
| \end{itemize} | |
| -}{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCLCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCLCSPexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCLCSPzexecute}{\saildocfcl{Compressed 16-bit encoding for a stack-pointer-relative \hyperref[sailRISCVzLoadCapImm]{CLC}. | |
| - | |
| -\subsection*{Notes} | |
| +}{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCLCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| +\newcommand{\sailRISCVfclCUnderscoreCLCSPexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCLCSPzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for a stack-pointer-relative \hyperref[sailRISCVzLoadCapImm]{\lstinline{CLC}}. | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item For RV32 this replaces the encoding of \hyperref[sailRISCVzCzEFLWSP]{\lstinline{C.FLWSP}}, RV64 uses \hyperref[sailRISCVzCzEFLDSP]{\lstinline{C.FLDSP}}. | |
| \item The encoding with \lstinline`cd == 0` is reserved and will raise an illegal | |
| - instruction trap. | |
| - | |
| +instruction trap. | |
| \end{itemize} | |
| -}{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCLCSPzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| - | |
| -\newcommand{\sailRISCVfclCUnderscoreCSCexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCSCzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzStoreCapImm]{CSC}. | |
| -\subsection*{Notes} | |
| +}{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCLCSPzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| +\newcommand{\sailRISCVfclCUnderscoreCSCexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCSCzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzStoreCapImm]{\lstinline{CSC}}. | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item For RV32 this replaces the encoding of \hyperref[sailRISCVzCzEFSW]{\lstinline{C.FSW}}, RV64 uses \hyperref[sailRISCVzCzEFSD]{\lstinline{C.FSD}}. | |
| - | |
| \end{itemize} | |
| -}{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCSCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| - | |
| -\newcommand{\sailRISCVfclCUnderscoreCSCSPexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCSCSPzexecute}{\saildocfcl{Compressed 16-bit encoding for a stack-pointer-relative \hyperref[sailRISCVzStoreCapImm]{CSC}. | |
| -\subsection*{Notes} | |
| +}{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCSCzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| +\newcommand{\sailRISCVfclCUnderscoreCSCSPexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCSCSPzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for a stack-pointer-relative \hyperref[sailRISCVzStoreCapImm]{\lstinline{CSC}}. | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item For RV32 this replaces the encoding of \hyperref[sailRISCVzCzEFSWSP]{\lstinline{C.FSWSP}}, RV64 uses \hyperref[sailRISCVzCzEFSDSP]{\lstinline{C.FSDSP}}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCSCSPzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCIncOffsetOneSixCSPexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCIncOffsetOneSixCSPzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzCIncOffsetImmediate]{\lstinline{CIncOffsetImmediate}} with source and | |
| +\newcommand{\sailRISCVfclCUnderscoreCIncOffsetOneSixCSPexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCIncOffsetOneSixCSPzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzCIncOffsetImmediate]{\lstinline{CIncOffsetImmediate}} with source and | |
| destination registers set to \lstinline`csp` and an immediate scaled by 16. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item This instruction replaces the encoding of \hyperref[sailRISCVzCzEADDI16SP]{\lstinline{C.ADDI16SP}}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCIncOffsetOneSixCSPzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCIncOffsetFourCSPNexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCIncOffsetFourCSPNzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzCIncOffsetImmediate]{\lstinline{CIncOffsetImmediate}} with the source register | |
| +\newcommand{\sailRISCVfclCUnderscoreCIncOffsetFourCSPNexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCIncOffsetFourCSPNzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzCIncOffsetImmediate]{\lstinline{CIncOffsetImmediate}} with the source register | |
| set to \lstinline`csp` and an immediate scaled by 4. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item This instruction replaces the encoding of \hyperref[sailRISCVzCzEADDI4SPN]{\lstinline{C.ADDI4SPN}}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCIncOffsetFourCSPNzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCJALRexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCJALRzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzCJALR]{\lstinline{CJALR}} with the destination register set | |
| +\newcommand{\sailRISCVfclCUnderscoreCJALRexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCJALRzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzCJALR]{\lstinline{CJALR}} with the destination register set | |
| to \lstinline`cra`. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item This instruction replaces the encoding of \hyperref[sailRISCVzCzEJALR]{\lstinline{C.JALR}}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCJALRzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCJRexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCJRzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzCJALR]{\lstinline{CJALR}} with the source register set to | |
| +\newcommand{\sailRISCVfclCUnderscoreCJRexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCJRzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzCJALR]{\lstinline{CJALR}} with the source register set to | |
| \lstinline`cnull` and destination register set to \lstinline`cra`. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item This instruction replaces the encoding of \hyperref[sailRISCVzCzEJR]{\lstinline{C.JR}}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCJRzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| -\newcommand{\sailRISCVfclCUnderscoreCJALexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCJALzexecute}{\saildocfcl{Compressed 16-bit encoding for \hyperref[sailRISCVzCJAL]{\lstinline{CJAL}} with the destination register set | |
| +\newcommand{\sailRISCVfclCUnderscoreCJALexecute}{\saildoclabelled{sailRISCVfclCUnderscoreCJALzexecute}{\saildocfcl{ | |
| +Compressed 16-bit encoding for \hyperref[sailRISCVzCJAL]{\lstinline{CJAL}} with the destination register set | |
| to \lstinline`cra`. | |
| -\subsection*{Notes} | |
| - | |
| - | |
| +\subsection*{Notes\n | |
| \begin{itemize} | |
| \item This instruction is only available in capability encoding mode. | |
| \item This instruction is only available in RV32. | |
| \item This instruction replaces the encoding of \hyperref[sailRISCVzCzEJAL]{\lstinline{C.JAL}}. | |
| - | |
| \end{itemize} | |
| + | |
| }{\lstinputlisting[language=sail]{sail_latex_riscv/fclCUnderscoreCJALzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| \newcommand{\sailRISCVfclNOTUnderscoreCAPMODEexecute}{\saildoclabelled{sailRISCVfclNOTUnderscoreCAPMODEzexecute}{\saildocfcl{}{\lstinputlisting[language=sail]{sail_latex_riscv/fclNOTUnderscoreCAPMODEzexecute33a689e3a631b9b905b85461d3814943.tex}}}} | |
| @@ -7473,6 +7445,8 @@ to \lstinline`cra`. | |
| \ifstrequal{#1}{concat\_str\_dec}{\sailRISCVvalconcatStrDec}{}% | |
| \ifstrequal{#1}{count_leading_zeros}{\sailRISCVvalcountLeadingZeros}{}% | |
| \ifstrequal{#1}{count\_leading\_zeros}{\sailRISCVvalcountLeadingZeros}{}% | |
| + \ifstrequal{#1}{count_trailing_zeros}{\sailRISCVvalcountTrailingZeros}{}% | |
| + \ifstrequal{#1}{count\_trailing\_zeros}{\sailRISCVvalcountTrailingZeros}{}% | |
| \ifstrequal{#1}{creg2reg_idx}{\sailRISCVvalcregTworegIdx}{}% | |
| \ifstrequal{#1}{creg2reg\_idx}{\sailRISCVvalcregTworegIdx}{}% | |
| \ifstrequal{#1}{creg_name}{\sailRISCVvalcregName}{}% | |
| @@ -9909,6 +9883,8 @@ to \lstinline`cra`. | |
| \ifstrequal{#1}{concat\_str\_dec}{\hyperref[sailRISCVzconcatzystrzydec]{#2}}{}% | |
| \ifstrequal{#1}{count_leading_zeros}{\hyperref[sailRISCVzcountzyleadingzyzzeros]{#2}}{}% | |
| \ifstrequal{#1}{count\_leading\_zeros}{\hyperref[sailRISCVzcountzyleadingzyzzeros]{#2}}{}% | |
| + \ifstrequal{#1}{count_trailing_zeros}{\hyperref[sailRISCVzcountzytrailingzyzzeros]{#2}}{}% | |
| + \ifstrequal{#1}{count\_trailing\_zeros}{\hyperref[sailRISCVzcountzytrailingzyzzeros]{#2}}{}% | |
| \ifstrequal{#1}{creg2reg_idx}{\hyperref[sailRISCVzcreg2regzyidx]{#2}}{}% | |
| \ifstrequal{#1}{creg2reg\_idx}{\hyperref[sailRISCVzcreg2regzyidx]{#2}}{}% | |
| \ifstrequal{#1}{creg_name}{\hyperref[sailRISCVzcregzyname]{#2}}{}% | |
| diff --git a/sail_latex_riscv/fnz__ided888b8991a27578d5dd72f84db80bce.tex b/sail_latex_riscv/fnz__ided888b8991a27578d5dd72f84db80bce.tex | |
| index ed8afda1..eb19ae49 100644 | |
| --- a/sail_latex_riscv/fnz__ided888b8991a27578d5dd72f84db80bce.tex | |
| +++ b/sail_latex_riscv/fnz__ided888b8991a27578d5dd72f84db80bce.tex | |
| @@ -1 +1 @@ | |
| -function __id forall 'n. (x: #\hyperref[sailRISCVzint]{int}#('n)) -> #\hyperref[sailRISCVzint]{int}#('n) = x | |
| +function #\hyperref[sailRISCVzzyzyid]{\_\_id}#(x) = x | |
| diff --git a/sail_latex_riscv/overloadBz__sizze5b2e36a5dbb42eaba80b4d164e45d3ae.tex b/sail_latex_riscv/overloadBz__sizze5b2e36a5dbb42eaba80b4d164e45d3ae.tex | |
| index a32ee3d7..1b2a9f5b 100644 | |
| --- a/sail_latex_riscv/overloadBz__sizze5b2e36a5dbb42eaba80b4d164e45d3ae.tex | |
| +++ b/sail_latex_riscv/overloadBz__sizze5b2e36a5dbb42eaba80b4d164e45d3ae.tex | |
| @@ -1 +1 @@ | |
| -overload __size = {__id, bitvector_length} | |
| +overload __size = {__id, bitvector_length, vector_length} | |
| diff --git a/sail_latex_riscv/typezbitsa4b31f9b3dc11c921007b665e0d0fce6.tex b/sail_latex_riscv/typezbitsa4b31f9b3dc11c921007b665e0d0fce6.tex | |
| index c8ccc3e0..f48faeaf 100644 | |
| --- a/sail_latex_riscv/typezbitsa4b31f9b3dc11c921007b665e0d0fce6.tex | |
| +++ b/sail_latex_riscv/typezbitsa4b31f9b3dc11c921007b665e0d0fce6.tex | |
| @@ -1 +1 @@ | |
| -type #\hyperref[sailRISCVzbits]{bits}#('n : Int) = #\hyperref[sailRISCVzbitvector]{bitvector}#('n) | |
| +type #\hyperref[sailRISCVzbits]{bits}#('n) = #\hyperref[sailRISCVzbitvector]{bitvector}#('n) | |
| diff --git a/sail_latex_riscv/valz__branch_announce3f5ec48a7e84580ebc85c9d355048c29.tex b/sail_latex_riscv/valz__branch_announce3f5ec48a7e84580ebc85c9d355048c29.tex | |
| index fc2b3e55..8ffb7ad0 100644 | |
| --- a/sail_latex_riscv/valz__branch_announce3f5ec48a7e84580ebc85c9d355048c29.tex | |
| +++ b/sail_latex_riscv/valz__branch_announce3f5ec48a7e84580ebc85c9d355048c29.tex | |
| @@ -1 +1 @@ | |
| -__branch_announce : forall 'addrsize, 'addrsize in {32, 64}. (int('addrsize), bits('addrsize)) -> unit | |
| \ No newline at end of file | |
| +__branch_announce : forall ('addrsize : Int), 'addrsize in {32, 64}. (int('addrsize), bits('addrsize)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__cache_maintenance664ff31aad5ce99f3549048fee01a578.tex b/sail_latex_riscv/valz__cache_maintenance664ff31aad5ce99f3549048fee01a578.tex | |
| index dc4196fd..f9eb04d0 100644 | |
| --- a/sail_latex_riscv/valz__cache_maintenance664ff31aad5ce99f3549048fee01a578.tex | |
| +++ b/sail_latex_riscv/valz__cache_maintenance664ff31aad5ce99f3549048fee01a578.tex | |
| @@ -1 +1,2 @@ | |
| -__cache_maintenance : forall 'addrsize, 'addrsize in {32, 64}. (cache_op_kind, int('addrsize), bits('addrsize)) -> unit | |
| \ No newline at end of file | |
| +__cache_maintenance : forall ('addrsize : Int), 'addrsize in {32, 64}. | |
| + (cache_op_kind, int('addrsize), bits('addrsize)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__ided888b8991a27578d5dd72f84db80bce.tex b/sail_latex_riscv/valz__ided888b8991a27578d5dd72f84db80bce.tex | |
| index 786aa6a6..323b76d9 100644 | |
| --- a/sail_latex_riscv/valz__ided888b8991a27578d5dd72f84db80bce.tex | |
| +++ b/sail_latex_riscv/valz__ided888b8991a27578d5dd72f84db80bce.tex | |
| @@ -1 +1 @@ | |
| -__id : forall 'n. int('n) -> int('n) | |
| \ No newline at end of file | |
| +__id : forall ('n : Int). int('n) -> int('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__instr_announce247eaf1a7feec56ee067d896e6f0ee3e.tex b/sail_latex_riscv/valz__instr_announce247eaf1a7feec56ee067d896e6f0ee3e.tex | |
| index 66aeaa47..02b55c23 100644 | |
| --- a/sail_latex_riscv/valz__instr_announce247eaf1a7feec56ee067d896e6f0ee3e.tex | |
| +++ b/sail_latex_riscv/valz__instr_announce247eaf1a7feec56ee067d896e6f0ee3e.tex | |
| @@ -1 +1 @@ | |
| -__instr_announce : forall 'n, 'n > 0. bits('n) -> unit | |
| \ No newline at end of file | |
| +__instr_announce : forall ('n : Int), 'n > 0. bits('n) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__read_mem5b50614e040054739d7452238393251d.tex b/sail_latex_riscv/valz__read_mem5b50614e040054739d7452238393251d.tex | |
| index 234304f3..d7e1f7e4 100644 | |
| --- a/sail_latex_riscv/valz__read_mem5b50614e040054739d7452238393251d.tex | |
| +++ b/sail_latex_riscv/valz__read_mem5b50614e040054739d7452238393251d.tex | |
| @@ -1,2 +1,2 @@ | |
| -__read_mem : forall 'n 'addrsize, ('n > 0 & 'addrsize in {32, 64}). | |
| +__read_mem : forall ('n : Int) ('addrsize : Int), ('n > 0 & 'addrsize in {32, 64}). | |
| (read_kind, int('addrsize), bits('addrsize), int('n)) -> bits(8 * 'n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__read_memt00147dd8cf6dc9809e14fc1395c45ce6.tex b/sail_latex_riscv/valz__read_memt00147dd8cf6dc9809e14fc1395c45ce6.tex | |
| index fbd43de5..3c685661 100644 | |
| --- a/sail_latex_riscv/valz__read_memt00147dd8cf6dc9809e14fc1395c45ce6.tex | |
| +++ b/sail_latex_riscv/valz__read_memt00147dd8cf6dc9809e14fc1395c45ce6.tex | |
| @@ -1,2 +1,2 @@ | |
| -__read_memt : forall 'n 'addrsize, ('n > 0 & 'addrsize in {32, 64}). | |
| +__read_memt : forall ('n : Int) ('addrsize : Int), ('n > 0 & 'addrsize in {32, 64}). | |
| (read_kind, bits('addrsize), int('n)) -> (bits(8 * 'n), bit) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__readram_meta16c05ad578ee799cab7403aa8924f5dd.tex b/sail_latex_riscv/valz__readram_meta16c05ad578ee799cab7403aa8924f5dd.tex | |
| index eccc4724..fe6f9367 100644 | |
| --- a/sail_latex_riscv/valz__readram_meta16c05ad578ee799cab7403aa8924f5dd.tex | |
| +++ b/sail_latex_riscv/valz__readram_meta16c05ad578ee799cab7403aa8924f5dd.tex | |
| @@ -1 +1 @@ | |
| -__ReadRAM_Meta : forall 'n. (xlenbits, int('n)) -> mem_meta | |
| \ No newline at end of file | |
| +__ReadRAM_Meta : forall ('n : Int). (xlenbits, int('n)) -> mem_meta | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__tracememoryread11a5e2cc4158cfc2c22e91249b3a83cb.tex b/sail_latex_riscv/valz__tracememoryread11a5e2cc4158cfc2c22e91249b3a83cb.tex | |
| index 894e3cca..2c90d83a 100644 | |
| --- a/sail_latex_riscv/valz__tracememoryread11a5e2cc4158cfc2c22e91249b3a83cb.tex | |
| +++ b/sail_latex_riscv/valz__tracememoryread11a5e2cc4158cfc2c22e91249b3a83cb.tex | |
| @@ -1 +1 @@ | |
| -__TraceMemoryRead : forall 'n 'm. (int('n), bits('m), bits(8 * 'n)) -> unit | |
| \ No newline at end of file | |
| +__TraceMemoryRead : forall ('n : Int) ('m : Int). (int('n), bits('m), bits(8 * 'n)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__tracememorywrite59b064eac2207f0323d075cfc74a28ea.tex b/sail_latex_riscv/valz__tracememorywrite59b064eac2207f0323d075cfc74a28ea.tex | |
| index 9e510614..9667154e 100644 | |
| --- a/sail_latex_riscv/valz__tracememorywrite59b064eac2207f0323d075cfc74a28ea.tex | |
| +++ b/sail_latex_riscv/valz__tracememorywrite59b064eac2207f0323d075cfc74a28ea.tex | |
| @@ -1 +1 @@ | |
| -__TraceMemoryWrite : forall 'n 'm. (int('n), bits('m), bits(8 * 'n)) -> unit | |
| \ No newline at end of file | |
| +__TraceMemoryWrite : forall ('n : Int) ('m : Int). (int('n), bits('m), bits(8 * 'n)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__write_mem7fed12b7fc053a5ef3b5be1c753041b9.tex b/sail_latex_riscv/valz__write_mem7fed12b7fc053a5ef3b5be1c753041b9.tex | |
| index 4d828004..1fc7b6d9 100644 | |
| --- a/sail_latex_riscv/valz__write_mem7fed12b7fc053a5ef3b5be1c753041b9.tex | |
| +++ b/sail_latex_riscv/valz__write_mem7fed12b7fc053a5ef3b5be1c753041b9.tex | |
| @@ -1,2 +1,2 @@ | |
| -__write_mem : forall 'n 'addrsize, ('n > 0 & 'addrsize in {32, 64}). | |
| +__write_mem : forall ('n : Int) ('addrsize : Int), ('n > 0 & 'addrsize in {32, 64}). | |
| (write_kind, int('addrsize), bits('addrsize), int('n), bits(8 * 'n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__write_mem_ea084b77c6ab56479698cd76a013fd7cad.tex b/sail_latex_riscv/valz__write_mem_ea084b77c6ab56479698cd76a013fd7cad.tex | |
| index 55ddec50..140744f9 100644 | |
| --- a/sail_latex_riscv/valz__write_mem_ea084b77c6ab56479698cd76a013fd7cad.tex | |
| +++ b/sail_latex_riscv/valz__write_mem_ea084b77c6ab56479698cd76a013fd7cad.tex | |
| @@ -1,2 +1,2 @@ | |
| -__write_mem_ea : forall 'n 'addrsize, ('n > 0 & 'addrsize in {32, 64}). | |
| +__write_mem_ea : forall ('n : Int) ('addrsize : Int), ('n > 0 & 'addrsize in {32, 64}). | |
| (write_kind, int('addrsize), bits('addrsize), int('n)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__write_memte6e713c02b822271b225111a241edb5f.tex b/sail_latex_riscv/valz__write_memte6e713c02b822271b225111a241edb5f.tex | |
| index 59e3e5cf..14688e51 100644 | |
| --- a/sail_latex_riscv/valz__write_memte6e713c02b822271b225111a241edb5f.tex | |
| +++ b/sail_latex_riscv/valz__write_memte6e713c02b822271b225111a241edb5f.tex | |
| @@ -1,2 +1,2 @@ | |
| -__write_memt : forall 'n 'addrsize, ('n > 0 & 'addrsize in {32, 64}). | |
| +__write_memt : forall ('n : Int) ('addrsize : Int), ('n > 0 & 'addrsize in {32, 64}). | |
| (write_kind, bits('addrsize), int('n), bits(8 * 'n), bit) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__write_taga3db5671522692a95035f749d1a6fc7c.tex b/sail_latex_riscv/valz__write_taga3db5671522692a95035f749d1a6fc7c.tex | |
| index cd4abf85..7292d590 100644 | |
| --- a/sail_latex_riscv/valz__write_taga3db5671522692a95035f749d1a6fc7c.tex | |
| +++ b/sail_latex_riscv/valz__write_taga3db5671522692a95035f749d1a6fc7c.tex | |
| @@ -1 +1 @@ | |
| -__write_tag : forall 'addrsize, 'addrsize in {32, 64}. (write_kind, bits('addrsize), bit) -> bool | |
| \ No newline at end of file | |
| +__write_tag : forall ('addrsize : Int), 'addrsize in {32, 64}. (write_kind, bits('addrsize), bit) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz__writeram_meta071a60a48b7f4ceb27499d72826fb174.tex b/sail_latex_riscv/valz__writeram_meta071a60a48b7f4ceb27499d72826fb174.tex | |
| index 84edadd7..46043f4a 100644 | |
| --- a/sail_latex_riscv/valz__writeram_meta071a60a48b7f4ceb27499d72826fb174.tex | |
| +++ b/sail_latex_riscv/valz__writeram_meta071a60a48b7f4ceb27499d72826fb174.tex | |
| @@ -1 +1 @@ | |
| -__WriteRAM_Meta : forall 'n. (xlenbits, int('n), mem_meta) -> unit | |
| \ No newline at end of file | |
| +__WriteRAM_Meta : forall ('n : Int). (xlenbits, int('n), mem_meta) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_shl1b261f5995acb90d475c10ee0cdbc12ce.tex b/sail_latex_riscv/valz_shl1b261f5995acb90d475c10ee0cdbc12ce.tex | |
| index a4dd22fb..bea6dbae 100644 | |
| --- a/sail_latex_riscv/valz_shl1b261f5995acb90d475c10ee0cdbc12ce.tex | |
| +++ b/sail_latex_riscv/valz_shl1b261f5995acb90d475c10ee0cdbc12ce.tex | |
| @@ -1 +1 @@ | |
| -_shl1 : forall 'n, (0 <= 'n & 'n <= 3). (int(1), int('n)) -> {1, 2, 4, 8} | |
| \ No newline at end of file | |
| +_shl1 : forall ('n : Int), (0 <= 'n & 'n <= 3). (int(1), int('n)) -> {1, 2, 4, 8} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_shl32469ae968a52f81e1a28aeacf7e2d496b.tex b/sail_latex_riscv/valz_shl32469ae968a52f81e1a28aeacf7e2d496b.tex | |
| index 1c7d095b..f4d94183 100644 | |
| --- a/sail_latex_riscv/valz_shl32469ae968a52f81e1a28aeacf7e2d496b.tex | |
| +++ b/sail_latex_riscv/valz_shl32469ae968a52f81e1a28aeacf7e2d496b.tex | |
| @@ -1 +1 @@ | |
| -_shl32 : forall 'n, 'n in {0, 1}. (int(32), int('n)) -> {32, 64} | |
| \ No newline at end of file | |
| +_shl32 : forall ('n : Int), 'n in {0, 1}. (int(32), int('n)) -> {32, 64} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_shl8e01c74b934d4c323501a597baa8e6f73.tex b/sail_latex_riscv/valz_shl8e01c74b934d4c323501a597baa8e6f73.tex | |
| index afc8b047..75e84426 100644 | |
| --- a/sail_latex_riscv/valz_shl8e01c74b934d4c323501a597baa8e6f73.tex | |
| +++ b/sail_latex_riscv/valz_shl8e01c74b934d4c323501a597baa8e6f73.tex | |
| @@ -1 +1 @@ | |
| -_shl8 : forall 'n, (0 <= 'n & 'n <= 3). (int(8), int('n)) -> {8, 16, 32, 64} | |
| \ No newline at end of file | |
| +_shl8 : forall ('n : Int), (0 <= 'n & 'n <= 3). (int(8), int('n)) -> {8, 16, 32, 64} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_shl_int86f4e1bc3609625860bc16734d7f2614.tex b/sail_latex_riscv/valz_shl_int86f4e1bc3609625860bc16734d7f2614.tex | |
| index ff84e0f2..1af8660b 100644 | |
| --- a/sail_latex_riscv/valz_shl_int86f4e1bc3609625860bc16734d7f2614.tex | |
| +++ b/sail_latex_riscv/valz_shl_int86f4e1bc3609625860bc16734d7f2614.tex | |
| @@ -1 +1 @@ | |
| -_shl_int : forall 'n, 0 <= 'n. (int, int('n)) -> int | |
| \ No newline at end of file | |
| +_shl_int : forall ('n : Int), 0 <= 'n. (int, int('n)) -> int | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_shr328ec48e4bcaebfdbf5c374b77ca7b535b.tex b/sail_latex_riscv/valz_shr328ec48e4bcaebfdbf5c374b77ca7b535b.tex | |
| index 5beebd41..22186df0 100644 | |
| --- a/sail_latex_riscv/valz_shr328ec48e4bcaebfdbf5c374b77ca7b535b.tex | |
| +++ b/sail_latex_riscv/valz_shr328ec48e4bcaebfdbf5c374b77ca7b535b.tex | |
| @@ -1 +1 @@ | |
| -_shr32 : forall 'n, (0 <= 'n & 'n <= 31). (int('n), int(1)) -> {'m, (0 <= 'm & 'm <= 15). int('m)} | |
| \ No newline at end of file | |
| +_shr32 : forall ('n : Int), (0 <= 'n & 'n <= 31). (int('n), int(1)) -> {('m : Int), (0 <= 'm & 'm <= 15). int('m)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_shr_int34025c843d841a08930cb64bf99a1693.tex b/sail_latex_riscv/valz_shr_int34025c843d841a08930cb64bf99a1693.tex | |
| index e3a066dc..caae3656 100644 | |
| --- a/sail_latex_riscv/valz_shr_int34025c843d841a08930cb64bf99a1693.tex | |
| +++ b/sail_latex_riscv/valz_shr_int34025c843d841a08930cb64bf99a1693.tex | |
| @@ -1 +1 @@ | |
| -_shr_int : forall 'n, 0 <= 'n. (int, int('n)) -> int | |
| \ No newline at end of file | |
| +_shr_int : forall ('n : Int), 0 <= 'n. (int, int('n)) -> int | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valz_tmod_int_positive6f0621d972182279e90a43c082e50c10.tex b/sail_latex_riscv/valz_tmod_int_positive6f0621d972182279e90a43c082e50c10.tex | |
| index 24de5982..f187115a 100644 | |
| --- a/sail_latex_riscv/valz_tmod_int_positive6f0621d972182279e90a43c082e50c10.tex | |
| +++ b/sail_latex_riscv/valz_tmod_int_positive6f0621d972182279e90a43c082e50c10.tex | |
| @@ -1 +1 @@ | |
| -_tmod_int_positive : forall 'n, 'n >= 1. (int, int('n)) -> nat | |
| \ No newline at end of file | |
| +_tmod_int_positive : forall ('n : Int), 'n >= 1. (int, int('n)) -> nat | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valza64_barrier_domain_of_num6e122924ff562010f42f288ecc2cdbe3.tex b/sail_latex_riscv/valza64_barrier_domain_of_num6e122924ff562010f42f288ecc2cdbe3.tex | |
| index c42fc883..5eb1e97c 100644 | |
| --- a/sail_latex_riscv/valza64_barrier_domain_of_num6e122924ff562010f42f288ecc2cdbe3.tex | |
| +++ b/sail_latex_riscv/valza64_barrier_domain_of_num6e122924ff562010f42f288ecc2cdbe3.tex | |
| @@ -1 +1 @@ | |
| -a64_barrier_domain_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> a64_barrier_domain | |
| \ No newline at end of file | |
| +a64_barrier_domain_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> a64_barrier_domain | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valza64_barrier_type_of_numc06c55fe3b04f35ecb4741ea01acc85e.tex b/sail_latex_riscv/valza64_barrier_type_of_numc06c55fe3b04f35ecb4741ea01acc85e.tex | |
| index d2208df4..cf52296b 100644 | |
| --- a/sail_latex_riscv/valza64_barrier_type_of_numc06c55fe3b04f35ecb4741ea01acc85e.tex | |
| +++ b/sail_latex_riscv/valza64_barrier_type_of_numc06c55fe3b04f35ecb4741ea01acc85e.tex | |
| @@ -1 +1 @@ | |
| -a64_barrier_type_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> a64_barrier_type | |
| \ No newline at end of file | |
| +a64_barrier_type_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> a64_barrier_type | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzabs_int_atom414063313cc5ac5d9a742f9c8a111704.tex b/sail_latex_riscv/valzabs_int_atom414063313cc5ac5d9a742f9c8a111704.tex | |
| index 22cf5026..bafc4750 100644 | |
| --- a/sail_latex_riscv/valzabs_int_atom414063313cc5ac5d9a742f9c8a111704.tex | |
| +++ b/sail_latex_riscv/valzabs_int_atom414063313cc5ac5d9a742f9c8a111704.tex | |
| @@ -1 +1 @@ | |
| -abs_int_atom : forall 'n. int('n) -> int(abs('n)) | |
| \ No newline at end of file | |
| +abs_int_atom : forall ('n : Int). int('n) -> int(abs('n)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzadd_atomd34efc9e611b6d3b6757e17f4932b12b.tex b/sail_latex_riscv/valzadd_atomd34efc9e611b6d3b6757e17f4932b12b.tex | |
| index f6fe494c..57b6f940 100644 | |
| --- a/sail_latex_riscv/valzadd_atomd34efc9e611b6d3b6757e17f4932b12b.tex | |
| +++ b/sail_latex_riscv/valzadd_atomd34efc9e611b6d3b6757e17f4932b12b.tex | |
| @@ -1 +1 @@ | |
| -add_atom : forall 'n 'm. (int('n), int('m)) -> int('n + 'm) | |
| \ No newline at end of file | |
| +add_atom : forall ('n : Int) ('m : Int). (int('n), int('m)) -> int('n + 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzadd_bits24373ffc11f289d5bb648df2f4f41b25.tex b/sail_latex_riscv/valzadd_bits24373ffc11f289d5bb648df2f4f41b25.tex | |
| index e85f0076..1e6dd7d0 100644 | |
| --- a/sail_latex_riscv/valzadd_bits24373ffc11f289d5bb648df2f4f41b25.tex | |
| +++ b/sail_latex_riscv/valzadd_bits24373ffc11f289d5bb648df2f4f41b25.tex | |
| @@ -1 +1 @@ | |
| -add_bits : forall 'n. (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| +add_bits : forall ('n : Int). (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzadd_bits_inta5424052402522ff4653275c899f7543.tex b/sail_latex_riscv/valzadd_bits_inta5424052402522ff4653275c899f7543.tex | |
| index 3250c1ec..b08b96d2 100644 | |
| --- a/sail_latex_riscv/valzadd_bits_inta5424052402522ff4653275c899f7543.tex | |
| +++ b/sail_latex_riscv/valzadd_bits_inta5424052402522ff4653275c899f7543.tex | |
| @@ -1 +1 @@ | |
| -add_bits_int : forall 'n. (bits('n), int) -> bits('n) | |
| \ No newline at end of file | |
| +add_bits_int : forall ('n : Int). (bits('n), int) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzagtype_of_numfa62fe8344074a1e1dacf91b3fc88a53.tex b/sail_latex_riscv/valzagtype_of_numfa62fe8344074a1e1dacf91b3fc88a53.tex | |
| index 0bd65f8b..871bcd30 100644 | |
| --- a/sail_latex_riscv/valzagtype_of_numfa62fe8344074a1e1dacf91b3fc88a53.tex | |
| +++ b/sail_latex_riscv/valzagtype_of_numfa62fe8344074a1e1dacf91b3fc88a53.tex | |
| @@ -1 +1 @@ | |
| -agtype_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> agtype | |
| \ No newline at end of file | |
| +agtype_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> agtype | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzamoop_of_num66fc14378761bc8bd8137ac63cffe431.tex b/sail_latex_riscv/valzamoop_of_num66fc14378761bc8bd8137ac63cffe431.tex | |
| index d6dea4db..d07e5bc0 100644 | |
| --- a/sail_latex_riscv/valzamoop_of_num66fc14378761bc8bd8137ac63cffe431.tex | |
| +++ b/sail_latex_riscv/valzamoop_of_num66fc14378761bc8bd8137ac63cffe431.tex | |
| @@ -1 +1 @@ | |
| -amoop_of_num : forall 'e, (0 <= 'e & 'e <= 8). int('e) -> amoop | |
| \ No newline at end of file | |
| +amoop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 8). int('e) -> amoop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzand_vec99be3fe45d23194b597520c9e407ad35.tex b/sail_latex_riscv/valzand_vec99be3fe45d23194b597520c9e407ad35.tex | |
| index 4939da2c..0b8e5e04 100644 | |
| --- a/sail_latex_riscv/valzand_vec99be3fe45d23194b597520c9e407ad35.tex | |
| +++ b/sail_latex_riscv/valzand_vec99be3fe45d23194b597520c9e407ad35.tex | |
| @@ -1 +1 @@ | |
| -and_vec : forall 'n. (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| +and_vec : forall ('n : Int). (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzappend_6433ef192058d4bf5f092d6f8b6d97f4c4.tex b/sail_latex_riscv/valzappend_6433ef192058d4bf5f092d6f8b6d97f4c4.tex | |
| index d095837c..eccf4152 100644 | |
| --- a/sail_latex_riscv/valzappend_6433ef192058d4bf5f092d6f8b6d97f4c4.tex | |
| +++ b/sail_latex_riscv/valzappend_6433ef192058d4bf5f092d6f8b6d97f4c4.tex | |
| @@ -1 +1 @@ | |
| -append_64 : forall 'n. (bits('n), bits(64)) -> bits('n + 64) | |
| \ No newline at end of file | |
| +append_64 : forall ('n : Int). (bits('n), bits(64)) -> bits('n + 64) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzarchitecture_of_num798cfe8625bb4fedb9343d4984208b4c.tex b/sail_latex_riscv/valzarchitecture_of_num798cfe8625bb4fedb9343d4984208b4c.tex | |
| index 3af98962..21a299bb 100644 | |
| --- a/sail_latex_riscv/valzarchitecture_of_num798cfe8625bb4fedb9343d4984208b4c.tex | |
| +++ b/sail_latex_riscv/valzarchitecture_of_num798cfe8625bb4fedb9343d4984208b4c.tex | |
| @@ -1 +1 @@ | |
| -Architecture_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> Architecture | |
| \ No newline at end of file | |
| +Architecture_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> Architecture | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbiop_zzbs_of_num657ce5ff4fabd66cd7718d0f4801f00d.tex b/sail_latex_riscv/valzbiop_zzbs_of_num657ce5ff4fabd66cd7718d0f4801f00d.tex | |
| index 923255ae..0ead68f0 100644 | |
| --- a/sail_latex_riscv/valzbiop_zzbs_of_num657ce5ff4fabd66cd7718d0f4801f00d.tex | |
| +++ b/sail_latex_riscv/valzbiop_zzbs_of_num657ce5ff4fabd66cd7718d0f4801f00d.tex | |
| @@ -1 +1 @@ | |
| -biop_zbs_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> biop_zbs | |
| \ No newline at end of file | |
| +biop_zbs_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> biop_zbs | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbits_strae053d842c21f0867dea1e830d1773cc.tex b/sail_latex_riscv/valzbits_strae053d842c21f0867dea1e830d1773cc.tex | |
| index 43c38d21..e977adc7 100644 | |
| --- a/sail_latex_riscv/valzbits_strae053d842c21f0867dea1e830d1773cc.tex | |
| +++ b/sail_latex_riscv/valzbits_strae053d842c21f0867dea1e830d1773cc.tex | |
| @@ -1 +1 @@ | |
| -bits_str : forall 'n. bitvector('n) -> string | |
| \ No newline at end of file | |
| +bits_str : forall ('n : Int). bitvector('n) -> string | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbitvector_access8b584ca86770abb6b0da5ef059a02ed9.tex b/sail_latex_riscv/valzbitvector_access8b584ca86770abb6b0da5ef059a02ed9.tex | |
| index 45b73d59..77f7f786 100644 | |
| --- a/sail_latex_riscv/valzbitvector_access8b584ca86770abb6b0da5ef059a02ed9.tex | |
| +++ b/sail_latex_riscv/valzbitvector_access8b584ca86770abb6b0da5ef059a02ed9.tex | |
| @@ -1 +1 @@ | |
| -bitvector_access : forall 'n 'm, (0 <= 'm & 'm < 'n). (bits('n), int('m)) -> bit | |
| \ No newline at end of file | |
| +bitvector_access : forall ('n : Int) ('m : Int), (0 <= 'm & 'm < 'n). (bits('n), int('m)) -> bit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbitvector_concat6176f8be1468d8779ee8370fd3b4a6e0.tex b/sail_latex_riscv/valzbitvector_concat6176f8be1468d8779ee8370fd3b4a6e0.tex | |
| index d8cb8aa8..0351b43b 100644 | |
| --- a/sail_latex_riscv/valzbitvector_concat6176f8be1468d8779ee8370fd3b4a6e0.tex | |
| +++ b/sail_latex_riscv/valzbitvector_concat6176f8be1468d8779ee8370fd3b4a6e0.tex | |
| @@ -1 +1 @@ | |
| -bitvector_concat : forall 'n 'm. (bits('n), bits('m)) -> bits('n + 'm) | |
| \ No newline at end of file | |
| +bitvector_concat : forall ('n : Int) ('m : Int). (bits('n), bits('m)) -> bits('n + 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbitvector_lengthcd74a5cced7567d19500671e4b6e1031.tex b/sail_latex_riscv/valzbitvector_lengthcd74a5cced7567d19500671e4b6e1031.tex | |
| index 7aa35edf..1b17c963 100644 | |
| --- a/sail_latex_riscv/valzbitvector_lengthcd74a5cced7567d19500671e4b6e1031.tex | |
| +++ b/sail_latex_riscv/valzbitvector_lengthcd74a5cced7567d19500671e4b6e1031.tex | |
| @@ -1 +1 @@ | |
| -bitvector_length : forall 'n. bits('n) -> int('n) | |
| \ No newline at end of file | |
| +bitvector_length : forall ('n : Int). bits('n) -> int('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbitvector_update20826799a1ff3ff40895206db0df14bb.tex b/sail_latex_riscv/valzbitvector_update20826799a1ff3ff40895206db0df14bb.tex | |
| index d7a8ed45..eba597cb 100644 | |
| --- a/sail_latex_riscv/valzbitvector_update20826799a1ff3ff40895206db0df14bb.tex | |
| +++ b/sail_latex_riscv/valzbitvector_update20826799a1ff3ff40895206db0df14bb.tex | |
| @@ -1 +1 @@ | |
| -bitvector_update : forall 'n 'm, (0 <= 'm & 'm < 'n). (bits('n), int('m), bit) -> bits('n) | |
| \ No newline at end of file | |
| +bitvector_update : forall ('n : Int) ('m : Int), (0 <= 'm & 'm < 'n). (bits('n), int('m), bit) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbop_of_num74cd9479863c5a21d66fa86ae45f1bd5.tex b/sail_latex_riscv/valzbop_of_num74cd9479863c5a21d66fa86ae45f1bd5.tex | |
| index aced8117..bb27a862 100644 | |
| --- a/sail_latex_riscv/valzbop_of_num74cd9479863c5a21d66fa86ae45f1bd5.tex | |
| +++ b/sail_latex_riscv/valzbop_of_num74cd9479863c5a21d66fa86ae45f1bd5.tex | |
| @@ -1 +1 @@ | |
| -bop_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> bop | |
| \ No newline at end of file | |
| +bop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> bop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbrop_zzba_of_num70ddd1a327c1d2a55a3182bf9129ab44.tex b/sail_latex_riscv/valzbrop_zzba_of_num70ddd1a327c1d2a55a3182bf9129ab44.tex | |
| index 4557c490..a4385ea9 100644 | |
| --- a/sail_latex_riscv/valzbrop_zzba_of_num70ddd1a327c1d2a55a3182bf9129ab44.tex | |
| +++ b/sail_latex_riscv/valzbrop_zzba_of_num70ddd1a327c1d2a55a3182bf9129ab44.tex | |
| @@ -1 +1 @@ | |
| -brop_zba_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> brop_zba | |
| \ No newline at end of file | |
| +brop_zba_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> brop_zba | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbrop_zzbb_of_num1ac2bd80c3ef359df2e0c1bc2821a18f.tex b/sail_latex_riscv/valzbrop_zzbb_of_num1ac2bd80c3ef359df2e0c1bc2821a18f.tex | |
| index c5bb6ac2..e26f882e 100644 | |
| --- a/sail_latex_riscv/valzbrop_zzbb_of_num1ac2bd80c3ef359df2e0c1bc2821a18f.tex | |
| +++ b/sail_latex_riscv/valzbrop_zzbb_of_num1ac2bd80c3ef359df2e0c1bc2821a18f.tex | |
| @@ -1 +1 @@ | |
| -brop_zbb_of_num : forall 'e, (0 <= 'e & 'e <= 8). int('e) -> brop_zbb | |
| \ No newline at end of file | |
| +brop_zbb_of_num : forall ('e : Int), (0 <= 'e & 'e <= 8). int('e) -> brop_zbb | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbrop_zzbkb_of_num4491ab5f16454ed67b90a355ce7a27b6.tex b/sail_latex_riscv/valzbrop_zzbkb_of_num4491ab5f16454ed67b90a355ce7a27b6.tex | |
| index ba04ea2f..f3cc1700 100644 | |
| --- a/sail_latex_riscv/valzbrop_zzbkb_of_num4491ab5f16454ed67b90a355ce7a27b6.tex | |
| +++ b/sail_latex_riscv/valzbrop_zzbkb_of_num4491ab5f16454ed67b90a355ce7a27b6.tex | |
| @@ -1 +1 @@ | |
| -brop_zbkb_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> brop_zbkb | |
| \ No newline at end of file | |
| +brop_zbkb_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> brop_zbkb | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbrop_zzbs_of_num930c22b621a73b913089b63d53f85888.tex b/sail_latex_riscv/valzbrop_zzbs_of_num930c22b621a73b913089b63d53f85888.tex | |
| index 45ae0cab..e4ef95d8 100644 | |
| --- a/sail_latex_riscv/valzbrop_zzbs_of_num930c22b621a73b913089b63d53f85888.tex | |
| +++ b/sail_latex_riscv/valzbrop_zzbs_of_num930c22b621a73b913089b63d53f85888.tex | |
| @@ -1 +1 @@ | |
| -brop_zbs_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> brop_zbs | |
| \ No newline at end of file | |
| +brop_zbs_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> brop_zbs | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbropw_zzba_of_numbb6500f5a1f03ef8ebad88dc76af7705.tex b/sail_latex_riscv/valzbropw_zzba_of_numbb6500f5a1f03ef8ebad88dc76af7705.tex | |
| index b5c6b056..0320ff47 100644 | |
| --- a/sail_latex_riscv/valzbropw_zzba_of_numbb6500f5a1f03ef8ebad88dc76af7705.tex | |
| +++ b/sail_latex_riscv/valzbropw_zzba_of_numbb6500f5a1f03ef8ebad88dc76af7705.tex | |
| @@ -1 +1 @@ | |
| -bropw_zba_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> bropw_zba | |
| \ No newline at end of file | |
| +bropw_zba_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> bropw_zba | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzbropw_zzbb_of_numba7408999d7018da58cc69911b9ce189.tex b/sail_latex_riscv/valzbropw_zzbb_of_numba7408999d7018da58cc69911b9ce189.tex | |
| index 359ced4e..8c50abf7 100644 | |
| --- a/sail_latex_riscv/valzbropw_zzbb_of_numba7408999d7018da58cc69911b9ce189.tex | |
| +++ b/sail_latex_riscv/valzbropw_zzbb_of_numba7408999d7018da58cc69911b9ce189.tex | |
| @@ -1 +1 @@ | |
| -bropw_zbb_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> bropw_zbb | |
| \ No newline at end of file | |
| +bropw_zbb_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> bropw_zbb | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzcache_op_kind_of_num612a346f1c1edf9d5bae987ac9d9912c.tex b/sail_latex_riscv/valzcache_op_kind_of_num612a346f1c1edf9d5bae987ac9d9912c.tex | |
| index 17cae161..a98cc1af 100644 | |
| --- a/sail_latex_riscv/valzcache_op_kind_of_num612a346f1c1edf9d5bae987ac9d9912c.tex | |
| +++ b/sail_latex_riscv/valzcache_op_kind_of_num612a346f1c1edf9d5bae987ac9d9912c.tex | |
| @@ -1 +1 @@ | |
| -cache_op_kind_of_num : forall 'e, (0 <= 'e & 'e <= 10). int('e) -> cache_op_kind | |
| \ No newline at end of file | |
| +cache_op_kind_of_num : forall ('e : Int), (0 <= 'e & 'e <= 10). int('e) -> cache_op_kind | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzcapex_of_num5060d93d1da28509784feb6c153b90e3.tex b/sail_latex_riscv/valzcapex_of_num5060d93d1da28509784feb6c153b90e3.tex | |
| index eefeda56..e8017486 100644 | |
| --- a/sail_latex_riscv/valzcapex_of_num5060d93d1da28509784feb6c153b90e3.tex | |
| +++ b/sail_latex_riscv/valzcapex_of_num5060d93d1da28509784feb6c153b90e3.tex | |
| @@ -1 +1 @@ | |
| -CapEx_of_num : forall 'e, (0 <= 'e & 'e <= 16). int('e) -> CapEx | |
| \ No newline at end of file | |
| +CapEx_of_num : forall ('e : Int), (0 <= 'e & 'e <= 16). int('e) -> CapEx | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzchecked_mem_read46a92fcd62c31279edfc3bc18c424fa0.tex b/sail_latex_riscv/valzchecked_mem_read46a92fcd62c31279edfc3bc18c424fa0.tex | |
| index 1cbd25e7..a3654c89 100644 | |
| --- a/sail_latex_riscv/valzchecked_mem_read46a92fcd62c31279edfc3bc18c424fa0.tex | |
| +++ b/sail_latex_riscv/valzchecked_mem_read46a92fcd62c31279edfc3bc18c424fa0.tex | |
| @@ -1,2 +1,2 @@ | |
| -checked_mem_read : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +checked_mem_read : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), xlenbits, int('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzchecked_mem_write765e0693788c9f4b01c2243ece39909e.tex b/sail_latex_riscv/valzchecked_mem_write765e0693788c9f4b01c2243ece39909e.tex | |
| index d55c44eb..d76edc41 100644 | |
| --- a/sail_latex_riscv/valzchecked_mem_write765e0693788c9f4b01c2243ece39909e.tex | |
| +++ b/sail_latex_riscv/valzchecked_mem_write765e0693788c9f4b01c2243ece39909e.tex | |
| @@ -1,2 +1,2 @@ | |
| -checked_mem_write : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +checked_mem_write : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (write_kind, xlenbits, int('n), bits(8 * 'n), mem_meta) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzclearregset_of_numcd5fbceac9f286632a9dd1aa0eafe241.tex b/sail_latex_riscv/valzclearregset_of_numcd5fbceac9f286632a9dd1aa0eafe241.tex | |
| index 831d89bb..b447dfc9 100644 | |
| --- a/sail_latex_riscv/valzclearregset_of_numcd5fbceac9f286632a9dd1aa0eafe241.tex | |
| +++ b/sail_latex_riscv/valzclearregset_of_numcd5fbceac9f286632a9dd1aa0eafe241.tex | |
| @@ -1 +1 @@ | |
| -ClearRegSet_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> ClearRegSet | |
| \ No newline at end of file | |
| +ClearRegSet_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> ClearRegSet | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzclint_load21de915eadac54aac5354dd7bcbb8d32.tex b/sail_latex_riscv/valzclint_load21de915eadac54aac5354dd7bcbb8d32.tex | |
| index c63f0beb..778a8ba5 100644 | |
| --- a/sail_latex_riscv/valzclint_load21de915eadac54aac5354dd7bcbb8d32.tex | |
| +++ b/sail_latex_riscv/valzclint_load21de915eadac54aac5354dd7bcbb8d32.tex | |
| @@ -1 +1 @@ | |
| -clint_load : forall 'n, 'n > 0. (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| +clint_load : forall ('n : Int), 'n > 0. (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzclint_store5ac6a4caa2fe222e7b924cd9a27ec52f.tex b/sail_latex_riscv/valzclint_store5ac6a4caa2fe222e7b924cd9a27ec52f.tex | |
| index 05035bd2..ef0aaabf 100644 | |
| --- a/sail_latex_riscv/valzclint_store5ac6a4caa2fe222e7b924cd9a27ec52f.tex | |
| +++ b/sail_latex_riscv/valzclint_store5ac6a4caa2fe222e7b924cd9a27ec52f.tex | |
| @@ -1 +1 @@ | |
| -clint_store : forall 'n, 'n > 0. (xlenbits, int('n), bits(8 * 'n)) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| +clint_store : forall ('n : Int), 'n > 0. (xlenbits, int('n), bits(8 * 'n)) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzconcat_str_bitsd8fc2224310ed49d394cba090cf60741.tex b/sail_latex_riscv/valzconcat_str_bitsd8fc2224310ed49d394cba090cf60741.tex | |
| index a8917fee..323791a8 100644 | |
| --- a/sail_latex_riscv/valzconcat_str_bitsd8fc2224310ed49d394cba090cf60741.tex | |
| +++ b/sail_latex_riscv/valzconcat_str_bitsd8fc2224310ed49d394cba090cf60741.tex | |
| @@ -1 +1 @@ | |
| -concat_str_bits : forall 'n. (string, bitvector('n)) -> string | |
| \ No newline at end of file | |
| +concat_str_bits : forall ('n : Int). (string, bitvector('n)) -> string | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzcount_leading_zzeros315ae28f559df1d42a7d2ca4cfff2905.tex b/sail_latex_riscv/valzcount_leading_zzeros315ae28f559df1d42a7d2ca4cfff2905.tex | |
| index e56966f3..01a774e4 100644 | |
| --- a/sail_latex_riscv/valzcount_leading_zzeros315ae28f559df1d42a7d2ca4cfff2905.tex | |
| +++ b/sail_latex_riscv/valzcount_leading_zzeros315ae28f559df1d42a7d2ca4cfff2905.tex | |
| @@ -1 +1 @@ | |
| -count_leading_zeros : forall 'N, 'N >= 1. bits('N) -> {'n, (0 <= 'n & 'n <= 'N). int('n)} | |
| \ No newline at end of file | |
| +count_leading_zeros : forall ('N : Int), 'N >= 1. bits('N) -> {('n : Int), (0 <= 'n & 'n <= 'N). int('n)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzcptrcmpop_of_num73ef06bb0c979dffcf7e6619077debb0.tex b/sail_latex_riscv/valzcptrcmpop_of_num73ef06bb0c979dffcf7e6619077debb0.tex | |
| index 407de9e0..18dbe4c8 100644 | |
| --- a/sail_latex_riscv/valzcptrcmpop_of_num73ef06bb0c979dffcf7e6619077debb0.tex | |
| +++ b/sail_latex_riscv/valzcptrcmpop_of_num73ef06bb0c979dffcf7e6619077debb0.tex | |
| @@ -1 +1 @@ | |
| -CPtrCmpOp_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> CPtrCmpOp | |
| \ No newline at end of file | |
| +CPtrCmpOp_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> CPtrCmpOp | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzcsrop_of_numfc0e82db24db14fec87d0613c91892f2.tex b/sail_latex_riscv/valzcsrop_of_numfc0e82db24db14fec87d0613c91892f2.tex | |
| index a1b82370..f42813a3 100644 | |
| --- a/sail_latex_riscv/valzcsrop_of_numfc0e82db24db14fec87d0613c91892f2.tex | |
| +++ b/sail_latex_riscv/valzcsrop_of_numfc0e82db24db14fec87d0613c91892f2.tex | |
| @@ -1 +1 @@ | |
| -csrop_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> csrop | |
| \ No newline at end of file | |
| +csrop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> csrop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzediv_int5aaf4d3d5a3d15a7aebaf90d3bfb6650.tex b/sail_latex_riscv/valzediv_int5aaf4d3d5a3d15a7aebaf90d3bfb6650.tex | |
| index d0047de7..b727fb24 100644 | |
| --- a/sail_latex_riscv/valzediv_int5aaf4d3d5a3d15a7aebaf90d3bfb6650.tex | |
| +++ b/sail_latex_riscv/valzediv_int5aaf4d3d5a3d15a7aebaf90d3bfb6650.tex | |
| @@ -1 +1 @@ | |
| -ediv_int : forall 'n 'm. (int('n), int('m)) -> int(div('n, 'm)) | |
| \ No newline at end of file | |
| +ediv_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> int(div('n, 'm)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzemod_int8e3d74b3b6a72e24e6bd03570d8e21ba.tex b/sail_latex_riscv/valzemod_int8e3d74b3b6a72e24e6bd03570d8e21ba.tex | |
| index 8bd50f01..b1d10579 100644 | |
| --- a/sail_latex_riscv/valzemod_int8e3d74b3b6a72e24e6bd03570d8e21ba.tex | |
| +++ b/sail_latex_riscv/valzemod_int8e3d74b3b6a72e24e6bd03570d8e21ba.tex | |
| @@ -1 +1 @@ | |
| -emod_int : forall 'n 'm. (int('n), int('m)) -> int(mod('n, 'm)) | |
| \ No newline at end of file | |
| +emod_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> int(mod('n, 'm)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzeq_bits886ce7cf3ec93a28308e8d4e9d63f4be.tex b/sail_latex_riscv/valzeq_bits886ce7cf3ec93a28308e8d4e9d63f4be.tex | |
| index 6a46586c..afb10eb0 100644 | |
| --- a/sail_latex_riscv/valzeq_bits886ce7cf3ec93a28308e8d4e9d63f4be.tex | |
| +++ b/sail_latex_riscv/valzeq_bits886ce7cf3ec93a28308e8d4e9d63f4be.tex | |
| @@ -1 +1 @@ | |
| -eq_bits : forall 'n. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +eq_bits : forall ('n : Int). (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzeq_int364a98dbf8a9faa70e666cce41d8c1aa.tex b/sail_latex_riscv/valzeq_int364a98dbf8a9faa70e666cce41d8c1aa.tex | |
| index 047e45d4..6610e56e 100644 | |
| --- a/sail_latex_riscv/valzeq_int364a98dbf8a9faa70e666cce41d8c1aa.tex | |
| +++ b/sail_latex_riscv/valzeq_int364a98dbf8a9faa70e666cce41d8c1aa.tex | |
| @@ -1 +1 @@ | |
| -eq_int : forall 'n 'm. (int('n), int('m)) -> bool('n == 'm) | |
| \ No newline at end of file | |
| +eq_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> bool('n == 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_access_type_of_num6a15c4e70d2e9820f649a1cc6760e30a.tex b/sail_latex_riscv/valzext_access_type_of_num6a15c4e70d2e9820f649a1cc6760e30a.tex | |
| index 139064ac..7dfc45a2 100644 | |
| --- a/sail_latex_riscv/valzext_access_type_of_num6a15c4e70d2e9820f649a1cc6760e30a.tex | |
| +++ b/sail_latex_riscv/valzext_access_type_of_num6a15c4e70d2e9820f649a1cc6760e30a.tex | |
| @@ -1 +1 @@ | |
| -ext_access_type_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> ext_access_type | |
| \ No newline at end of file | |
| +ext_access_type_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> ext_access_type | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_check_phys_mem_readf999b4bc39f7274e42391ca653d8762d.tex b/sail_latex_riscv/valzext_check_phys_mem_readf999b4bc39f7274e42391ca653d8762d.tex | |
| index 4dbdadb4..caf8f7d7 100644 | |
| --- a/sail_latex_riscv/valzext_check_phys_mem_readf999b4bc39f7274e42391ca653d8762d.tex | |
| +++ b/sail_latex_riscv/valzext_check_phys_mem_readf999b4bc39f7274e42391ca653d8762d.tex | |
| @@ -1,2 +1,2 @@ | |
| -ext_check_phys_mem_read : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +ext_check_phys_mem_read : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), xlenbits, int('n), bool, bool, bool, bool) -> Ext_PhysAddr_Check | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_check_phys_mem_writeeec4b73c21b79225d7ccf5fb8b67ba61.tex b/sail_latex_riscv/valzext_check_phys_mem_writeeec4b73c21b79225d7ccf5fb8b67ba61.tex | |
| index c9aa9bef..9a897d59 100644 | |
| --- a/sail_latex_riscv/valzext_check_phys_mem_writeeec4b73c21b79225d7ccf5fb8b67ba61.tex | |
| +++ b/sail_latex_riscv/valzext_check_phys_mem_writeeec4b73c21b79225d7ccf5fb8b67ba61.tex | |
| @@ -1,2 +1,2 @@ | |
| -ext_check_phys_mem_write : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +ext_check_phys_mem_write : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (write_kind, xlenbits, int('n), bits(8 * 'n), mem_meta) -> Ext_PhysAddr_Check | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_exc_type_of_numa5807bd3284ecfd6e2edf0e304dee26e.tex b/sail_latex_riscv/valzext_exc_type_of_numa5807bd3284ecfd6e2edf0e304dee26e.tex | |
| index b84c31ca..c08af57b 100644 | |
| --- a/sail_latex_riscv/valzext_exc_type_of_numa5807bd3284ecfd6e2edf0e304dee26e.tex | |
| +++ b/sail_latex_riscv/valzext_exc_type_of_numa5807bd3284ecfd6e2edf0e304dee26e.tex | |
| @@ -1 +1 @@ | |
| -ext_exc_type_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> ext_exc_type | |
| \ No newline at end of file | |
| +ext_exc_type_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> ext_exc_type | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_ptw_error_of_num6c265a5359168121d0772efe3f31cd45.tex b/sail_latex_riscv/valzext_ptw_error_of_num6c265a5359168121d0772efe3f31cd45.tex | |
| index ce8fadaf..5be23438 100644 | |
| --- a/sail_latex_riscv/valzext_ptw_error_of_num6c265a5359168121d0772efe3f31cd45.tex | |
| +++ b/sail_latex_riscv/valzext_ptw_error_of_num6c265a5359168121d0772efe3f31cd45.tex | |
| @@ -1 +1 @@ | |
| -ext_ptw_error_of_num : forall 'e, (0 <= 'e & 'e <= 0). int('e) -> ext_ptw_error | |
| \ No newline at end of file | |
| +ext_ptw_error_of_num : forall ('e : Int), (0 <= 'e & 'e <= 0). int('e) -> ext_ptw_error | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_ptw_fail_of_numcc5cb6ad05de49125f246aa8627fb15b.tex b/sail_latex_riscv/valzext_ptw_fail_of_numcc5cb6ad05de49125f246aa8627fb15b.tex | |
| index 05e9ba54..56b34ee8 100644 | |
| --- a/sail_latex_riscv/valzext_ptw_fail_of_numcc5cb6ad05de49125f246aa8627fb15b.tex | |
| +++ b/sail_latex_riscv/valzext_ptw_fail_of_numcc5cb6ad05de49125f246aa8627fb15b.tex | |
| @@ -1 +1 @@ | |
| -ext_ptw_fail_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> ext_ptw_fail | |
| \ No newline at end of file | |
| +ext_ptw_fail_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> ext_ptw_fail | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_ptw_lc_of_numfefbb86ad247369523da5c5114df83a8.tex b/sail_latex_riscv/valzext_ptw_lc_of_numfefbb86ad247369523da5c5114df83a8.tex | |
| index 3d0ca88c..2162c4c5 100644 | |
| --- a/sail_latex_riscv/valzext_ptw_lc_of_numfefbb86ad247369523da5c5114df83a8.tex | |
| +++ b/sail_latex_riscv/valzext_ptw_lc_of_numfefbb86ad247369523da5c5114df83a8.tex | |
| @@ -1 +1 @@ | |
| -ext_ptw_lc_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> ext_ptw_lc | |
| \ No newline at end of file | |
| +ext_ptw_lc_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> ext_ptw_lc | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzext_ptw_sc_of_num2137f22f5407b82d12c8574662600e18.tex b/sail_latex_riscv/valzext_ptw_sc_of_num2137f22f5407b82d12c8574662600e18.tex | |
| index 8dfe6c8f..f7d2586d 100644 | |
| --- a/sail_latex_riscv/valzext_ptw_sc_of_num2137f22f5407b82d12c8574662600e18.tex | |
| +++ b/sail_latex_riscv/valzext_ptw_sc_of_num2137f22f5407b82d12c8574662600e18.tex | |
| @@ -1 +1 @@ | |
| -ext_ptw_sc_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> ext_ptw_sc | |
| \ No newline at end of file | |
| +ext_ptw_sc_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> ext_ptw_sc | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzextend_value8ddb26f3f92f6848beaff0fbcaa992f6.tex b/sail_latex_riscv/valzextend_value8ddb26f3f92f6848beaff0fbcaa992f6.tex | |
| index 4fa1e40a..c2ab7869 100644 | |
| --- a/sail_latex_riscv/valzextend_value8ddb26f3f92f6848beaff0fbcaa992f6.tex | |
| +++ b/sail_latex_riscv/valzextend_value8ddb26f3f92f6848beaff0fbcaa992f6.tex | |
| @@ -1 +1,2 @@ | |
| -extend_value : forall 'n, (0 < 'n & 'n <= xlen_bytes). (bool, MemoryOpResult(bits(8 * 'n))) -> MemoryOpResult(xlenbits) | |
| \ No newline at end of file | |
| +extend_value : forall ('n : Int), (0 < 'n & 'n <= xlen_bytes). | |
| + (bool, MemoryOpResult(bits(8 * 'n))) -> MemoryOpResult(xlenbits) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzextop_zzbb_of_num07a1c89bcee01ee6a4319e009b3130ba.tex b/sail_latex_riscv/valzextop_zzbb_of_num07a1c89bcee01ee6a4319e009b3130ba.tex | |
| index 0544a73a..c303e3bb 100644 | |
| --- a/sail_latex_riscv/valzextop_zzbb_of_num07a1c89bcee01ee6a4319e009b3130ba.tex | |
| +++ b/sail_latex_riscv/valzextop_zzbb_of_num07a1c89bcee01ee6a4319e009b3130ba.tex | |
| @@ -1 +1 @@ | |
| -extop_zbb_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> extop_zbb | |
| \ No newline at end of file | |
| +extop_zbb_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> extop_zbb | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzextstatus_of_num31bfbda5f90ad0f3cdbc5a0f1b63da2d.tex b/sail_latex_riscv/valzextstatus_of_num31bfbda5f90ad0f3cdbc5a0f1b63da2d.tex | |
| index 2de9d903..0ccb9b3e 100644 | |
| --- a/sail_latex_riscv/valzextstatus_of_num31bfbda5f90ad0f3cdbc5a0f1b63da2d.tex | |
| +++ b/sail_latex_riscv/valzextstatus_of_num31bfbda5f90ad0f3cdbc5a0f1b63da2d.tex | |
| @@ -1 +1 @@ | |
| -ExtStatus_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> ExtStatus | |
| \ No newline at end of file | |
| +ExtStatus_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> ExtStatus | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_bin_op_d_of_num97322de52afcea7a7f630a9ec29b7900.tex b/sail_latex_riscv/valzf_bin_op_d_of_num97322de52afcea7a7f630a9ec29b7900.tex | |
| index f392f0e1..4698a3c3 100644 | |
| --- a/sail_latex_riscv/valzf_bin_op_d_of_num97322de52afcea7a7f630a9ec29b7900.tex | |
| +++ b/sail_latex_riscv/valzf_bin_op_d_of_num97322de52afcea7a7f630a9ec29b7900.tex | |
| @@ -1 +1 @@ | |
| -f_bin_op_D_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> f_bin_op_D | |
| \ No newline at end of file | |
| +f_bin_op_D_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> f_bin_op_D | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_bin_op_h_of_num353ed4450b643a44781ade64a0c820a3.tex b/sail_latex_riscv/valzf_bin_op_h_of_num353ed4450b643a44781ade64a0c820a3.tex | |
| index 24e729c7..de8dd3de 100644 | |
| --- a/sail_latex_riscv/valzf_bin_op_h_of_num353ed4450b643a44781ade64a0c820a3.tex | |
| +++ b/sail_latex_riscv/valzf_bin_op_h_of_num353ed4450b643a44781ade64a0c820a3.tex | |
| @@ -1 +1 @@ | |
| -f_bin_op_H_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> f_bin_op_H | |
| \ No newline at end of file | |
| +f_bin_op_H_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> f_bin_op_H | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_bin_op_s_of_num66d590442d54517898ad2679db0d80bc.tex b/sail_latex_riscv/valzf_bin_op_s_of_num66d590442d54517898ad2679db0d80bc.tex | |
| index 56068557..ca3f4ab7 100644 | |
| --- a/sail_latex_riscv/valzf_bin_op_s_of_num66d590442d54517898ad2679db0d80bc.tex | |
| +++ b/sail_latex_riscv/valzf_bin_op_s_of_num66d590442d54517898ad2679db0d80bc.tex | |
| @@ -1 +1 @@ | |
| -f_bin_op_S_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> f_bin_op_S | |
| \ No newline at end of file | |
| +f_bin_op_S_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> f_bin_op_S | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_bin_rm_op_d_of_num4f1c6a877a7fdb6ce5cba8edac489378.tex b/sail_latex_riscv/valzf_bin_rm_op_d_of_num4f1c6a877a7fdb6ce5cba8edac489378.tex | |
| index 41cae177..2133bc1a 100644 | |
| --- a/sail_latex_riscv/valzf_bin_rm_op_d_of_num4f1c6a877a7fdb6ce5cba8edac489378.tex | |
| +++ b/sail_latex_riscv/valzf_bin_rm_op_d_of_num4f1c6a877a7fdb6ce5cba8edac489378.tex | |
| @@ -1 +1 @@ | |
| -f_bin_rm_op_D_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> f_bin_rm_op_D | |
| \ No newline at end of file | |
| +f_bin_rm_op_D_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> f_bin_rm_op_D | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_bin_rm_op_h_of_num1bae706bdd26d1197b71ccf7f7957468.tex b/sail_latex_riscv/valzf_bin_rm_op_h_of_num1bae706bdd26d1197b71ccf7f7957468.tex | |
| index 2dfda0d0..ed518a63 100644 | |
| --- a/sail_latex_riscv/valzf_bin_rm_op_h_of_num1bae706bdd26d1197b71ccf7f7957468.tex | |
| +++ b/sail_latex_riscv/valzf_bin_rm_op_h_of_num1bae706bdd26d1197b71ccf7f7957468.tex | |
| @@ -1 +1 @@ | |
| -f_bin_rm_op_H_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> f_bin_rm_op_H | |
| \ No newline at end of file | |
| +f_bin_rm_op_H_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> f_bin_rm_op_H | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_bin_rm_op_s_of_num425ba7f76e47ae16326c0417fe340273.tex b/sail_latex_riscv/valzf_bin_rm_op_s_of_num425ba7f76e47ae16326c0417fe340273.tex | |
| index c7d85da0..48b37c49 100644 | |
| --- a/sail_latex_riscv/valzf_bin_rm_op_s_of_num425ba7f76e47ae16326c0417fe340273.tex | |
| +++ b/sail_latex_riscv/valzf_bin_rm_op_s_of_num425ba7f76e47ae16326c0417fe340273.tex | |
| @@ -1 +1 @@ | |
| -f_bin_rm_op_S_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> f_bin_rm_op_S | |
| \ No newline at end of file | |
| +f_bin_rm_op_S_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> f_bin_rm_op_S | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_madd_op_d_of_num115462b951eadf3acf4b0a2bb11e801b.tex b/sail_latex_riscv/valzf_madd_op_d_of_num115462b951eadf3acf4b0a2bb11e801b.tex | |
| index f91b2592..e2b8d5f7 100644 | |
| --- a/sail_latex_riscv/valzf_madd_op_d_of_num115462b951eadf3acf4b0a2bb11e801b.tex | |
| +++ b/sail_latex_riscv/valzf_madd_op_d_of_num115462b951eadf3acf4b0a2bb11e801b.tex | |
| @@ -1 +1 @@ | |
| -f_madd_op_D_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> f_madd_op_D | |
| \ No newline at end of file | |
| +f_madd_op_D_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> f_madd_op_D | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_madd_op_h_of_num9c6ba0afa4ca20d700feef2eab722786.tex b/sail_latex_riscv/valzf_madd_op_h_of_num9c6ba0afa4ca20d700feef2eab722786.tex | |
| index ba0bea8e..07b63ab8 100644 | |
| --- a/sail_latex_riscv/valzf_madd_op_h_of_num9c6ba0afa4ca20d700feef2eab722786.tex | |
| +++ b/sail_latex_riscv/valzf_madd_op_h_of_num9c6ba0afa4ca20d700feef2eab722786.tex | |
| @@ -1 +1 @@ | |
| -f_madd_op_H_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> f_madd_op_H | |
| \ No newline at end of file | |
| +f_madd_op_H_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> f_madd_op_H | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_madd_op_s_of_num9bfe1beb29f1f97cf6b7643bd9febe9b.tex b/sail_latex_riscv/valzf_madd_op_s_of_num9bfe1beb29f1f97cf6b7643bd9febe9b.tex | |
| index 5aabfffb..a4d7604a 100644 | |
| --- a/sail_latex_riscv/valzf_madd_op_s_of_num9bfe1beb29f1f97cf6b7643bd9febe9b.tex | |
| +++ b/sail_latex_riscv/valzf_madd_op_s_of_num9bfe1beb29f1f97cf6b7643bd9febe9b.tex | |
| @@ -1 +1 @@ | |
| -f_madd_op_S_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> f_madd_op_S | |
| \ No newline at end of file | |
| +f_madd_op_S_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> f_madd_op_S | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_un_op_d_of_num20c93bb1c359c6ff0f65b3c91dbe8c85.tex b/sail_latex_riscv/valzf_un_op_d_of_num20c93bb1c359c6ff0f65b3c91dbe8c85.tex | |
| index 3509e2e6..22c5be58 100644 | |
| --- a/sail_latex_riscv/valzf_un_op_d_of_num20c93bb1c359c6ff0f65b3c91dbe8c85.tex | |
| +++ b/sail_latex_riscv/valzf_un_op_d_of_num20c93bb1c359c6ff0f65b3c91dbe8c85.tex | |
| @@ -1 +1 @@ | |
| -f_un_op_D_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> f_un_op_D | |
| \ No newline at end of file | |
| +f_un_op_D_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> f_un_op_D | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_un_op_h_of_numdea98b2b78368536a12adef1e0b08a5f.tex b/sail_latex_riscv/valzf_un_op_h_of_numdea98b2b78368536a12adef1e0b08a5f.tex | |
| index d78a9222..00d12e9d 100644 | |
| --- a/sail_latex_riscv/valzf_un_op_h_of_numdea98b2b78368536a12adef1e0b08a5f.tex | |
| +++ b/sail_latex_riscv/valzf_un_op_h_of_numdea98b2b78368536a12adef1e0b08a5f.tex | |
| @@ -1 +1 @@ | |
| -f_un_op_H_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> f_un_op_H | |
| \ No newline at end of file | |
| +f_un_op_H_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> f_un_op_H | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_un_op_s_of_num428b8623c493e45bc273b3e1a0c895e0.tex b/sail_latex_riscv/valzf_un_op_s_of_num428b8623c493e45bc273b3e1a0c895e0.tex | |
| index fb4778e3..39428d68 100644 | |
| --- a/sail_latex_riscv/valzf_un_op_s_of_num428b8623c493e45bc273b3e1a0c895e0.tex | |
| +++ b/sail_latex_riscv/valzf_un_op_s_of_num428b8623c493e45bc273b3e1a0c895e0.tex | |
| @@ -1 +1 @@ | |
| -f_un_op_S_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> f_un_op_S | |
| \ No newline at end of file | |
| +f_un_op_S_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> f_un_op_S | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_un_rm_op_d_of_num3c7528aaf2a777986f767617d6c66717.tex b/sail_latex_riscv/valzf_un_rm_op_d_of_num3c7528aaf2a777986f767617d6c66717.tex | |
| index 83668d72..2cd909f8 100644 | |
| --- a/sail_latex_riscv/valzf_un_rm_op_d_of_num3c7528aaf2a777986f767617d6c66717.tex | |
| +++ b/sail_latex_riscv/valzf_un_rm_op_d_of_num3c7528aaf2a777986f767617d6c66717.tex | |
| @@ -1 +1 @@ | |
| -f_un_rm_op_D_of_num : forall 'e, (0 <= 'e & 'e <= 10). int('e) -> f_un_rm_op_D | |
| \ No newline at end of file | |
| +f_un_rm_op_D_of_num : forall ('e : Int), (0 <= 'e & 'e <= 10). int('e) -> f_un_rm_op_D | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_un_rm_op_h_of_nume9619d76cbed957bef00f9daac49d062.tex b/sail_latex_riscv/valzf_un_rm_op_h_of_nume9619d76cbed957bef00f9daac49d062.tex | |
| index 7680e0eb..f816e98c 100644 | |
| --- a/sail_latex_riscv/valzf_un_rm_op_h_of_nume9619d76cbed957bef00f9daac49d062.tex | |
| +++ b/sail_latex_riscv/valzf_un_rm_op_h_of_nume9619d76cbed957bef00f9daac49d062.tex | |
| @@ -1 +1 @@ | |
| -f_un_rm_op_H_of_num : forall 'e, (0 <= 'e & 'e <= 12). int('e) -> f_un_rm_op_H | |
| \ No newline at end of file | |
| +f_un_rm_op_H_of_num : forall ('e : Int), (0 <= 'e & 'e <= 12). int('e) -> f_un_rm_op_H | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzf_un_rm_op_s_of_numcf978158d6a6f45fe1893c4a9c122140.tex b/sail_latex_riscv/valzf_un_rm_op_s_of_numcf978158d6a6f45fe1893c4a9c122140.tex | |
| index 764922ff..d931e19d 100644 | |
| --- a/sail_latex_riscv/valzf_un_rm_op_s_of_numcf978158d6a6f45fe1893c4a9c122140.tex | |
| +++ b/sail_latex_riscv/valzf_un_rm_op_s_of_numcf978158d6a6f45fe1893c4a9c122140.tex | |
| @@ -1 +1 @@ | |
| -f_un_rm_op_S_of_num : forall 'e, (0 <= 'e & 'e <= 8). int('e) -> f_un_rm_op_S | |
| \ No newline at end of file | |
| +f_un_rm_op_S_of_num : forall ('e : Int), (0 <= 'e & 'e <= 8). int('e) -> f_un_rm_op_S | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzflush_tlb_entry8073b262f27cbbda50ac10a3cc21c463.tex b/sail_latex_riscv/valzflush_tlb_entry8073b262f27cbbda50ac10a3cc21c463.tex | |
| index f7019855..f0fb330a 100644 | |
| --- a/sail_latex_riscv/valzflush_tlb_entry8073b262f27cbbda50ac10a3cc21c463.tex | |
| +++ b/sail_latex_riscv/valzflush_tlb_entry8073b262f27cbbda50ac10a3cc21c463.tex | |
| @@ -1,2 +1,2 @@ | |
| -flush_TLB_Entry : forall 'asidlen 'valen 'palen 'ptelen. | |
| +flush_TLB_Entry : forall ('asidlen : Int) ('valen : Int) ('palen : Int) ('ptelen : Int). | |
| (TLB_Entry('asidlen, 'valen, 'palen, 'ptelen), option(bits('asidlen)), option(bits('valen))) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfvffunct6_of_num79de32fe21ee545a75bce82c02daeaf7.tex b/sail_latex_riscv/valzfvffunct6_of_num79de32fe21ee545a75bce82c02daeaf7.tex | |
| index dbd5c917..019fb0d6 100644 | |
| --- a/sail_latex_riscv/valzfvffunct6_of_num79de32fe21ee545a75bce82c02daeaf7.tex | |
| +++ b/sail_latex_riscv/valzfvffunct6_of_num79de32fe21ee545a75bce82c02daeaf7.tex | |
| @@ -1 +1 @@ | |
| -fvffunct6_of_num : forall 'e, (0 <= 'e & 'e <= 12). int('e) -> fvffunct6 | |
| \ No newline at end of file | |
| +fvffunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 12). int('e) -> fvffunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfvfmafunct6_of_num9e08c24f2bc439138de611102f1935ac.tex b/sail_latex_riscv/valzfvfmafunct6_of_num9e08c24f2bc439138de611102f1935ac.tex | |
| index 09394fb9..7bddafc6 100644 | |
| --- a/sail_latex_riscv/valzfvfmafunct6_of_num9e08c24f2bc439138de611102f1935ac.tex | |
| +++ b/sail_latex_riscv/valzfvfmafunct6_of_num9e08c24f2bc439138de611102f1935ac.tex | |
| @@ -1 +1 @@ | |
| -fvfmafunct6_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> fvfmafunct6 | |
| \ No newline at end of file | |
| +fvfmafunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> fvfmafunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfvfmfunct6_of_numeebdf0f367324226380fc79b542cb56a.tex b/sail_latex_riscv/valzfvfmfunct6_of_numeebdf0f367324226380fc79b542cb56a.tex | |
| index 96cecce6..788a6a23 100644 | |
| --- a/sail_latex_riscv/valzfvfmfunct6_of_numeebdf0f367324226380fc79b542cb56a.tex | |
| +++ b/sail_latex_riscv/valzfvfmfunct6_of_numeebdf0f367324226380fc79b542cb56a.tex | |
| @@ -1 +1 @@ | |
| -fvfmfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> fvfmfunct6 | |
| \ No newline at end of file | |
| +fvfmfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> fvfmfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfvvfunct6_of_num2f289b1e5c55a920d8a8ab17c005b73c.tex b/sail_latex_riscv/valzfvvfunct6_of_num2f289b1e5c55a920d8a8ab17c005b73c.tex | |
| index 0113b9e8..1f8c5f5f 100644 | |
| --- a/sail_latex_riscv/valzfvvfunct6_of_num2f289b1e5c55a920d8a8ab17c005b73c.tex | |
| +++ b/sail_latex_riscv/valzfvvfunct6_of_num2f289b1e5c55a920d8a8ab17c005b73c.tex | |
| @@ -1 +1 @@ | |
| -fvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 8). int('e) -> fvvfunct6 | |
| \ No newline at end of file | |
| +fvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 8). int('e) -> fvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfvvmafunct6_of_numcf4db6c4455537d9aedb7346cfc7b784.tex b/sail_latex_riscv/valzfvvmafunct6_of_numcf4db6c4455537d9aedb7346cfc7b784.tex | |
| index 02805eff..52a68906 100644 | |
| --- a/sail_latex_riscv/valzfvvmafunct6_of_numcf4db6c4455537d9aedb7346cfc7b784.tex | |
| +++ b/sail_latex_riscv/valzfvvmafunct6_of_numcf4db6c4455537d9aedb7346cfc7b784.tex | |
| @@ -1 +1 @@ | |
| -fvvmafunct6_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> fvvmafunct6 | |
| \ No newline at end of file | |
| +fvvmafunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> fvvmafunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfvvmfunct6_of_numa319eb6bdfe69ab520a874d8feb59544.tex b/sail_latex_riscv/valzfvvmfunct6_of_numa319eb6bdfe69ab520a874d8feb59544.tex | |
| index 0a5d51fb..67de509f 100644 | |
| --- a/sail_latex_riscv/valzfvvmfunct6_of_numa319eb6bdfe69ab520a874d8feb59544.tex | |
| +++ b/sail_latex_riscv/valzfvvmfunct6_of_numa319eb6bdfe69ab520a874d8feb59544.tex | |
| @@ -1 +1 @@ | |
| -fvvmfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> fvvmfunct6 | |
| \ No newline at end of file | |
| +fvvmfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> fvvmfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfwffunct6_of_numc40e4d5f36ce3f2380e987ca952c1553.tex b/sail_latex_riscv/valzfwffunct6_of_numc40e4d5f36ce3f2380e987ca952c1553.tex | |
| index 36d01a90..a10c2b37 100644 | |
| --- a/sail_latex_riscv/valzfwffunct6_of_numc40e4d5f36ce3f2380e987ca952c1553.tex | |
| +++ b/sail_latex_riscv/valzfwffunct6_of_numc40e4d5f36ce3f2380e987ca952c1553.tex | |
| @@ -1 +1 @@ | |
| -fwffunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> fwffunct6 | |
| \ No newline at end of file | |
| +fwffunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> fwffunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfwvffunct6_of_num719fe181fbd4c495177664369a5be256.tex b/sail_latex_riscv/valzfwvffunct6_of_num719fe181fbd4c495177664369a5be256.tex | |
| index cb9535ba..5e755822 100644 | |
| --- a/sail_latex_riscv/valzfwvffunct6_of_num719fe181fbd4c495177664369a5be256.tex | |
| +++ b/sail_latex_riscv/valzfwvffunct6_of_num719fe181fbd4c495177664369a5be256.tex | |
| @@ -1 +1 @@ | |
| -fwvffunct6_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> fwvffunct6 | |
| \ No newline at end of file | |
| +fwvffunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> fwvffunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfwvfmafunct6_of_numda62a8e1e6866c2ff56747a8f4bcce55.tex b/sail_latex_riscv/valzfwvfmafunct6_of_numda62a8e1e6866c2ff56747a8f4bcce55.tex | |
| index e9d3c170..3ea2fd79 100644 | |
| --- a/sail_latex_riscv/valzfwvfmafunct6_of_numda62a8e1e6866c2ff56747a8f4bcce55.tex | |
| +++ b/sail_latex_riscv/valzfwvfmafunct6_of_numda62a8e1e6866c2ff56747a8f4bcce55.tex | |
| @@ -1 +1 @@ | |
| -fwvfmafunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> fwvfmafunct6 | |
| \ No newline at end of file | |
| +fwvfmafunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> fwvfmafunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfwvfunct6_of_num0bae662dff4b93da86595ce9d0785ad4.tex b/sail_latex_riscv/valzfwvfunct6_of_num0bae662dff4b93da86595ce9d0785ad4.tex | |
| index cb1d0dd3..d4740b26 100644 | |
| --- a/sail_latex_riscv/valzfwvfunct6_of_num0bae662dff4b93da86595ce9d0785ad4.tex | |
| +++ b/sail_latex_riscv/valzfwvfunct6_of_num0bae662dff4b93da86595ce9d0785ad4.tex | |
| @@ -1 +1 @@ | |
| -fwvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> fwvfunct6 | |
| \ No newline at end of file | |
| +fwvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> fwvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfwvvfunct6_of_num7574d421fbd55881a2b57ae7eb96ded2.tex b/sail_latex_riscv/valzfwvvfunct6_of_num7574d421fbd55881a2b57ae7eb96ded2.tex | |
| index cf8fd933..96e9fa0a 100644 | |
| --- a/sail_latex_riscv/valzfwvvfunct6_of_num7574d421fbd55881a2b57ae7eb96ded2.tex | |
| +++ b/sail_latex_riscv/valzfwvvfunct6_of_num7574d421fbd55881a2b57ae7eb96ded2.tex | |
| @@ -1 +1 @@ | |
| -fwvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> fwvvfunct6 | |
| \ No newline at end of file | |
| +fwvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> fwvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzfwvvmafunct6_of_num806418eee37f4364883059811d7fc158.tex b/sail_latex_riscv/valzfwvvmafunct6_of_num806418eee37f4364883059811d7fc158.tex | |
| index 3489a273..f354def6 100644 | |
| --- a/sail_latex_riscv/valzfwvvmafunct6_of_num806418eee37f4364883059811d7fc158.tex | |
| +++ b/sail_latex_riscv/valzfwvvmafunct6_of_num806418eee37f4364883059811d7fc158.tex | |
| @@ -1 +1 @@ | |
| -fwvvmafunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> fwvvmafunct6 | |
| \ No newline at end of file | |
| +fwvvmafunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> fwvvmafunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzget_slice_int3c313e973dc436aff309f66096377164.tex b/sail_latex_riscv/valzget_slice_int3c313e973dc436aff309f66096377164.tex | |
| index a96d18de..2401b150 100644 | |
| --- a/sail_latex_riscv/valzget_slice_int3c313e973dc436aff309f66096377164.tex | |
| +++ b/sail_latex_riscv/valzget_slice_int3c313e973dc436aff309f66096377164.tex | |
| @@ -1 +1 @@ | |
| -get_slice_int : forall 'w. (int('w), int, int) -> bits('w) | |
| \ No newline at end of file | |
| +get_slice_int : forall ('w : Int). (int('w), int, int) -> bits('w) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzgt_intef94a8c66f39b1f715cb72941ed95921.tex b/sail_latex_riscv/valzgt_intef94a8c66f39b1f715cb72941ed95921.tex | |
| index e20935a0..18834fb2 100644 | |
| --- a/sail_latex_riscv/valzgt_intef94a8c66f39b1f715cb72941ed95921.tex | |
| +++ b/sail_latex_riscv/valzgt_intef94a8c66f39b1f715cb72941ed95921.tex | |
| @@ -1 +1 @@ | |
| -gt_int : forall 'n 'm. (int('n), int('m)) -> bool('n > 'm) | |
| \ No newline at end of file | |
| +gt_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> bool('n > 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzgteq_inte32033a8d137f46d187455cff7dbe40e.tex b/sail_latex_riscv/valzgteq_inte32033a8d137f46d187455cff7dbe40e.tex | |
| index 4db71480..b68a1904 100644 | |
| --- a/sail_latex_riscv/valzgteq_inte32033a8d137f46d187455cff7dbe40e.tex | |
| +++ b/sail_latex_riscv/valzgteq_inte32033a8d137f46d187455cff7dbe40e.tex | |
| @@ -1 +1 @@ | |
| -gteq_int : forall 'n 'm. (int('n), int('m)) -> bool('n >= 'm) | |
| \ No newline at end of file | |
| +gteq_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> bool('n >= 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzhex_bits6151f0f3396959dd9a279f1e74f7d7ec.tex b/sail_latex_riscv/valzhex_bits6151f0f3396959dd9a279f1e74f7d7ec.tex | |
| index 3fa17e2c..680fc969 100644 | |
| --- a/sail_latex_riscv/valzhex_bits6151f0f3396959dd9a279f1e74f7d7ec.tex | |
| +++ b/sail_latex_riscv/valzhex_bits6151f0f3396959dd9a279f1e74f7d7ec.tex | |
| @@ -1 +1 @@ | |
| -hex_bits : forall 'n, 'n > 0. bits('n) <-> (int('n), string) | |
| \ No newline at end of file | |
| +hex_bits : forall ('n : Int), 'n > 0. bits('n) <-> (int('n), string) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzhtif_load7bc11b4853a5dae019f61722a0a6d6d7.tex b/sail_latex_riscv/valzhtif_load7bc11b4853a5dae019f61722a0a6d6d7.tex | |
| index 1d1ce66d..1e5abcea 100644 | |
| --- a/sail_latex_riscv/valzhtif_load7bc11b4853a5dae019f61722a0a6d6d7.tex | |
| +++ b/sail_latex_riscv/valzhtif_load7bc11b4853a5dae019f61722a0a6d6d7.tex | |
| @@ -1 +1 @@ | |
| -htif_load : forall 'n, 'n > 0. (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| +htif_load : forall ('n : Int), 'n > 0. (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzhtif_storeab9d062182e5f884583204ccd435221d.tex b/sail_latex_riscv/valzhtif_storeab9d062182e5f884583204ccd435221d.tex | |
| index 7d34bb12..ad169dbe 100644 | |
| --- a/sail_latex_riscv/valzhtif_storeab9d062182e5f884583204ccd435221d.tex | |
| +++ b/sail_latex_riscv/valzhtif_storeab9d062182e5f884583204ccd435221d.tex | |
| @@ -1 +1 @@ | |
| -htif_store : forall 'n, (0 < 'n & 'n <= 8). (xlenbits, int('n), bits(8 * 'n)) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| +htif_store : forall ('n : Int), (0 < 'n & 'n <= 8). (xlenbits, int('n), bits(8 * 'n)) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzinterrupttype_of_numbcca70e199dd805ea962d03dd661ceb8.tex b/sail_latex_riscv/valzinterrupttype_of_numbcca70e199dd805ea962d03dd661ceb8.tex | |
| index 49dde9fa..8ddb2ca2 100644 | |
| --- a/sail_latex_riscv/valzinterrupttype_of_numbcca70e199dd805ea962d03dd661ceb8.tex | |
| +++ b/sail_latex_riscv/valzinterrupttype_of_numbcca70e199dd805ea962d03dd661ceb8.tex | |
| @@ -1 +1 @@ | |
| -InterruptType_of_num : forall 'e, (0 <= 'e & 'e <= 8). int('e) -> InterruptType | |
| \ No newline at end of file | |
| +InterruptType_of_num : forall ('e : Int), (0 <= 'e & 'e <= 8). int('e) -> InterruptType | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valziop_of_numd466c8622bc5d10ff829fe51ba16e9a6.tex b/sail_latex_riscv/valziop_of_numd466c8622bc5d10ff829fe51ba16e9a6.tex | |
| index c3dafb7c..c514b465 100644 | |
| --- a/sail_latex_riscv/valziop_of_numd466c8622bc5d10ff829fe51ba16e9a6.tex | |
| +++ b/sail_latex_riscv/valziop_of_numd466c8622bc5d10ff829fe51ba16e9a6.tex | |
| @@ -1 +1 @@ | |
| -iop_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> iop | |
| \ No newline at end of file | |
| +iop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> iop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzis_aligned_addr6fae0ea13237382ac6720d04123fd943.tex b/sail_latex_riscv/valzis_aligned_addr6fae0ea13237382ac6720d04123fd943.tex | |
| index efc7d3f5..7860c217 100644 | |
| --- a/sail_latex_riscv/valzis_aligned_addr6fae0ea13237382ac6720d04123fd943.tex | |
| +++ b/sail_latex_riscv/valzis_aligned_addr6fae0ea13237382ac6720d04123fd943.tex | |
| @@ -1 +1 @@ | |
| -is_aligned_addr : forall 'n. (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +is_aligned_addr : forall ('n : Int). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzlog2f1d54b94659ec734fd27c7a094ab6846.tex b/sail_latex_riscv/valzlog2f1d54b94659ec734fd27c7a094ab6846.tex | |
| index 27c70e20..f10f314a 100644 | |
| --- a/sail_latex_riscv/valzlog2f1d54b94659ec734fd27c7a094ab6846.tex | |
| +++ b/sail_latex_riscv/valzlog2f1d54b94659ec734fd27c7a094ab6846.tex | |
| @@ -1 +1 @@ | |
| -log2 : forall 'n, 'n in {1, 2, 4, 8, 16, 32, 64}. int('n) -> int | |
| \ No newline at end of file | |
| +log2 : forall ('n : Int), 'n in {1, 2, 4, 8, 16, 32, 64}. int('n) -> int | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzlt_int996a8b8c361a31bed6b5509ca6686e1a.tex b/sail_latex_riscv/valzlt_int996a8b8c361a31bed6b5509ca6686e1a.tex | |
| index 54555d81..b42c7533 100644 | |
| --- a/sail_latex_riscv/valzlt_int996a8b8c361a31bed6b5509ca6686e1a.tex | |
| +++ b/sail_latex_riscv/valzlt_int996a8b8c361a31bed6b5509ca6686e1a.tex | |
| @@ -1 +1 @@ | |
| -lt_int : forall 'n 'm. (int('n), int('m)) -> bool('n < 'm) | |
| \ No newline at end of file | |
| +lt_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> bool('n < 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzlteq_intc80d1082e443aa434e39355e493ece1e.tex b/sail_latex_riscv/valzlteq_intc80d1082e443aa434e39355e493ece1e.tex | |
| index 3688bb05..0f20ca58 100644 | |
| --- a/sail_latex_riscv/valzlteq_intc80d1082e443aa434e39355e493ece1e.tex | |
| +++ b/sail_latex_riscv/valzlteq_intc80d1082e443aa434e39355e493ece1e.tex | |
| @@ -1 +1 @@ | |
| -lteq_int : forall 'n 'm. (int('n), int('m)) -> bool('n <= 'm) | |
| \ No newline at end of file | |
| +lteq_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> bool('n <= 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmake_tlb_entry6b22aedb2f264f70f3e1bd2d5dd6f057.tex b/sail_latex_riscv/valzmake_tlb_entry6b22aedb2f264f70f3e1bd2d5dd6f057.tex | |
| index 7c1cd547..75606242 100644 | |
| --- a/sail_latex_riscv/valzmake_tlb_entry6b22aedb2f264f70f3e1bd2d5dd6f057.tex | |
| +++ b/sail_latex_riscv/valzmake_tlb_entry6b22aedb2f264f70f3e1bd2d5dd6f057.tex | |
| @@ -1,2 +1,2 @@ | |
| -make_TLB_Entry : forall 'asidlen 'valen 'palen 'ptelen, 'valen > 0. | |
| +make_TLB_Entry : forall ('asidlen : Int) ('valen : Int) ('palen : Int) ('ptelen : Int), 'valen > 0. | |
| (bits('asidlen), bool, bits('valen), bits('palen), bits('ptelen), nat, bits('palen), nat) -> TLB_Entry('asidlen, 'valen, 'palen, 'ptelen) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmaskfunct3_of_num624331c6ca0f00afa5dfcb3adba246a8.tex b/sail_latex_riscv/valzmaskfunct3_of_num624331c6ca0f00afa5dfcb3adba246a8.tex | |
| index 6103e250..6a50fa7b 100644 | |
| --- a/sail_latex_riscv/valzmaskfunct3_of_num624331c6ca0f00afa5dfcb3adba246a8.tex | |
| +++ b/sail_latex_riscv/valzmaskfunct3_of_num624331c6ca0f00afa5dfcb3adba246a8.tex | |
| @@ -1 +1 @@ | |
| -maskfunct3_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> maskfunct3 | |
| \ No newline at end of file | |
| +maskfunct3_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> maskfunct3 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmatch_tlb_entry15cb314356c461bfc7d1b30f45fecb98.tex b/sail_latex_riscv/valzmatch_tlb_entry15cb314356c461bfc7d1b30f45fecb98.tex | |
| index fe460711..18f5bc23 100644 | |
| --- a/sail_latex_riscv/valzmatch_tlb_entry15cb314356c461bfc7d1b30f45fecb98.tex | |
| +++ b/sail_latex_riscv/valzmatch_tlb_entry15cb314356c461bfc7d1b30f45fecb98.tex | |
| @@ -1,2 +1,2 @@ | |
| -match_TLB_Entry : forall 'asidlen 'valen 'palen 'ptelen. | |
| +match_TLB_Entry : forall ('asidlen : Int) ('valen : Int) ('palen : Int) ('ptelen : Int). | |
| (TLB_Entry('asidlen, 'valen, 'palen, 'ptelen), bits('asidlen), bits('valen)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmax84a1c708b7c8789c33f72b5bb9ee31e8.tex b/sail_latex_riscv/valzmax84a1c708b7c8789c33f72b5bb9ee31e8.tex | |
| index 27715157..577d6466 100644 | |
| --- a/sail_latex_riscv/valzmax84a1c708b7c8789c33f72b5bb9ee31e8.tex | |
| +++ b/sail_latex_riscv/valzmax84a1c708b7c8789c33f72b5bb9ee31e8.tex | |
| @@ -1 +1 @@ | |
| -MAX : forall 'n, 'n >= 0. int('n) -> int(2 ^ 'n - 1) | |
| \ No newline at end of file | |
| +MAX : forall ('n : Int), 'n >= 0. int('n) -> int(2 ^ 'n - 1) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmax_inta8f95a0baf723be8373221a893afa8f3.tex b/sail_latex_riscv/valzmax_inta8f95a0baf723be8373221a893afa8f3.tex | |
| index ff031ff4..1a01107f 100644 | |
| --- a/sail_latex_riscv/valzmax_inta8f95a0baf723be8373221a893afa8f3.tex | |
| +++ b/sail_latex_riscv/valzmax_inta8f95a0baf723be8373221a893afa8f3.tex | |
| @@ -1 +1,2 @@ | |
| -max_int : forall 'x 'y. (int('x), int('y)) -> {'z, ('x >= 'y & 'z == 'x | 'x < 'y & 'z == 'y). int('z)} | |
| \ No newline at end of file | |
| +max_int : forall ('x : Int) ('y : Int). | |
| + (int('x), int('y)) -> {('z : Int), ('x >= 'y & 'z == 'x | 'x < 'y & 'z == 'y). int('z)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_read_metaa66233a97620233d3f80f4bf1a13c232.tex b/sail_latex_riscv/valzmem_read_metaa66233a97620233d3f80f4bf1a13c232.tex | |
| index b636529e..c0a4c696 100644 | |
| --- a/sail_latex_riscv/valzmem_read_metaa66233a97620233d3f80f4bf1a13c232.tex | |
| +++ b/sail_latex_riscv/valzmem_read_metaa66233a97620233d3f80f4bf1a13c232.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_read_meta : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_read_meta : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), xlenbits, int('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_read_priv0ea70ac99462900b0ee737fe6e1d211b.tex b/sail_latex_riscv/valzmem_read_priv0ea70ac99462900b0ee737fe6e1d211b.tex | |
| index 6d5f40c7..c82a3999 100644 | |
| --- a/sail_latex_riscv/valzmem_read_priv0ea70ac99462900b0ee737fe6e1d211b.tex | |
| +++ b/sail_latex_riscv/valzmem_read_priv0ea70ac99462900b0ee737fe6e1d211b.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_read_priv : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_read_priv : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), Privilege, xlenbits, int('n), bool, bool, bool) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_read_priv_metad38f116b4c7942cd9d9f7441528c45e1.tex b/sail_latex_riscv/valzmem_read_priv_metad38f116b4c7942cd9d9f7441528c45e1.tex | |
| index 05f30c1b..4ab0c67d 100644 | |
| --- a/sail_latex_riscv/valzmem_read_priv_metad38f116b4c7942cd9d9f7441528c45e1.tex | |
| +++ b/sail_latex_riscv/valzmem_read_priv_metad38f116b4c7942cd9d9f7441528c45e1.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_read_priv_meta : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_read_priv_meta : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), Privilege, xlenbits, int('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_readbc59b9b8e622af015b97ceb8dcd5c69e.tex b/sail_latex_riscv/valzmem_readbc59b9b8e622af015b97ceb8dcd5c69e.tex | |
| index 6bf68965..d0cab412 100644 | |
| --- a/sail_latex_riscv/valzmem_readbc59b9b8e622af015b97ceb8dcd5c69e.tex | |
| +++ b/sail_latex_riscv/valzmem_readbc59b9b8e622af015b97ceb8dcd5c69e.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_read : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_read : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), xlenbits, int('n), bool, bool, bool) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_write_eaf1486ee81ccf925e874de8977b0270e9.tex b/sail_latex_riscv/valzmem_write_eaf1486ee81ccf925e874de8977b0270e9.tex | |
| index de0c626d..54f628c6 100644 | |
| --- a/sail_latex_riscv/valzmem_write_eaf1486ee81ccf925e874de8977b0270e9.tex | |
| +++ b/sail_latex_riscv/valzmem_write_eaf1486ee81ccf925e874de8977b0270e9.tex | |
| @@ -1 +1,2 @@ | |
| -mem_write_ea : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n), bool, bool, bool) -> MemoryOpResult(unit) | |
| \ No newline at end of file | |
| +mem_write_ea : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| + (xlenbits, int('n), bool, bool, bool) -> MemoryOpResult(unit) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_write_value_meta586f37dd78d9b5be2a948e83778e6186.tex b/sail_latex_riscv/valzmem_write_value_meta586f37dd78d9b5be2a948e83778e6186.tex | |
| index f0ab8cb4..370f6dcb 100644 | |
| --- a/sail_latex_riscv/valzmem_write_value_meta586f37dd78d9b5be2a948e83778e6186.tex | |
| +++ b/sail_latex_riscv/valzmem_write_value_meta586f37dd78d9b5be2a948e83778e6186.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_write_value_meta : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_write_value_meta : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (xlenbits, int('n), bits(8 * 'n), ext_access_type, mem_meta, bool, bool, bool) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_write_value_priv_meta8704060509807d04b1fcb48d80cdcd15.tex b/sail_latex_riscv/valzmem_write_value_priv_meta8704060509807d04b1fcb48d80cdcd15.tex | |
| index b1abee73..f2ca510c 100644 | |
| --- a/sail_latex_riscv/valzmem_write_value_priv_meta8704060509807d04b1fcb48d80cdcd15.tex | |
| +++ b/sail_latex_riscv/valzmem_write_value_priv_meta8704060509807d04b1fcb48d80cdcd15.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_write_value_priv_meta : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_write_value_priv_meta : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (xlenbits, int('n), bits(8 * 'n), AccessType(ext_access_type), Privilege, mem_meta, bool, bool, bool) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_write_value_privd13a5127f92750616ff239409609b843.tex b/sail_latex_riscv/valzmem_write_value_privd13a5127f92750616ff239409609b843.tex | |
| index df0d3ebe..e0144926 100644 | |
| --- a/sail_latex_riscv/valzmem_write_value_privd13a5127f92750616ff239409609b843.tex | |
| +++ b/sail_latex_riscv/valzmem_write_value_privd13a5127f92750616ff239409609b843.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_write_value_priv : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_write_value_priv : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (xlenbits, int('n), bits(8 * 'n), Privilege, bool, bool, bool) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmem_write_valuec32f59efd2dcb7ea78ea4c9778bdf2e1.tex b/sail_latex_riscv/valzmem_write_valuec32f59efd2dcb7ea78ea4c9778bdf2e1.tex | |
| index 350cffbe..5996216b 100644 | |
| --- a/sail_latex_riscv/valzmem_write_valuec32f59efd2dcb7ea78ea4c9778bdf2e1.tex | |
| +++ b/sail_latex_riscv/valzmem_write_valuec32f59efd2dcb7ea78ea4c9778bdf2e1.tex | |
| @@ -1,2 +1,2 @@ | |
| -mem_write_value : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mem_write_value : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (xlenbits, int('n), bits(8 * 'n), bool, bool, bool) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmin_intaf4626ab3b9c2d0b9494d7e8d265dd26.tex b/sail_latex_riscv/valzmin_intaf4626ab3b9c2d0b9494d7e8d265dd26.tex | |
| index f2ed4224..e1d4d640 100644 | |
| --- a/sail_latex_riscv/valzmin_intaf4626ab3b9c2d0b9494d7e8d265dd26.tex | |
| +++ b/sail_latex_riscv/valzmin_intaf4626ab3b9c2d0b9494d7e8d265dd26.tex | |
| @@ -1 +1,2 @@ | |
| -min_int : forall 'x 'y. (int('x), int('y)) -> {'z, ('x <= 'y & 'z == 'x | 'x > 'y & 'z == 'y). int('z)} | |
| \ No newline at end of file | |
| +min_int : forall ('x : Int) ('y : Int). | |
| + (int('x), int('y)) -> {('z : Int), ('x <= 'y & 'z == 'x | 'x > 'y & 'z == 'y). int('z)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmmfunct6_of_numadae1ce42e0617ef0f22dc18028bb68c.tex b/sail_latex_riscv/valzmmfunct6_of_numadae1ce42e0617ef0f22dc18028bb68c.tex | |
| index 8f3f3162..bbc82933 100644 | |
| --- a/sail_latex_riscv/valzmmfunct6_of_numadae1ce42e0617ef0f22dc18028bb68c.tex | |
| +++ b/sail_latex_riscv/valzmmfunct6_of_numadae1ce42e0617ef0f22dc18028bb68c.tex | |
| @@ -1 +1 @@ | |
| -mmfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> mmfunct6 | |
| \ No newline at end of file | |
| +mmfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> mmfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmmio_read910c976398a0cf73e8b4d12641a665c1.tex b/sail_latex_riscv/valzmmio_read910c976398a0cf73e8b4d12641a665c1.tex | |
| index ff0caf42..dc5e0be4 100644 | |
| --- a/sail_latex_riscv/valzmmio_read910c976398a0cf73e8b4d12641a665c1.tex | |
| +++ b/sail_latex_riscv/valzmmio_read910c976398a0cf73e8b4d12641a665c1.tex | |
| @@ -1,2 +1,2 @@ | |
| -mmio_read : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +mmio_read : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmmio_writec1bd5fc64a027d200e43ae1730320ed7.tex b/sail_latex_riscv/valzmmio_writec1bd5fc64a027d200e43ae1730320ed7.tex | |
| index f5eb7acb..e3b4a621 100644 | |
| --- a/sail_latex_riscv/valzmmio_writec1bd5fc64a027d200e43ae1730320ed7.tex | |
| +++ b/sail_latex_riscv/valzmmio_writec1bd5fc64a027d200e43ae1730320ed7.tex | |
| @@ -1 +1,2 @@ | |
| -mmio_write : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n), bits(8 * 'n)) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| +mmio_write : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| + (xlenbits, int('n), bits(8 * 'n)) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmult_atomdbad478b99777b7676dde1f5a7900711.tex b/sail_latex_riscv/valzmult_atomdbad478b99777b7676dde1f5a7900711.tex | |
| index 7714a511..bf522cf7 100644 | |
| --- a/sail_latex_riscv/valzmult_atomdbad478b99777b7676dde1f5a7900711.tex | |
| +++ b/sail_latex_riscv/valzmult_atomdbad478b99777b7676dde1f5a7900711.tex | |
| @@ -1 +1 @@ | |
| -mult_atom : forall 'n 'm. (int('n), int('m)) -> int('n * 'm) | |
| \ No newline at end of file | |
| +mult_atom : forall ('n : Int) ('m : Int). (int('n), int('m)) -> int('n * 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmvvfunct6_of_num2e3b974cab39079564f470d30067e2f8.tex b/sail_latex_riscv/valzmvvfunct6_of_num2e3b974cab39079564f470d30067e2f8.tex | |
| index 23bff3d6..42336790 100644 | |
| --- a/sail_latex_riscv/valzmvvfunct6_of_num2e3b974cab39079564f470d30067e2f8.tex | |
| +++ b/sail_latex_riscv/valzmvvfunct6_of_num2e3b974cab39079564f470d30067e2f8.tex | |
| @@ -1 +1 @@ | |
| -mvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 11). int('e) -> mvvfunct6 | |
| \ No newline at end of file | |
| +mvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 11). int('e) -> mvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmvvmafunct6_of_numbe34dcc46670637ebddbf82c3fe41f56.tex b/sail_latex_riscv/valzmvvmafunct6_of_numbe34dcc46670637ebddbf82c3fe41f56.tex | |
| index 79423aca..ad0b6638 100644 | |
| --- a/sail_latex_riscv/valzmvvmafunct6_of_numbe34dcc46670637ebddbf82c3fe41f56.tex | |
| +++ b/sail_latex_riscv/valzmvvmafunct6_of_numbe34dcc46670637ebddbf82c3fe41f56.tex | |
| @@ -1 +1 @@ | |
| -mvvmafunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> mvvmafunct6 | |
| \ No newline at end of file | |
| +mvvmafunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> mvvmafunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmvxfunct6_of_num118dc9501359a45b7c435a0a2ae312dd.tex b/sail_latex_riscv/valzmvxfunct6_of_num118dc9501359a45b7c435a0a2ae312dd.tex | |
| index e371b862..63872f85 100644 | |
| --- a/sail_latex_riscv/valzmvxfunct6_of_num118dc9501359a45b7c435a0a2ae312dd.tex | |
| +++ b/sail_latex_riscv/valzmvxfunct6_of_num118dc9501359a45b7c435a0a2ae312dd.tex | |
| @@ -1 +1 @@ | |
| -mvxfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 13). int('e) -> mvxfunct6 | |
| \ No newline at end of file | |
| +mvxfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 13). int('e) -> mvxfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzmvxmafunct6_of_num4677ffe8a19abf0062120f15f4d0a09b.tex b/sail_latex_riscv/valzmvxmafunct6_of_num4677ffe8a19abf0062120f15f4d0a09b.tex | |
| index 6d0f93eb..fd8105bf 100644 | |
| --- a/sail_latex_riscv/valzmvxmafunct6_of_num4677ffe8a19abf0062120f15f4d0a09b.tex | |
| +++ b/sail_latex_riscv/valzmvxmafunct6_of_num4677ffe8a19abf0062120f15f4d0a09b.tex | |
| @@ -1 +1 @@ | |
| -mvxmafunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> mvxmafunct6 | |
| \ No newline at end of file | |
| +mvxmafunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> mvxmafunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznegate_atomfefdbde89b468d9df54837e864426d70.tex b/sail_latex_riscv/valznegate_atomfefdbde89b468d9df54837e864426d70.tex | |
| index 2ef2de74..92434174 100644 | |
| --- a/sail_latex_riscv/valznegate_atomfefdbde89b468d9df54837e864426d70.tex | |
| +++ b/sail_latex_riscv/valznegate_atomfefdbde89b468d9df54837e864426d70.tex | |
| @@ -1 +1 @@ | |
| -negate_atom : forall 'n. int('n) -> int(- 'n) | |
| \ No newline at end of file | |
| +negate_atom : forall ('n : Int). int('n) -> int(- 'n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzneq_bits167748c906c068e62596c88540a84f42.tex b/sail_latex_riscv/valzneq_bits167748c906c068e62596c88540a84f42.tex | |
| index 01aafb77..e1cecec8 100644 | |
| --- a/sail_latex_riscv/valzneq_bits167748c906c068e62596c88540a84f42.tex | |
| +++ b/sail_latex_riscv/valzneq_bits167748c906c068e62596c88540a84f42.tex | |
| @@ -1 +1 @@ | |
| -neq_bits : forall 'n. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +neq_bits : forall ('n : Int). (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzneq_int4fd2be7a83f27bec736b67bdbab1d8c6.tex b/sail_latex_riscv/valzneq_int4fd2be7a83f27bec736b67bdbab1d8c6.tex | |
| index 9ee8b141..bbaaa7ca 100644 | |
| --- a/sail_latex_riscv/valzneq_int4fd2be7a83f27bec736b67bdbab1d8c6.tex | |
| +++ b/sail_latex_riscv/valzneq_int4fd2be7a83f27bec736b67bdbab1d8c6.tex | |
| @@ -1 +1 @@ | |
| -neq_int : forall 'n 'm. (int('n), int('m)) -> bool('n != 'm) | |
| \ No newline at end of file | |
| +neq_int : forall ('n : Int) ('m : Int). (int('n), int('m)) -> bool('n != 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznifunct6_of_numf91503940c394f447560652c58e82fa1.tex b/sail_latex_riscv/valznifunct6_of_numf91503940c394f447560652c58e82fa1.tex | |
| index ac8838c6..e29a84d9 100644 | |
| --- a/sail_latex_riscv/valznifunct6_of_numf91503940c394f447560652c58e82fa1.tex | |
| +++ b/sail_latex_riscv/valznifunct6_of_numf91503940c394f447560652c58e82fa1.tex | |
| @@ -1 +1 @@ | |
| -nifunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> nifunct6 | |
| \ No newline at end of file | |
| +nifunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> nifunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznisfunct6_of_num3817226ca8eec6da959205fb44b15863.tex b/sail_latex_riscv/valznisfunct6_of_num3817226ca8eec6da959205fb44b15863.tex | |
| index 9a8d086e..51425321 100644 | |
| --- a/sail_latex_riscv/valznisfunct6_of_num3817226ca8eec6da959205fb44b15863.tex | |
| +++ b/sail_latex_riscv/valznisfunct6_of_num3817226ca8eec6da959205fb44b15863.tex | |
| @@ -1 +1 @@ | |
| -nisfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> nisfunct6 | |
| \ No newline at end of file | |
| +nisfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> nisfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznot_vecfb45897f737be88160f5363827ef4a4b.tex b/sail_latex_riscv/valznot_vecfb45897f737be88160f5363827ef4a4b.tex | |
| index 70de921f..b2481577 100644 | |
| --- a/sail_latex_riscv/valznot_vecfb45897f737be88160f5363827ef4a4b.tex | |
| +++ b/sail_latex_riscv/valznot_vecfb45897f737be88160f5363827ef4a4b.tex | |
| @@ -1 +1 @@ | |
| -not_vec : forall 'n. bits('n) -> bits('n) | |
| \ No newline at end of file | |
| +not_vec : forall ('n : Int). bits('n) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_a64_barrier_domainfd9b4ecf6f4c38bf5c7e299b7fb7b219.tex b/sail_latex_riscv/valznum_of_a64_barrier_domainfd9b4ecf6f4c38bf5c7e299b7fb7b219.tex | |
| index 4f07117f..0f2f3114 100644 | |
| --- a/sail_latex_riscv/valznum_of_a64_barrier_domainfd9b4ecf6f4c38bf5c7e299b7fb7b219.tex | |
| +++ b/sail_latex_riscv/valznum_of_a64_barrier_domainfd9b4ecf6f4c38bf5c7e299b7fb7b219.tex | |
| @@ -1 +1 @@ | |
| -num_of_a64_barrier_domain : a64_barrier_domain -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_a64_barrier_domain : a64_barrier_domain -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_a64_barrier_typef15d849f5523574b740454d956b74505.tex b/sail_latex_riscv/valznum_of_a64_barrier_typef15d849f5523574b740454d956b74505.tex | |
| index 03b37e26..9cdbac19 100644 | |
| --- a/sail_latex_riscv/valznum_of_a64_barrier_typef15d849f5523574b740454d956b74505.tex | |
| +++ b/sail_latex_riscv/valznum_of_a64_barrier_typef15d849f5523574b740454d956b74505.tex | |
| @@ -1 +1 @@ | |
| -num_of_a64_barrier_type : a64_barrier_type -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_a64_barrier_type : a64_barrier_type -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_agtypee743fa23c2fb0ce26372056357579cd8.tex b/sail_latex_riscv/valznum_of_agtypee743fa23c2fb0ce26372056357579cd8.tex | |
| index cd2cc67e..466fdfcc 100644 | |
| --- a/sail_latex_riscv/valznum_of_agtypee743fa23c2fb0ce26372056357579cd8.tex | |
| +++ b/sail_latex_riscv/valznum_of_agtypee743fa23c2fb0ce26372056357579cd8.tex | |
| @@ -1 +1 @@ | |
| -num_of_agtype : agtype -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_agtype : agtype -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_amoop3990788e22835bf2e0af928f223c3eba.tex b/sail_latex_riscv/valznum_of_amoop3990788e22835bf2e0af928f223c3eba.tex | |
| index bfe3218e..3d5ba5fa 100644 | |
| --- a/sail_latex_riscv/valznum_of_amoop3990788e22835bf2e0af928f223c3eba.tex | |
| +++ b/sail_latex_riscv/valznum_of_amoop3990788e22835bf2e0af928f223c3eba.tex | |
| @@ -1 +1 @@ | |
| -num_of_amoop : amoop -> {'e, (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| +num_of_amoop : amoop -> {('e : Int), (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_architecture1ae1fee7c4b64fc1c08b7336a9784f4a.tex b/sail_latex_riscv/valznum_of_architecture1ae1fee7c4b64fc1c08b7336a9784f4a.tex | |
| index 9c871a90..419ce982 100644 | |
| --- a/sail_latex_riscv/valznum_of_architecture1ae1fee7c4b64fc1c08b7336a9784f4a.tex | |
| +++ b/sail_latex_riscv/valznum_of_architecture1ae1fee7c4b64fc1c08b7336a9784f4a.tex | |
| @@ -1 +1 @@ | |
| -num_of_Architecture : Architecture -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_Architecture : Architecture -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_biop_zzbs19ab070605bc91ca70e24fdca48cdd81.tex b/sail_latex_riscv/valznum_of_biop_zzbs19ab070605bc91ca70e24fdca48cdd81.tex | |
| index a6ca6acd..c50d02ed 100644 | |
| --- a/sail_latex_riscv/valznum_of_biop_zzbs19ab070605bc91ca70e24fdca48cdd81.tex | |
| +++ b/sail_latex_riscv/valznum_of_biop_zzbs19ab070605bc91ca70e24fdca48cdd81.tex | |
| @@ -1 +1 @@ | |
| -num_of_biop_zbs : biop_zbs -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_biop_zbs : biop_zbs -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_bop465de2d51df014a233592af62fc5056d.tex b/sail_latex_riscv/valznum_of_bop465de2d51df014a233592af62fc5056d.tex | |
| index b3714051..dd13f3fe 100644 | |
| --- a/sail_latex_riscv/valznum_of_bop465de2d51df014a233592af62fc5056d.tex | |
| +++ b/sail_latex_riscv/valznum_of_bop465de2d51df014a233592af62fc5056d.tex | |
| @@ -1 +1 @@ | |
| -num_of_bop : bop -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_bop : bop -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_brop_zzbaffac43aa090bb6e9de66329a81367cf3.tex b/sail_latex_riscv/valznum_of_brop_zzbaffac43aa090bb6e9de66329a81367cf3.tex | |
| index 9cb1e302..0d3d33d3 100644 | |
| --- a/sail_latex_riscv/valznum_of_brop_zzbaffac43aa090bb6e9de66329a81367cf3.tex | |
| +++ b/sail_latex_riscv/valznum_of_brop_zzbaffac43aa090bb6e9de66329a81367cf3.tex | |
| @@ -1 +1 @@ | |
| -num_of_brop_zba : brop_zba -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_brop_zba : brop_zba -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_brop_zzbbab2648ee8593eb2e89351c7678891ba0.tex b/sail_latex_riscv/valznum_of_brop_zzbbab2648ee8593eb2e89351c7678891ba0.tex | |
| index 3483f6e9..f846b1dd 100644 | |
| --- a/sail_latex_riscv/valznum_of_brop_zzbbab2648ee8593eb2e89351c7678891ba0.tex | |
| +++ b/sail_latex_riscv/valznum_of_brop_zzbbab2648ee8593eb2e89351c7678891ba0.tex | |
| @@ -1 +1 @@ | |
| -num_of_brop_zbb : brop_zbb -> {'e, (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| +num_of_brop_zbb : brop_zbb -> {('e : Int), (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_brop_zzbkb43c910f604c93cfb88068237be34a053.tex b/sail_latex_riscv/valznum_of_brop_zzbkb43c910f604c93cfb88068237be34a053.tex | |
| index f19e0799..ea95de66 100644 | |
| --- a/sail_latex_riscv/valznum_of_brop_zzbkb43c910f604c93cfb88068237be34a053.tex | |
| +++ b/sail_latex_riscv/valznum_of_brop_zzbkb43c910f604c93cfb88068237be34a053.tex | |
| @@ -1 +1 @@ | |
| -num_of_brop_zbkb : brop_zbkb -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_brop_zbkb : brop_zbkb -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_brop_zzbs4e85ebdec04930f0e563b8a4bd2ac5f5.tex b/sail_latex_riscv/valznum_of_brop_zzbs4e85ebdec04930f0e563b8a4bd2ac5f5.tex | |
| index 81994c28..7ee91fbd 100644 | |
| --- a/sail_latex_riscv/valznum_of_brop_zzbs4e85ebdec04930f0e563b8a4bd2ac5f5.tex | |
| +++ b/sail_latex_riscv/valznum_of_brop_zzbs4e85ebdec04930f0e563b8a4bd2ac5f5.tex | |
| @@ -1 +1 @@ | |
| -num_of_brop_zbs : brop_zbs -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_brop_zbs : brop_zbs -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_bropw_zzbac1a4b135d20fc6432e05d15522f0b281.tex b/sail_latex_riscv/valznum_of_bropw_zzbac1a4b135d20fc6432e05d15522f0b281.tex | |
| index bcd911ef..d63eaf8e 100644 | |
| --- a/sail_latex_riscv/valznum_of_bropw_zzbac1a4b135d20fc6432e05d15522f0b281.tex | |
| +++ b/sail_latex_riscv/valznum_of_bropw_zzbac1a4b135d20fc6432e05d15522f0b281.tex | |
| @@ -1 +1 @@ | |
| -num_of_bropw_zba : bropw_zba -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_bropw_zba : bropw_zba -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_bropw_zzbb4399379f0c2dafb3c8bd162267248062.tex b/sail_latex_riscv/valznum_of_bropw_zzbb4399379f0c2dafb3c8bd162267248062.tex | |
| index de4bd93d..a448dc7e 100644 | |
| --- a/sail_latex_riscv/valznum_of_bropw_zzbb4399379f0c2dafb3c8bd162267248062.tex | |
| +++ b/sail_latex_riscv/valznum_of_bropw_zzbb4399379f0c2dafb3c8bd162267248062.tex | |
| @@ -1 +1 @@ | |
| -num_of_bropw_zbb : bropw_zbb -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_bropw_zbb : bropw_zbb -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_cache_op_kindbd96e6225a906fea23a868ff35718006.tex b/sail_latex_riscv/valznum_of_cache_op_kindbd96e6225a906fea23a868ff35718006.tex | |
| index 3100f6c9..91bc61c5 100644 | |
| --- a/sail_latex_riscv/valznum_of_cache_op_kindbd96e6225a906fea23a868ff35718006.tex | |
| +++ b/sail_latex_riscv/valznum_of_cache_op_kindbd96e6225a906fea23a868ff35718006.tex | |
| @@ -1 +1 @@ | |
| -num_of_cache_op_kind : cache_op_kind -> {'e, (0 <= 'e & 'e <= 10). int('e)} | |
| \ No newline at end of file | |
| +num_of_cache_op_kind : cache_op_kind -> {('e : Int), (0 <= 'e & 'e <= 10). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_capexa430f3db535161473e26bac337cc3ffe.tex b/sail_latex_riscv/valznum_of_capexa430f3db535161473e26bac337cc3ffe.tex | |
| index 57155ff5..87565fb7 100644 | |
| --- a/sail_latex_riscv/valznum_of_capexa430f3db535161473e26bac337cc3ffe.tex | |
| +++ b/sail_latex_riscv/valznum_of_capexa430f3db535161473e26bac337cc3ffe.tex | |
| @@ -1 +1 @@ | |
| -num_of_CapEx : CapEx -> {'e, (0 <= 'e & 'e <= 16). int('e)} | |
| \ No newline at end of file | |
| +num_of_CapEx : CapEx -> {('e : Int), (0 <= 'e & 'e <= 16). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_clearregset49e10f200544574f819f7f660071e10b.tex b/sail_latex_riscv/valznum_of_clearregset49e10f200544574f819f7f660071e10b.tex | |
| index 90a394f5..11283cff 100644 | |
| --- a/sail_latex_riscv/valznum_of_clearregset49e10f200544574f819f7f660071e10b.tex | |
| +++ b/sail_latex_riscv/valznum_of_clearregset49e10f200544574f819f7f660071e10b.tex | |
| @@ -1 +1 @@ | |
| -num_of_ClearRegSet : ClearRegSet -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_ClearRegSet : ClearRegSet -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_cptrcmpop261df9a3b627d5fc110f91fa10e6b254.tex b/sail_latex_riscv/valznum_of_cptrcmpop261df9a3b627d5fc110f91fa10e6b254.tex | |
| index 610c108e..973370ee 100644 | |
| --- a/sail_latex_riscv/valznum_of_cptrcmpop261df9a3b627d5fc110f91fa10e6b254.tex | |
| +++ b/sail_latex_riscv/valznum_of_cptrcmpop261df9a3b627d5fc110f91fa10e6b254.tex | |
| @@ -1 +1 @@ | |
| -num_of_CPtrCmpOp : CPtrCmpOp -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_CPtrCmpOp : CPtrCmpOp -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_csropc21ef48aae10c4abc2e72f7386a31ce9.tex b/sail_latex_riscv/valznum_of_csropc21ef48aae10c4abc2e72f7386a31ce9.tex | |
| index 3a8dfea9..c9d83f76 100644 | |
| --- a/sail_latex_riscv/valznum_of_csropc21ef48aae10c4abc2e72f7386a31ce9.tex | |
| +++ b/sail_latex_riscv/valznum_of_csropc21ef48aae10c4abc2e72f7386a31ce9.tex | |
| @@ -1 +1 @@ | |
| -num_of_csrop : csrop -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_csrop : csrop -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_exceptiontype13e59fd83201d81140ba0f6bbcbd1a7b.tex b/sail_latex_riscv/valznum_of_exceptiontype13e59fd83201d81140ba0f6bbcbd1a7b.tex | |
| index 5c297139..8619c092 100644 | |
| --- a/sail_latex_riscv/valznum_of_exceptiontype13e59fd83201d81140ba0f6bbcbd1a7b.tex | |
| +++ b/sail_latex_riscv/valznum_of_exceptiontype13e59fd83201d81140ba0f6bbcbd1a7b.tex | |
| @@ -1 +1 @@ | |
| -num_of_ExceptionType : ExceptionType -> {'n, (0 <= 'n & 'n < xlen). int('n)} | |
| \ No newline at end of file | |
| +num_of_ExceptionType : ExceptionType -> {('n : Int), (0 <= 'n & 'n < xlen). int('n)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ext_access_typea973217ed477a3d18820058dd3b21729.tex b/sail_latex_riscv/valznum_of_ext_access_typea973217ed477a3d18820058dd3b21729.tex | |
| index 6be5726c..ddc9ec66 100644 | |
| --- a/sail_latex_riscv/valznum_of_ext_access_typea973217ed477a3d18820058dd3b21729.tex | |
| +++ b/sail_latex_riscv/valznum_of_ext_access_typea973217ed477a3d18820058dd3b21729.tex | |
| @@ -1 +1 @@ | |
| -num_of_ext_access_type : ext_access_type -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_ext_access_type : ext_access_type -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ext_exc_type79451fb17925bed3ec8d5058c42d301d.tex b/sail_latex_riscv/valznum_of_ext_exc_type79451fb17925bed3ec8d5058c42d301d.tex | |
| index 93ad7caa..f4d1d9b5 100644 | |
| --- a/sail_latex_riscv/valznum_of_ext_exc_type79451fb17925bed3ec8d5058c42d301d.tex | |
| +++ b/sail_latex_riscv/valznum_of_ext_exc_type79451fb17925bed3ec8d5058c42d301d.tex | |
| @@ -1 +1 @@ | |
| -num_of_ext_exc_type : ext_exc_type -> {'n, (0 <= 'n & 'n < xlen). int('n)} | |
| \ No newline at end of file | |
| +num_of_ext_exc_type : ext_exc_type -> {('n : Int), (0 <= 'n & 'n < xlen). int('n)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ext_ptw_error7daeb8fc5a17e215ccad3f2a24541927.tex b/sail_latex_riscv/valznum_of_ext_ptw_error7daeb8fc5a17e215ccad3f2a24541927.tex | |
| index 980d68da..c596162e 100644 | |
| --- a/sail_latex_riscv/valznum_of_ext_ptw_error7daeb8fc5a17e215ccad3f2a24541927.tex | |
| +++ b/sail_latex_riscv/valznum_of_ext_ptw_error7daeb8fc5a17e215ccad3f2a24541927.tex | |
| @@ -1 +1 @@ | |
| -num_of_ext_ptw_error : ext_ptw_error -> {'e, (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| +num_of_ext_ptw_error : ext_ptw_error -> {('e : Int), (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ext_ptw_fail785ab48a0d85159cd76e2d20768c9173.tex b/sail_latex_riscv/valznum_of_ext_ptw_fail785ab48a0d85159cd76e2d20768c9173.tex | |
| index 09ee11e8..e3257638 100644 | |
| --- a/sail_latex_riscv/valznum_of_ext_ptw_fail785ab48a0d85159cd76e2d20768c9173.tex | |
| +++ b/sail_latex_riscv/valznum_of_ext_ptw_fail785ab48a0d85159cd76e2d20768c9173.tex | |
| @@ -1 +1 @@ | |
| -num_of_ext_ptw_fail : ext_ptw_fail -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_ext_ptw_fail : ext_ptw_fail -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ext_ptw_lcfde46f3a7b817078010b5dc3a4f25be7.tex b/sail_latex_riscv/valznum_of_ext_ptw_lcfde46f3a7b817078010b5dc3a4f25be7.tex | |
| index 6e623e73..f1aa1b30 100644 | |
| --- a/sail_latex_riscv/valznum_of_ext_ptw_lcfde46f3a7b817078010b5dc3a4f25be7.tex | |
| +++ b/sail_latex_riscv/valznum_of_ext_ptw_lcfde46f3a7b817078010b5dc3a4f25be7.tex | |
| @@ -1 +1 @@ | |
| -num_of_ext_ptw_lc : ext_ptw_lc -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_ext_ptw_lc : ext_ptw_lc -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ext_ptw_sc2a22418de077e3289633414d48a30bbe.tex b/sail_latex_riscv/valznum_of_ext_ptw_sc2a22418de077e3289633414d48a30bbe.tex | |
| index 54763899..f0f78dfe 100644 | |
| --- a/sail_latex_riscv/valznum_of_ext_ptw_sc2a22418de077e3289633414d48a30bbe.tex | |
| +++ b/sail_latex_riscv/valznum_of_ext_ptw_sc2a22418de077e3289633414d48a30bbe.tex | |
| @@ -1 +1 @@ | |
| -num_of_ext_ptw_sc : ext_ptw_sc -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_ext_ptw_sc : ext_ptw_sc -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_extop_zzbbccc649422c5281a2100c3e881e0f493a.tex b/sail_latex_riscv/valznum_of_extop_zzbbccc649422c5281a2100c3e881e0f493a.tex | |
| index 7b51f919..3824b81c 100644 | |
| --- a/sail_latex_riscv/valznum_of_extop_zzbbccc649422c5281a2100c3e881e0f493a.tex | |
| +++ b/sail_latex_riscv/valznum_of_extop_zzbbccc649422c5281a2100c3e881e0f493a.tex | |
| @@ -1 +1 @@ | |
| -num_of_extop_zbb : extop_zbb -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_extop_zbb : extop_zbb -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_extstatus8d29ae3139c8c2d5d4fa7489689b6a41.tex b/sail_latex_riscv/valznum_of_extstatus8d29ae3139c8c2d5d4fa7489689b6a41.tex | |
| index 2119277e..64fc4adc 100644 | |
| --- a/sail_latex_riscv/valznum_of_extstatus8d29ae3139c8c2d5d4fa7489689b6a41.tex | |
| +++ b/sail_latex_riscv/valznum_of_extstatus8d29ae3139c8c2d5d4fa7489689b6a41.tex | |
| @@ -1 +1 @@ | |
| -num_of_ExtStatus : ExtStatus -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_ExtStatus : ExtStatus -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_bin_op_dd209f84b003673fbf65e2d0267de89cd.tex b/sail_latex_riscv/valznum_of_f_bin_op_dd209f84b003673fbf65e2d0267de89cd.tex | |
| index e76b86fc..2b742b45 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_bin_op_dd209f84b003673fbf65e2d0267de89cd.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_bin_op_dd209f84b003673fbf65e2d0267de89cd.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_bin_op_D : f_bin_op_D -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_bin_op_D : f_bin_op_D -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_bin_op_hcc69c768e714f41d5cd8bf2d4e0c9019.tex b/sail_latex_riscv/valznum_of_f_bin_op_hcc69c768e714f41d5cd8bf2d4e0c9019.tex | |
| index 1b66c6fc..378113b5 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_bin_op_hcc69c768e714f41d5cd8bf2d4e0c9019.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_bin_op_hcc69c768e714f41d5cd8bf2d4e0c9019.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_bin_op_H : f_bin_op_H -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_bin_op_H : f_bin_op_H -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_bin_op_s67646ca4512abf0a4d4b44cd4f5b13ca.tex b/sail_latex_riscv/valznum_of_f_bin_op_s67646ca4512abf0a4d4b44cd4f5b13ca.tex | |
| index cfc00064..22b2d958 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_bin_op_s67646ca4512abf0a4d4b44cd4f5b13ca.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_bin_op_s67646ca4512abf0a4d4b44cd4f5b13ca.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_bin_op_S : f_bin_op_S -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_bin_op_S : f_bin_op_S -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_bin_rm_op_dc153c7dd1e01a91df37cddfd46dfd9da.tex b/sail_latex_riscv/valznum_of_f_bin_rm_op_dc153c7dd1e01a91df37cddfd46dfd9da.tex | |
| index 67a090aa..f6c57776 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_bin_rm_op_dc153c7dd1e01a91df37cddfd46dfd9da.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_bin_rm_op_dc153c7dd1e01a91df37cddfd46dfd9da.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_bin_rm_op_D : f_bin_rm_op_D -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_bin_rm_op_D : f_bin_rm_op_D -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_bin_rm_op_h531a49b863e2a5f094150a9a18e53a50.tex b/sail_latex_riscv/valznum_of_f_bin_rm_op_h531a49b863e2a5f094150a9a18e53a50.tex | |
| index 490a8f55..2a61ebc3 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_bin_rm_op_h531a49b863e2a5f094150a9a18e53a50.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_bin_rm_op_h531a49b863e2a5f094150a9a18e53a50.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_bin_rm_op_H : f_bin_rm_op_H -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_bin_rm_op_H : f_bin_rm_op_H -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_bin_rm_op_s893f36c63d593d34b1cf67930090a6d2.tex b/sail_latex_riscv/valznum_of_f_bin_rm_op_s893f36c63d593d34b1cf67930090a6d2.tex | |
| index 3e1c6946..7bec4de0 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_bin_rm_op_s893f36c63d593d34b1cf67930090a6d2.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_bin_rm_op_s893f36c63d593d34b1cf67930090a6d2.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_bin_rm_op_S : f_bin_rm_op_S -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_bin_rm_op_S : f_bin_rm_op_S -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_madd_op_d37717f7c44daba9b30789132320443ff.tex b/sail_latex_riscv/valznum_of_f_madd_op_d37717f7c44daba9b30789132320443ff.tex | |
| index fa1277c4..6b34c5ff 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_madd_op_d37717f7c44daba9b30789132320443ff.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_madd_op_d37717f7c44daba9b30789132320443ff.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_madd_op_D : f_madd_op_D -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_madd_op_D : f_madd_op_D -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_madd_op_h06ed7344938cfd642d47f2fed02b2eee.tex b/sail_latex_riscv/valznum_of_f_madd_op_h06ed7344938cfd642d47f2fed02b2eee.tex | |
| index db89c081..48d29aa0 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_madd_op_h06ed7344938cfd642d47f2fed02b2eee.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_madd_op_h06ed7344938cfd642d47f2fed02b2eee.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_madd_op_H : f_madd_op_H -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_madd_op_H : f_madd_op_H -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_madd_op_s775906828ed91e55055481dedc5d9da4.tex b/sail_latex_riscv/valznum_of_f_madd_op_s775906828ed91e55055481dedc5d9da4.tex | |
| index 5890b925..d6e2c236 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_madd_op_s775906828ed91e55055481dedc5d9da4.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_madd_op_s775906828ed91e55055481dedc5d9da4.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_madd_op_S : f_madd_op_S -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_madd_op_S : f_madd_op_S -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_un_op_d6d388f339a377c4a985a55a3c728bb8f.tex b/sail_latex_riscv/valznum_of_f_un_op_d6d388f339a377c4a985a55a3c728bb8f.tex | |
| index c300f089..2b452e53 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_un_op_d6d388f339a377c4a985a55a3c728bb8f.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_un_op_d6d388f339a377c4a985a55a3c728bb8f.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_un_op_D : f_un_op_D -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_un_op_D : f_un_op_D -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_un_op_h172862984783e8eaa16c22b18b5be71f.tex b/sail_latex_riscv/valznum_of_f_un_op_h172862984783e8eaa16c22b18b5be71f.tex | |
| index 15c7699e..ea92be82 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_un_op_h172862984783e8eaa16c22b18b5be71f.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_un_op_h172862984783e8eaa16c22b18b5be71f.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_un_op_H : f_un_op_H -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_un_op_H : f_un_op_H -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_un_op_se59a01770756c5c1ccc368187228ef32.tex b/sail_latex_riscv/valznum_of_f_un_op_se59a01770756c5c1ccc368187228ef32.tex | |
| index 37de3901..52d527e0 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_un_op_se59a01770756c5c1ccc368187228ef32.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_un_op_se59a01770756c5c1ccc368187228ef32.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_un_op_S : f_un_op_S -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_un_op_S : f_un_op_S -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_un_rm_op_d6e3378f59faf04b5d017d7c996a625e0.tex b/sail_latex_riscv/valznum_of_f_un_rm_op_d6e3378f59faf04b5d017d7c996a625e0.tex | |
| index 9ac2522d..8557c50d 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_un_rm_op_d6e3378f59faf04b5d017d7c996a625e0.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_un_rm_op_d6e3378f59faf04b5d017d7c996a625e0.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_un_rm_op_D : f_un_rm_op_D -> {'e, (0 <= 'e & 'e <= 10). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_un_rm_op_D : f_un_rm_op_D -> {('e : Int), (0 <= 'e & 'e <= 10). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_un_rm_op_h43cbb69fbdce1fe12385a7ef5f623309.tex b/sail_latex_riscv/valznum_of_f_un_rm_op_h43cbb69fbdce1fe12385a7ef5f623309.tex | |
| index 0552bbfd..a48882d1 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_un_rm_op_h43cbb69fbdce1fe12385a7ef5f623309.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_un_rm_op_h43cbb69fbdce1fe12385a7ef5f623309.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_un_rm_op_H : f_un_rm_op_H -> {'e, (0 <= 'e & 'e <= 12). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_un_rm_op_H : f_un_rm_op_H -> {('e : Int), (0 <= 'e & 'e <= 12). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_f_un_rm_op_se915d9a4f61459b98b43ab8bc6055666.tex b/sail_latex_riscv/valznum_of_f_un_rm_op_se915d9a4f61459b98b43ab8bc6055666.tex | |
| index 2ad3c689..31b7c45c 100644 | |
| --- a/sail_latex_riscv/valznum_of_f_un_rm_op_se915d9a4f61459b98b43ab8bc6055666.tex | |
| +++ b/sail_latex_riscv/valznum_of_f_un_rm_op_se915d9a4f61459b98b43ab8bc6055666.tex | |
| @@ -1 +1 @@ | |
| -num_of_f_un_rm_op_S : f_un_rm_op_S -> {'e, (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| +num_of_f_un_rm_op_S : f_un_rm_op_S -> {('e : Int), (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fvffunct6f0072e1f7f985ab6bf6460f31144e129.tex b/sail_latex_riscv/valznum_of_fvffunct6f0072e1f7f985ab6bf6460f31144e129.tex | |
| index 659f775a..40d0e0a0 100644 | |
| --- a/sail_latex_riscv/valznum_of_fvffunct6f0072e1f7f985ab6bf6460f31144e129.tex | |
| +++ b/sail_latex_riscv/valznum_of_fvffunct6f0072e1f7f985ab6bf6460f31144e129.tex | |
| @@ -1 +1 @@ | |
| -num_of_fvffunct6 : fvffunct6 -> {'e, (0 <= 'e & 'e <= 12). int('e)} | |
| \ No newline at end of file | |
| +num_of_fvffunct6 : fvffunct6 -> {('e : Int), (0 <= 'e & 'e <= 12). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fvfmafunct678b8e81eb443f89c3c1403c6c7c31b58.tex b/sail_latex_riscv/valznum_of_fvfmafunct678b8e81eb443f89c3c1403c6c7c31b58.tex | |
| index c199c610..b038c75a 100644 | |
| --- a/sail_latex_riscv/valznum_of_fvfmafunct678b8e81eb443f89c3c1403c6c7c31b58.tex | |
| +++ b/sail_latex_riscv/valznum_of_fvfmafunct678b8e81eb443f89c3c1403c6c7c31b58.tex | |
| @@ -1 +1 @@ | |
| -num_of_fvfmafunct6 : fvfmafunct6 -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_fvfmafunct6 : fvfmafunct6 -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fvfmfunct6d4056ce6b9faeb627072328ff1dac516.tex b/sail_latex_riscv/valznum_of_fvfmfunct6d4056ce6b9faeb627072328ff1dac516.tex | |
| index 4fa0d150..6f0fd662 100644 | |
| --- a/sail_latex_riscv/valznum_of_fvfmfunct6d4056ce6b9faeb627072328ff1dac516.tex | |
| +++ b/sail_latex_riscv/valznum_of_fvfmfunct6d4056ce6b9faeb627072328ff1dac516.tex | |
| @@ -1 +1 @@ | |
| -num_of_fvfmfunct6 : fvfmfunct6 -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_fvfmfunct6 : fvfmfunct6 -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fvvfunct6626668fb252a596c78bd037725f472c2.tex b/sail_latex_riscv/valznum_of_fvvfunct6626668fb252a596c78bd037725f472c2.tex | |
| index 7a78458a..15e02ae9 100644 | |
| --- a/sail_latex_riscv/valznum_of_fvvfunct6626668fb252a596c78bd037725f472c2.tex | |
| +++ b/sail_latex_riscv/valznum_of_fvvfunct6626668fb252a596c78bd037725f472c2.tex | |
| @@ -1 +1 @@ | |
| -num_of_fvvfunct6 : fvvfunct6 -> {'e, (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| +num_of_fvvfunct6 : fvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fvvmafunct6a6e7e34a869535ccba120d671b1d31b5.tex b/sail_latex_riscv/valznum_of_fvvmafunct6a6e7e34a869535ccba120d671b1d31b5.tex | |
| index cc0ef673..a194cbfd 100644 | |
| --- a/sail_latex_riscv/valznum_of_fvvmafunct6a6e7e34a869535ccba120d671b1d31b5.tex | |
| +++ b/sail_latex_riscv/valznum_of_fvvmafunct6a6e7e34a869535ccba120d671b1d31b5.tex | |
| @@ -1 +1 @@ | |
| -num_of_fvvmafunct6 : fvvmafunct6 -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_fvvmafunct6 : fvvmafunct6 -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fvvmfunct622c5002d2dfd799be3df59c85278b79b.tex b/sail_latex_riscv/valznum_of_fvvmfunct622c5002d2dfd799be3df59c85278b79b.tex | |
| index 759ce23c..946d0386 100644 | |
| --- a/sail_latex_riscv/valznum_of_fvvmfunct622c5002d2dfd799be3df59c85278b79b.tex | |
| +++ b/sail_latex_riscv/valznum_of_fvvmfunct622c5002d2dfd799be3df59c85278b79b.tex | |
| @@ -1 +1 @@ | |
| -num_of_fvvmfunct6 : fvvmfunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_fvvmfunct6 : fvvmfunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fwffunct6a973250baa11414fae541db84ab9be03.tex b/sail_latex_riscv/valznum_of_fwffunct6a973250baa11414fae541db84ab9be03.tex | |
| index f5961d27..f4eadc41 100644 | |
| --- a/sail_latex_riscv/valznum_of_fwffunct6a973250baa11414fae541db84ab9be03.tex | |
| +++ b/sail_latex_riscv/valznum_of_fwffunct6a973250baa11414fae541db84ab9be03.tex | |
| @@ -1 +1 @@ | |
| -num_of_fwffunct6 : fwffunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_fwffunct6 : fwffunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fwvffunct62ac7dcaf751e0fc4124d176a3a8130cd.tex b/sail_latex_riscv/valznum_of_fwvffunct62ac7dcaf751e0fc4124d176a3a8130cd.tex | |
| index ba719951..bb40db11 100644 | |
| --- a/sail_latex_riscv/valznum_of_fwvffunct62ac7dcaf751e0fc4124d176a3a8130cd.tex | |
| +++ b/sail_latex_riscv/valznum_of_fwvffunct62ac7dcaf751e0fc4124d176a3a8130cd.tex | |
| @@ -1 +1 @@ | |
| -num_of_fwvffunct6 : fwvffunct6 -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_fwvffunct6 : fwvffunct6 -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fwvfmafunct6e037c70b7b63b313f575632a2f449298.tex b/sail_latex_riscv/valznum_of_fwvfmafunct6e037c70b7b63b313f575632a2f449298.tex | |
| index 6c55a1ad..01868b9e 100644 | |
| --- a/sail_latex_riscv/valznum_of_fwvfmafunct6e037c70b7b63b313f575632a2f449298.tex | |
| +++ b/sail_latex_riscv/valznum_of_fwvfmafunct6e037c70b7b63b313f575632a2f449298.tex | |
| @@ -1 +1 @@ | |
| -num_of_fwvfmafunct6 : fwvfmafunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_fwvfmafunct6 : fwvfmafunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fwvfunct6d79125d923b293c8675e12915723738c.tex b/sail_latex_riscv/valznum_of_fwvfunct6d79125d923b293c8675e12915723738c.tex | |
| index 5087d8da..76f65f40 100644 | |
| --- a/sail_latex_riscv/valznum_of_fwvfunct6d79125d923b293c8675e12915723738c.tex | |
| +++ b/sail_latex_riscv/valznum_of_fwvfunct6d79125d923b293c8675e12915723738c.tex | |
| @@ -1 +1 @@ | |
| -num_of_fwvfunct6 : fwvfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_fwvfunct6 : fwvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fwvvfunct66d64df59e7060012329348ec6c3013c2.tex b/sail_latex_riscv/valznum_of_fwvvfunct66d64df59e7060012329348ec6c3013c2.tex | |
| index 76b653d3..6d0e84c6 100644 | |
| --- a/sail_latex_riscv/valznum_of_fwvvfunct66d64df59e7060012329348ec6c3013c2.tex | |
| +++ b/sail_latex_riscv/valznum_of_fwvvfunct66d64df59e7060012329348ec6c3013c2.tex | |
| @@ -1 +1 @@ | |
| -num_of_fwvvfunct6 : fwvvfunct6 -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_fwvvfunct6 : fwvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_fwvvmafunct62eb64d9c49ecf6858a3bb209e0aa3bc1.tex b/sail_latex_riscv/valznum_of_fwvvmafunct62eb64d9c49ecf6858a3bb209e0aa3bc1.tex | |
| index cb1c7b3c..7dff1088 100644 | |
| --- a/sail_latex_riscv/valznum_of_fwvvmafunct62eb64d9c49ecf6858a3bb209e0aa3bc1.tex | |
| +++ b/sail_latex_riscv/valznum_of_fwvvmafunct62eb64d9c49ecf6858a3bb209e0aa3bc1.tex | |
| @@ -1 +1 @@ | |
| -num_of_fwvvmafunct6 : fwvvmafunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_fwvvmafunct6 : fwvvmafunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_interrupttype186751debed5f5a4e5f875749623071b.tex b/sail_latex_riscv/valznum_of_interrupttype186751debed5f5a4e5f875749623071b.tex | |
| index 8e7bea3f..7849775b 100644 | |
| --- a/sail_latex_riscv/valznum_of_interrupttype186751debed5f5a4e5f875749623071b.tex | |
| +++ b/sail_latex_riscv/valznum_of_interrupttype186751debed5f5a4e5f875749623071b.tex | |
| @@ -1 +1 @@ | |
| -num_of_InterruptType : InterruptType -> {'e, (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| +num_of_InterruptType : InterruptType -> {('e : Int), (0 <= 'e & 'e <= 8). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_iop7e0f948724eaec1edf1ab6539e332d14.tex b/sail_latex_riscv/valznum_of_iop7e0f948724eaec1edf1ab6539e332d14.tex | |
| index 7bd01122..c1fa982e 100644 | |
| --- a/sail_latex_riscv/valznum_of_iop7e0f948724eaec1edf1ab6539e332d14.tex | |
| +++ b/sail_latex_riscv/valznum_of_iop7e0f948724eaec1edf1ab6539e332d14.tex | |
| @@ -1 +1 @@ | |
| -num_of_iop : iop -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_iop : iop -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_maskfunct359a2a6b15fd8d96f7ef70a9132b44a07.tex b/sail_latex_riscv/valznum_of_maskfunct359a2a6b15fd8d96f7ef70a9132b44a07.tex | |
| index 3838453d..21b30a3a 100644 | |
| --- a/sail_latex_riscv/valznum_of_maskfunct359a2a6b15fd8d96f7ef70a9132b44a07.tex | |
| +++ b/sail_latex_riscv/valznum_of_maskfunct359a2a6b15fd8d96f7ef70a9132b44a07.tex | |
| @@ -1 +1 @@ | |
| -num_of_maskfunct3 : maskfunct3 -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_maskfunct3 : maskfunct3 -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_mmfunct627d779acbb110d9a077efab9f27ce88b.tex b/sail_latex_riscv/valznum_of_mmfunct627d779acbb110d9a077efab9f27ce88b.tex | |
| index 6619c1d3..d02c1b35 100644 | |
| --- a/sail_latex_riscv/valznum_of_mmfunct627d779acbb110d9a077efab9f27ce88b.tex | |
| +++ b/sail_latex_riscv/valznum_of_mmfunct627d779acbb110d9a077efab9f27ce88b.tex | |
| @@ -1 +1 @@ | |
| -num_of_mmfunct6 : mmfunct6 -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_mmfunct6 : mmfunct6 -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_mvvfunct6f413ffc5fccf9b2498752149b3c17a55.tex b/sail_latex_riscv/valznum_of_mvvfunct6f413ffc5fccf9b2498752149b3c17a55.tex | |
| index b309ee26..cf48130b 100644 | |
| --- a/sail_latex_riscv/valznum_of_mvvfunct6f413ffc5fccf9b2498752149b3c17a55.tex | |
| +++ b/sail_latex_riscv/valznum_of_mvvfunct6f413ffc5fccf9b2498752149b3c17a55.tex | |
| @@ -1 +1 @@ | |
| -num_of_mvvfunct6 : mvvfunct6 -> {'e, (0 <= 'e & 'e <= 11). int('e)} | |
| \ No newline at end of file | |
| +num_of_mvvfunct6 : mvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 11). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_mvvmafunct653a1fbe46b82d66ebcdde7f3965801e0.tex b/sail_latex_riscv/valznum_of_mvvmafunct653a1fbe46b82d66ebcdde7f3965801e0.tex | |
| index a45e6f38..21d3bf73 100644 | |
| --- a/sail_latex_riscv/valznum_of_mvvmafunct653a1fbe46b82d66ebcdde7f3965801e0.tex | |
| +++ b/sail_latex_riscv/valznum_of_mvvmafunct653a1fbe46b82d66ebcdde7f3965801e0.tex | |
| @@ -1 +1 @@ | |
| -num_of_mvvmafunct6 : mvvmafunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_mvvmafunct6 : mvvmafunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_mvxfunct6d0a96a4a33e3fd5d8e730e4dd7166b5c.tex b/sail_latex_riscv/valznum_of_mvxfunct6d0a96a4a33e3fd5d8e730e4dd7166b5c.tex | |
| index c8fed68c..fa7dc79e 100644 | |
| --- a/sail_latex_riscv/valznum_of_mvxfunct6d0a96a4a33e3fd5d8e730e4dd7166b5c.tex | |
| +++ b/sail_latex_riscv/valznum_of_mvxfunct6d0a96a4a33e3fd5d8e730e4dd7166b5c.tex | |
| @@ -1 +1 @@ | |
| -num_of_mvxfunct6 : mvxfunct6 -> {'e, (0 <= 'e & 'e <= 13). int('e)} | |
| \ No newline at end of file | |
| +num_of_mvxfunct6 : mvxfunct6 -> {('e : Int), (0 <= 'e & 'e <= 13). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_mvxmafunct65153eb57fb79102d339205fa54ed92b9.tex b/sail_latex_riscv/valznum_of_mvxmafunct65153eb57fb79102d339205fa54ed92b9.tex | |
| index a903a475..a338542d 100644 | |
| --- a/sail_latex_riscv/valznum_of_mvxmafunct65153eb57fb79102d339205fa54ed92b9.tex | |
| +++ b/sail_latex_riscv/valznum_of_mvxmafunct65153eb57fb79102d339205fa54ed92b9.tex | |
| @@ -1 +1 @@ | |
| -num_of_mvxmafunct6 : mvxmafunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_mvxmafunct6 : mvxmafunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_nifunct6c04998dc995c907399345a1b5a801016.tex b/sail_latex_riscv/valznum_of_nifunct6c04998dc995c907399345a1b5a801016.tex | |
| index 1bd43776..5a41118c 100644 | |
| --- a/sail_latex_riscv/valznum_of_nifunct6c04998dc995c907399345a1b5a801016.tex | |
| +++ b/sail_latex_riscv/valznum_of_nifunct6c04998dc995c907399345a1b5a801016.tex | |
| @@ -1 +1 @@ | |
| -num_of_nifunct6 : nifunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_nifunct6 : nifunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_nisfunct6a4ef1c45a42a1f41506252aa82340ba4.tex b/sail_latex_riscv/valznum_of_nisfunct6a4ef1c45a42a1f41506252aa82340ba4.tex | |
| index 62fbca95..ac771787 100644 | |
| --- a/sail_latex_riscv/valznum_of_nisfunct6a4ef1c45a42a1f41506252aa82340ba4.tex | |
| +++ b/sail_latex_riscv/valznum_of_nisfunct6a4ef1c45a42a1f41506252aa82340ba4.tex | |
| @@ -1 +1 @@ | |
| -num_of_nisfunct6 : nisfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_nisfunct6 : nisfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_nvfunct6eab07796179647bf43f9109f72f32450.tex b/sail_latex_riscv/valznum_of_nvfunct6eab07796179647bf43f9109f72f32450.tex | |
| index d1720e94..10b56dea 100644 | |
| --- a/sail_latex_riscv/valznum_of_nvfunct6eab07796179647bf43f9109f72f32450.tex | |
| +++ b/sail_latex_riscv/valznum_of_nvfunct6eab07796179647bf43f9109f72f32450.tex | |
| @@ -1 +1 @@ | |
| -num_of_nvfunct6 : nvfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_nvfunct6 : nvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_nvsfunct6db5f0681ceb6afc30fca336cee9cb949.tex b/sail_latex_riscv/valznum_of_nvsfunct6db5f0681ceb6afc30fca336cee9cb949.tex | |
| index 788ea406..7870cec7 100644 | |
| --- a/sail_latex_riscv/valznum_of_nvsfunct6db5f0681ceb6afc30fca336cee9cb949.tex | |
| +++ b/sail_latex_riscv/valznum_of_nvsfunct6db5f0681ceb6afc30fca336cee9cb949.tex | |
| @@ -1 +1 @@ | |
| -num_of_nvsfunct6 : nvsfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_nvsfunct6 : nvsfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_nxfunct66df8c984737e3cb285272c74c5dfc757.tex b/sail_latex_riscv/valznum_of_nxfunct66df8c984737e3cb285272c74c5dfc757.tex | |
| index f5377a4c..c4dee0bc 100644 | |
| --- a/sail_latex_riscv/valznum_of_nxfunct66df8c984737e3cb285272c74c5dfc757.tex | |
| +++ b/sail_latex_riscv/valznum_of_nxfunct66df8c984737e3cb285272c74c5dfc757.tex | |
| @@ -1 +1 @@ | |
| -num_of_nxfunct6 : nxfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_nxfunct6 : nxfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_nxsfunct6dc44be1513df95a6e810cd211c09f1a0.tex b/sail_latex_riscv/valznum_of_nxsfunct6dc44be1513df95a6e810cd211c09f1a0.tex | |
| index 61c7ab16..322af685 100644 | |
| --- a/sail_latex_riscv/valznum_of_nxsfunct6dc44be1513df95a6e810cd211c09f1a0.tex | |
| +++ b/sail_latex_riscv/valznum_of_nxsfunct6dc44be1513df95a6e810cd211c09f1a0.tex | |
| @@ -1 +1 @@ | |
| -num_of_nxsfunct6 : nxsfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_nxsfunct6 : nxsfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_pmpaddrmatch6db470099c3f03581d51f40437610a39.tex b/sail_latex_riscv/valznum_of_pmpaddrmatch6db470099c3f03581d51f40437610a39.tex | |
| index 1d63c43b..6b6ab913 100644 | |
| --- a/sail_latex_riscv/valznum_of_pmpaddrmatch6db470099c3f03581d51f40437610a39.tex | |
| +++ b/sail_latex_riscv/valznum_of_pmpaddrmatch6db470099c3f03581d51f40437610a39.tex | |
| @@ -1 +1 @@ | |
| -num_of_pmpAddrMatch : pmpAddrMatch -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_pmpAddrMatch : pmpAddrMatch -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_pmpaddrmatchtypee330d16c3db664232af948049b8edeb9.tex b/sail_latex_riscv/valznum_of_pmpaddrmatchtypee330d16c3db664232af948049b8edeb9.tex | |
| index 88bdd56b..2ec4e1b3 100644 | |
| --- a/sail_latex_riscv/valznum_of_pmpaddrmatchtypee330d16c3db664232af948049b8edeb9.tex | |
| +++ b/sail_latex_riscv/valznum_of_pmpaddrmatchtypee330d16c3db664232af948049b8edeb9.tex | |
| @@ -1 +1 @@ | |
| -num_of_PmpAddrMatchType : PmpAddrMatchType -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_PmpAddrMatchType : PmpAddrMatchType -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_pmpmatch3a839a54108c809c88766e9119a0bce5.tex b/sail_latex_riscv/valznum_of_pmpmatch3a839a54108c809c88766e9119a0bce5.tex | |
| index fb153a3c..094b438f 100644 | |
| --- a/sail_latex_riscv/valznum_of_pmpmatch3a839a54108c809c88766e9119a0bce5.tex | |
| +++ b/sail_latex_riscv/valznum_of_pmpmatch3a839a54108c809c88766e9119a0bce5.tex | |
| @@ -1 +1 @@ | |
| -num_of_pmpMatch : pmpMatch -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_pmpMatch : pmpMatch -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_privilege40c636ca569f6d4bb59a57bee3b2742d.tex b/sail_latex_riscv/valznum_of_privilege40c636ca569f6d4bb59a57bee3b2742d.tex | |
| index 6099cdcf..128c2d92 100644 | |
| --- a/sail_latex_riscv/valznum_of_privilege40c636ca569f6d4bb59a57bee3b2742d.tex | |
| +++ b/sail_latex_riscv/valznum_of_privilege40c636ca569f6d4bb59a57bee3b2742d.tex | |
| @@ -1 +1 @@ | |
| -num_of_Privilege : Privilege -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_Privilege : Privilege -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_read_kind9f1d12d5627d7618c1e31c888906fc68.tex b/sail_latex_riscv/valznum_of_read_kind9f1d12d5627d7618c1e31c888906fc68.tex | |
| index bcce07bb..4513ad57 100644 | |
| --- a/sail_latex_riscv/valznum_of_read_kind9f1d12d5627d7618c1e31c888906fc68.tex | |
| +++ b/sail_latex_riscv/valznum_of_read_kind9f1d12d5627d7618c1e31c888906fc68.tex | |
| @@ -1 +1 @@ | |
| -num_of_read_kind : read_kind -> {'e, (0 <= 'e & 'e <= 12). int('e)} | |
| \ No newline at end of file | |
| +num_of_read_kind : read_kind -> {('e : Int), (0 <= 'e & 'e <= 12). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_retiredc5322d8e56eb574c7eb3ebf89e0586af.tex b/sail_latex_riscv/valznum_of_retiredc5322d8e56eb574c7eb3ebf89e0586af.tex | |
| index 46277afa..39377370 100644 | |
| --- a/sail_latex_riscv/valznum_of_retiredc5322d8e56eb574c7eb3ebf89e0586af.tex | |
| +++ b/sail_latex_riscv/valznum_of_retiredc5322d8e56eb574c7eb3ebf89e0586af.tex | |
| @@ -1 +1 @@ | |
| -num_of_Retired : Retired -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_Retired : Retired -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_rfvvfunct6a58062307f04ca9696e8d6a2f68195d8.tex b/sail_latex_riscv/valznum_of_rfvvfunct6a58062307f04ca9696e8d6a2f68195d8.tex | |
| index 0a801518..4426f602 100644 | |
| --- a/sail_latex_riscv/valznum_of_rfvvfunct6a58062307f04ca9696e8d6a2f68195d8.tex | |
| +++ b/sail_latex_riscv/valznum_of_rfvvfunct6a58062307f04ca9696e8d6a2f68195d8.tex | |
| @@ -1 +1 @@ | |
| -num_of_rfvvfunct6 : rfvvfunct6 -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_rfvvfunct6 : rfvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_rivvfunct682ce19ddd7ad9c8bbc2b5149e9291518.tex b/sail_latex_riscv/valznum_of_rivvfunct682ce19ddd7ad9c8bbc2b5149e9291518.tex | |
| index ee8e0889..76b7179d 100644 | |
| --- a/sail_latex_riscv/valznum_of_rivvfunct682ce19ddd7ad9c8bbc2b5149e9291518.tex | |
| +++ b/sail_latex_riscv/valznum_of_rivvfunct682ce19ddd7ad9c8bbc2b5149e9291518.tex | |
| @@ -1 +1 @@ | |
| -num_of_rivvfunct6 : rivvfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_rivvfunct6 : rivvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_rmvvfunct6efb95dd02791e5c8546c0e4e02395ff4.tex b/sail_latex_riscv/valznum_of_rmvvfunct6efb95dd02791e5c8546c0e4e02395ff4.tex | |
| index dccd43c9..78696f1d 100644 | |
| --- a/sail_latex_riscv/valznum_of_rmvvfunct6efb95dd02791e5c8546c0e4e02395ff4.tex | |
| +++ b/sail_latex_riscv/valznum_of_rmvvfunct6efb95dd02791e5c8546c0e4e02395ff4.tex | |
| @@ -1 +1 @@ | |
| -num_of_rmvvfunct6 : rmvvfunct6 -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_rmvvfunct6 : rmvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_rop6b1530298b7a57e62b47f86bb5f1b15c.tex b/sail_latex_riscv/valznum_of_rop6b1530298b7a57e62b47f86bb5f1b15c.tex | |
| index 078502c8..6d80ea7d 100644 | |
| --- a/sail_latex_riscv/valznum_of_rop6b1530298b7a57e62b47f86bb5f1b15c.tex | |
| +++ b/sail_latex_riscv/valznum_of_rop6b1530298b7a57e62b47f86bb5f1b15c.tex | |
| @@ -1 +1 @@ | |
| -num_of_rop : rop -> {'e, (0 <= 'e & 'e <= 9). int('e)} | |
| \ No newline at end of file | |
| +num_of_rop : rop -> {('e : Int), (0 <= 'e & 'e <= 9). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_ropw2d1d1b64d2060822876c1a3c1d164870.tex b/sail_latex_riscv/valznum_of_ropw2d1d1b64d2060822876c1a3c1d164870.tex | |
| index 52c0ceb5..b0a002e4 100644 | |
| --- a/sail_latex_riscv/valznum_of_ropw2d1d1b64d2060822876c1a3c1d164870.tex | |
| +++ b/sail_latex_riscv/valznum_of_ropw2d1d1b64d2060822876c1a3c1d164870.tex | |
| @@ -1 +1 @@ | |
| -num_of_ropw : ropw -> {'e, (0 <= 'e & 'e <= 4). int('e)} | |
| \ No newline at end of file | |
| +num_of_ropw : ropw -> {('e : Int), (0 <= 'e & 'e <= 4). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_rounding_mode41a60e82308e6507de434c7dc6e17db8.tex b/sail_latex_riscv/valznum_of_rounding_mode41a60e82308e6507de434c7dc6e17db8.tex | |
| index cd9aad91..41e534d7 100644 | |
| --- a/sail_latex_riscv/valznum_of_rounding_mode41a60e82308e6507de434c7dc6e17db8.tex | |
| +++ b/sail_latex_riscv/valznum_of_rounding_mode41a60e82308e6507de434c7dc6e17db8.tex | |
| @@ -1 +1 @@ | |
| -num_of_rounding_mode : rounding_mode -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_rounding_mode : rounding_mode -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_satpmode714998a67cc48d1f59bc52de3d9a052f.tex b/sail_latex_riscv/valznum_of_satpmode714998a67cc48d1f59bc52de3d9a052f.tex | |
| index c2e5e771..a7284f4b 100644 | |
| --- a/sail_latex_riscv/valznum_of_satpmode714998a67cc48d1f59bc52de3d9a052f.tex | |
| +++ b/sail_latex_riscv/valznum_of_satpmode714998a67cc48d1f59bc52de3d9a052f.tex | |
| @@ -1 +1 @@ | |
| -num_of_SATPMode : SATPMode -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_SATPMode : SATPMode -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_seed_opstd0ba04c3622d423a3f556e7374c80315.tex b/sail_latex_riscv/valznum_of_seed_opstd0ba04c3622d423a3f556e7374c80315.tex | |
| index 90c28397..6714adcf 100644 | |
| --- a/sail_latex_riscv/valznum_of_seed_opstd0ba04c3622d423a3f556e7374c80315.tex | |
| +++ b/sail_latex_riscv/valznum_of_seed_opstd0ba04c3622d423a3f556e7374c80315.tex | |
| @@ -1 +1 @@ | |
| -num_of_seed_opst : seed_opst -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_seed_opst : seed_opst -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_sopfa04a24d46338146566ae6e8a80132f0.tex b/sail_latex_riscv/valznum_of_sopfa04a24d46338146566ae6e8a80132f0.tex | |
| index 1115b54c..7eb862b4 100644 | |
| --- a/sail_latex_riscv/valznum_of_sopfa04a24d46338146566ae6e8a80132f0.tex | |
| +++ b/sail_latex_riscv/valznum_of_sopfa04a24d46338146566ae6e8a80132f0.tex | |
| @@ -1 +1 @@ | |
| -num_of_sop : sop -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_sop : sop -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_sopw352409ee6a8831f827129fc3d78cd4d6.tex b/sail_latex_riscv/valznum_of_sopw352409ee6a8831f827129fc3d78cd4d6.tex | |
| index fce6ac8d..cea57ed2 100644 | |
| --- a/sail_latex_riscv/valznum_of_sopw352409ee6a8831f827129fc3d78cd4d6.tex | |
| +++ b/sail_latex_riscv/valznum_of_sopw352409ee6a8831f827129fc3d78cd4d6.tex | |
| @@ -1 +1 @@ | |
| -num_of_sopw : sopw -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_sopw : sopw -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_trans_kind7086883ee37c97f3e6858f19cebb2163.tex b/sail_latex_riscv/valznum_of_trans_kind7086883ee37c97f3e6858f19cebb2163.tex | |
| index 991d7b5a..aae8312d 100644 | |
| --- a/sail_latex_riscv/valznum_of_trans_kind7086883ee37c97f3e6858f19cebb2163.tex | |
| +++ b/sail_latex_riscv/valznum_of_trans_kind7086883ee37c97f3e6858f19cebb2163.tex | |
| @@ -1 +1 @@ | |
| -num_of_trans_kind : trans_kind -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_trans_kind : trans_kind -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_trapvectormode9673c0ba1b150ae7d0c789bf1ea8f4fe.tex b/sail_latex_riscv/valznum_of_trapvectormode9673c0ba1b150ae7d0c789bf1ea8f4fe.tex | |
| index 968c77f1..17606186 100644 | |
| --- a/sail_latex_riscv/valznum_of_trapvectormode9673c0ba1b150ae7d0c789bf1ea8f4fe.tex | |
| +++ b/sail_latex_riscv/valznum_of_trapvectormode9673c0ba1b150ae7d0c789bf1ea8f4fe.tex | |
| @@ -1 +1 @@ | |
| -num_of_TrapVectorMode : TrapVectorMode -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_TrapVectorMode : TrapVectorMode -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_uop5155bc57344db1e0852d69264b07f354.tex b/sail_latex_riscv/valznum_of_uop5155bc57344db1e0852d69264b07f354.tex | |
| index 4ae2ccc1..a6d1d354 100644 | |
| --- a/sail_latex_riscv/valznum_of_uop5155bc57344db1e0852d69264b07f354.tex | |
| +++ b/sail_latex_riscv/valznum_of_uop5155bc57344db1e0852d69264b07f354.tex | |
| @@ -1 +1 @@ | |
| -num_of_uop : uop -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_uop : uop -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vext2funct615875185fd771151fb6483db4b1890ec.tex b/sail_latex_riscv/valznum_of_vext2funct615875185fd771151fb6483db4b1890ec.tex | |
| index b613471e..6fe21bd6 100644 | |
| --- a/sail_latex_riscv/valznum_of_vext2funct615875185fd771151fb6483db4b1890ec.tex | |
| +++ b/sail_latex_riscv/valznum_of_vext2funct615875185fd771151fb6483db4b1890ec.tex | |
| @@ -1 +1 @@ | |
| -num_of_vext2funct6 : vext2funct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vext2funct6 : vext2funct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vext4funct642c97c2f3762497aee8fd9c063065fef.tex b/sail_latex_riscv/valznum_of_vext4funct642c97c2f3762497aee8fd9c063065fef.tex | |
| index 5f3e1e8e..bb9889ae 100644 | |
| --- a/sail_latex_riscv/valznum_of_vext4funct642c97c2f3762497aee8fd9c063065fef.tex | |
| +++ b/sail_latex_riscv/valznum_of_vext4funct642c97c2f3762497aee8fd9c063065fef.tex | |
| @@ -1 +1 @@ | |
| -num_of_vext4funct6 : vext4funct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vext4funct6 : vext4funct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vext8funct604db81057c9f340c5de5907573e5cc4f.tex b/sail_latex_riscv/valznum_of_vext8funct604db81057c9f340c5de5907573e5cc4f.tex | |
| index 712338fa..fdf4ec86 100644 | |
| --- a/sail_latex_riscv/valznum_of_vext8funct604db81057c9f340c5de5907573e5cc4f.tex | |
| +++ b/sail_latex_riscv/valznum_of_vext8funct604db81057c9f340c5de5907573e5cc4f.tex | |
| @@ -1 +1 @@ | |
| -num_of_vext8funct6 : vext8funct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vext8funct6 : vext8funct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vfnunary0e234b5e77fd86aa27db8c4f844df79ce.tex b/sail_latex_riscv/valznum_of_vfnunary0e234b5e77fd86aa27db8c4f844df79ce.tex | |
| index 4aa62e69..53e4aba9 100644 | |
| --- a/sail_latex_riscv/valznum_of_vfnunary0e234b5e77fd86aa27db8c4f844df79ce.tex | |
| +++ b/sail_latex_riscv/valznum_of_vfnunary0e234b5e77fd86aa27db8c4f844df79ce.tex | |
| @@ -1 +1 @@ | |
| -num_of_vfnunary0 : vfnunary0 -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_vfnunary0 : vfnunary0 -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vfunary0d758d3eaf00fe4cb18a44301a34655b2.tex b/sail_latex_riscv/valznum_of_vfunary0d758d3eaf00fe4cb18a44301a34655b2.tex | |
| index e0688a39..dacfab35 100644 | |
| --- a/sail_latex_riscv/valznum_of_vfunary0d758d3eaf00fe4cb18a44301a34655b2.tex | |
| +++ b/sail_latex_riscv/valznum_of_vfunary0d758d3eaf00fe4cb18a44301a34655b2.tex | |
| @@ -1 +1 @@ | |
| -num_of_vfunary0 : vfunary0 -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_vfunary0 : vfunary0 -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vfunary1d36188dd70f8b31d9e789a9dab4bbcd5.tex b/sail_latex_riscv/valznum_of_vfunary1d36188dd70f8b31d9e789a9dab4bbcd5.tex | |
| index 80d7be38..cb42d280 100644 | |
| --- a/sail_latex_riscv/valznum_of_vfunary1d36188dd70f8b31d9e789a9dab4bbcd5.tex | |
| +++ b/sail_latex_riscv/valznum_of_vfunary1d36188dd70f8b31d9e789a9dab4bbcd5.tex | |
| @@ -1 +1 @@ | |
| -num_of_vfunary1 : vfunary1 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_vfunary1 : vfunary1 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vfwunary02ea7e8b49648ecd955b5239c3992225e.tex b/sail_latex_riscv/valznum_of_vfwunary02ea7e8b49648ecd955b5239c3992225e.tex | |
| index 8b855bcc..89a9b060 100644 | |
| --- a/sail_latex_riscv/valznum_of_vfwunary02ea7e8b49648ecd955b5239c3992225e.tex | |
| +++ b/sail_latex_riscv/valznum_of_vfwunary02ea7e8b49648ecd955b5239c3992225e.tex | |
| @@ -1 +1 @@ | |
| -num_of_vfwunary0 : vfwunary0 -> {'e, (0 <= 'e & 'e <= 6). int('e)} | |
| \ No newline at end of file | |
| +num_of_vfwunary0 : vfwunary0 -> {('e : Int), (0 <= 'e & 'e <= 6). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vicmpfunct6e90920232b2ca123bc188352f9e36b1f.tex b/sail_latex_riscv/valznum_of_vicmpfunct6e90920232b2ca123bc188352f9e36b1f.tex | |
| index d5d243a6..28f22147 100644 | |
| --- a/sail_latex_riscv/valznum_of_vicmpfunct6e90920232b2ca123bc188352f9e36b1f.tex | |
| +++ b/sail_latex_riscv/valznum_of_vicmpfunct6e90920232b2ca123bc188352f9e36b1f.tex | |
| @@ -1 +1 @@ | |
| -num_of_vicmpfunct6 : vicmpfunct6 -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_vicmpfunct6 : vicmpfunct6 -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vifunct6d67b7ec5adf64f0ad38f2d75964876b9.tex b/sail_latex_riscv/valznum_of_vifunct6d67b7ec5adf64f0ad38f2d75964876b9.tex | |
| index b37b3639..c013b0dc 100644 | |
| --- a/sail_latex_riscv/valznum_of_vifunct6d67b7ec5adf64f0ad38f2d75964876b9.tex | |
| +++ b/sail_latex_riscv/valznum_of_vifunct6d67b7ec5adf64f0ad38f2d75964876b9.tex | |
| @@ -1 +1 @@ | |
| -num_of_vifunct6 : vifunct6 -> {'e, (0 <= 'e & 'e <= 11). int('e)} | |
| \ No newline at end of file | |
| +num_of_vifunct6 : vifunct6 -> {('e : Int), (0 <= 'e & 'e <= 11). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vimcfunct6408f9cf26e0f166611d80bbde8b472ac.tex b/sail_latex_riscv/valznum_of_vimcfunct6408f9cf26e0f166611d80bbde8b472ac.tex | |
| index 44e47f65..226cfb56 100644 | |
| --- a/sail_latex_riscv/valznum_of_vimcfunct6408f9cf26e0f166611d80bbde8b472ac.tex | |
| +++ b/sail_latex_riscv/valznum_of_vimcfunct6408f9cf26e0f166611d80bbde8b472ac.tex | |
| @@ -1 +1 @@ | |
| -num_of_vimcfunct6 : vimcfunct6 -> {'e, (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| +num_of_vimcfunct6 : vimcfunct6 -> {('e : Int), (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vimfunct6529801ae6ae6d8dcef25fe691d4ea17c.tex b/sail_latex_riscv/valznum_of_vimfunct6529801ae6ae6d8dcef25fe691d4ea17c.tex | |
| index d24821c1..705e5332 100644 | |
| --- a/sail_latex_riscv/valznum_of_vimfunct6529801ae6ae6d8dcef25fe691d4ea17c.tex | |
| +++ b/sail_latex_riscv/valznum_of_vimfunct6529801ae6ae6d8dcef25fe691d4ea17c.tex | |
| @@ -1 +1 @@ | |
| -num_of_vimfunct6 : vimfunct6 -> {'e, (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| +num_of_vimfunct6 : vimfunct6 -> {('e : Int), (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vimsfunct62b1b2ebfd7f1f56048753305ad79a9ee.tex b/sail_latex_riscv/valznum_of_vimsfunct62b1b2ebfd7f1f56048753305ad79a9ee.tex | |
| index 17708ee6..df8d1bba 100644 | |
| --- a/sail_latex_riscv/valznum_of_vimsfunct62b1b2ebfd7f1f56048753305ad79a9ee.tex | |
| +++ b/sail_latex_riscv/valznum_of_vimsfunct62b1b2ebfd7f1f56048753305ad79a9ee.tex | |
| @@ -1 +1 @@ | |
| -num_of_vimsfunct6 : vimsfunct6 -> {'e, (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| +num_of_vimsfunct6 : vimsfunct6 -> {('e : Int), (0 <= 'e & 'e <= 0). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_visgfunct6fc0f86e3039d5ab8ef4d3509fb27fc84.tex b/sail_latex_riscv/valznum_of_visgfunct6fc0f86e3039d5ab8ef4d3509fb27fc84.tex | |
| index 129035e1..c635bbcd 100644 | |
| --- a/sail_latex_riscv/valznum_of_visgfunct6fc0f86e3039d5ab8ef4d3509fb27fc84.tex | |
| +++ b/sail_latex_riscv/valznum_of_visgfunct6fc0f86e3039d5ab8ef4d3509fb27fc84.tex | |
| @@ -1 +1 @@ | |
| -num_of_visgfunct6 : visgfunct6 -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_visgfunct6 : visgfunct6 -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vlewidthe1ea9fc712f17052544bdaa8905ce231.tex b/sail_latex_riscv/valznum_of_vlewidthe1ea9fc712f17052544bdaa8905ce231.tex | |
| index 88ea3a04..a8bef988 100644 | |
| --- a/sail_latex_riscv/valznum_of_vlewidthe1ea9fc712f17052544bdaa8905ce231.tex | |
| +++ b/sail_latex_riscv/valznum_of_vlewidthe1ea9fc712f17052544bdaa8905ce231.tex | |
| @@ -1 +1 @@ | |
| -num_of_vlewidth : vlewidth -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_vlewidth : vlewidth -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vmlsopf5723a18e2cbe3dc409f154210678895.tex b/sail_latex_riscv/valznum_of_vmlsopf5723a18e2cbe3dc409f154210678895.tex | |
| index 52669322..131dde17 100644 | |
| --- a/sail_latex_riscv/valznum_of_vmlsopf5723a18e2cbe3dc409f154210678895.tex | |
| +++ b/sail_latex_riscv/valznum_of_vmlsopf5723a18e2cbe3dc409f154210678895.tex | |
| @@ -1 +1 @@ | |
| -num_of_vmlsop : vmlsop -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vmlsop : vmlsop -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vsetop973d77fb79d4789a5dbd6668e6cc4ace.tex b/sail_latex_riscv/valznum_of_vsetop973d77fb79d4789a5dbd6668e6cc4ace.tex | |
| index 46db51a2..565f2707 100644 | |
| --- a/sail_latex_riscv/valznum_of_vsetop973d77fb79d4789a5dbd6668e6cc4ace.tex | |
| +++ b/sail_latex_riscv/valznum_of_vsetop973d77fb79d4789a5dbd6668e6cc4ace.tex | |
| @@ -1 +1 @@ | |
| -num_of_vsetop : vsetop -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vsetop : vsetop -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vvcmpfunct6b7c04f6482980f3a634542eab9acaa79.tex b/sail_latex_riscv/valznum_of_vvcmpfunct6b7c04f6482980f3a634542eab9acaa79.tex | |
| index 6b605a0a..05819f4a 100644 | |
| --- a/sail_latex_riscv/valznum_of_vvcmpfunct6b7c04f6482980f3a634542eab9acaa79.tex | |
| +++ b/sail_latex_riscv/valznum_of_vvcmpfunct6b7c04f6482980f3a634542eab9acaa79.tex | |
| @@ -1 +1 @@ | |
| -num_of_vvcmpfunct6 : vvcmpfunct6 -> {'e, (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| +num_of_vvcmpfunct6 : vvcmpfunct6 -> {('e : Int), (0 <= 'e & 'e <= 5). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vvfunct6499baaf1b0f058e4ef0ca6696b85fa1a.tex b/sail_latex_riscv/valznum_of_vvfunct6499baaf1b0f058e4ef0ca6696b85fa1a.tex | |
| index 01354c6d..0db1d59d 100644 | |
| --- a/sail_latex_riscv/valznum_of_vvfunct6499baaf1b0f058e4ef0ca6696b85fa1a.tex | |
| +++ b/sail_latex_riscv/valznum_of_vvfunct6499baaf1b0f058e4ef0ca6696b85fa1a.tex | |
| @@ -1 +1 @@ | |
| -num_of_vvfunct6 : vvfunct6 -> {'e, (0 <= 'e & 'e <= 20). int('e)} | |
| \ No newline at end of file | |
| +num_of_vvfunct6 : vvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 20). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vvmcfunct6ba2fd28517ea8042ab9c48b85ecc5b9c.tex b/sail_latex_riscv/valznum_of_vvmcfunct6ba2fd28517ea8042ab9c48b85ecc5b9c.tex | |
| index 16071ae3..268ac5d5 100644 | |
| --- a/sail_latex_riscv/valznum_of_vvmcfunct6ba2fd28517ea8042ab9c48b85ecc5b9c.tex | |
| +++ b/sail_latex_riscv/valznum_of_vvmcfunct6ba2fd28517ea8042ab9c48b85ecc5b9c.tex | |
| @@ -1 +1 @@ | |
| -num_of_vvmcfunct6 : vvmcfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vvmcfunct6 : vvmcfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vvmfunct6f804d5f5ecd06abd880aa8f0662dd3cf.tex b/sail_latex_riscv/valznum_of_vvmfunct6f804d5f5ecd06abd880aa8f0662dd3cf.tex | |
| index 5288e079..9a2a4d15 100644 | |
| --- a/sail_latex_riscv/valznum_of_vvmfunct6f804d5f5ecd06abd880aa8f0662dd3cf.tex | |
| +++ b/sail_latex_riscv/valznum_of_vvmfunct6f804d5f5ecd06abd880aa8f0662dd3cf.tex | |
| @@ -1 +1 @@ | |
| -num_of_vvmfunct6 : vvmfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vvmfunct6 : vvmfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vvmsfunct6d5dde4b710e86df1f4d2b60fa648cf4f.tex b/sail_latex_riscv/valznum_of_vvmsfunct6d5dde4b710e86df1f4d2b60fa648cf4f.tex | |
| index f85352fb..95cb69cf 100644 | |
| --- a/sail_latex_riscv/valznum_of_vvmsfunct6d5dde4b710e86df1f4d2b60fa648cf4f.tex | |
| +++ b/sail_latex_riscv/valznum_of_vvmsfunct6d5dde4b710e86df1f4d2b60fa648cf4f.tex | |
| @@ -1 +1 @@ | |
| -num_of_vvmsfunct6 : vvmsfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vvmsfunct6 : vvmsfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vxcmpfunct61888f61d04603efc67362f184853f45b.tex b/sail_latex_riscv/valznum_of_vxcmpfunct61888f61d04603efc67362f184853f45b.tex | |
| index 5511c0af..998cf916 100644 | |
| --- a/sail_latex_riscv/valznum_of_vxcmpfunct61888f61d04603efc67362f184853f45b.tex | |
| +++ b/sail_latex_riscv/valznum_of_vxcmpfunct61888f61d04603efc67362f184853f45b.tex | |
| @@ -1 +1 @@ | |
| -num_of_vxcmpfunct6 : vxcmpfunct6 -> {'e, (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| +num_of_vxcmpfunct6 : vxcmpfunct6 -> {('e : Int), (0 <= 'e & 'e <= 7). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vxfunct65a84716becdef29f97b4e514d41ce287.tex b/sail_latex_riscv/valznum_of_vxfunct65a84716becdef29f97b4e514d41ce287.tex | |
| index 95d2de87..1701a084 100644 | |
| --- a/sail_latex_riscv/valznum_of_vxfunct65a84716becdef29f97b4e514d41ce287.tex | |
| +++ b/sail_latex_riscv/valznum_of_vxfunct65a84716becdef29f97b4e514d41ce287.tex | |
| @@ -1 +1 @@ | |
| -num_of_vxfunct6 : vxfunct6 -> {'e, (0 <= 'e & 'e <= 19). int('e)} | |
| \ No newline at end of file | |
| +num_of_vxfunct6 : vxfunct6 -> {('e : Int), (0 <= 'e & 'e <= 19). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vxmcfunct6f03489979e1e6c087a2146e4934e42f4.tex b/sail_latex_riscv/valznum_of_vxmcfunct6f03489979e1e6c087a2146e4934e42f4.tex | |
| index 48104716..d97cb081 100644 | |
| --- a/sail_latex_riscv/valznum_of_vxmcfunct6f03489979e1e6c087a2146e4934e42f4.tex | |
| +++ b/sail_latex_riscv/valznum_of_vxmcfunct6f03489979e1e6c087a2146e4934e42f4.tex | |
| @@ -1 +1 @@ | |
| -num_of_vxmcfunct6 : vxmcfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vxmcfunct6 : vxmcfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vxmfunct65dbeae161a006e41df9f39e94e228b4e.tex b/sail_latex_riscv/valznum_of_vxmfunct65dbeae161a006e41df9f39e94e228b4e.tex | |
| index 0fee2ca3..59ebbc3f 100644 | |
| --- a/sail_latex_riscv/valznum_of_vxmfunct65dbeae161a006e41df9f39e94e228b4e.tex | |
| +++ b/sail_latex_riscv/valznum_of_vxmfunct65dbeae161a006e41df9f39e94e228b4e.tex | |
| @@ -1 +1 @@ | |
| -num_of_vxmfunct6 : vxmfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vxmfunct6 : vxmfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vxmsfunct6268f91e1c52a2c66dc7b52c381a4ae65.tex b/sail_latex_riscv/valznum_of_vxmsfunct6268f91e1c52a2c66dc7b52c381a4ae65.tex | |
| index 1456f405..558fd52c 100644 | |
| --- a/sail_latex_riscv/valznum_of_vxmsfunct6268f91e1c52a2c66dc7b52c381a4ae65.tex | |
| +++ b/sail_latex_riscv/valznum_of_vxmsfunct6268f91e1c52a2c66dc7b52c381a4ae65.tex | |
| @@ -1 +1 @@ | |
| -num_of_vxmsfunct6 : vxmsfunct6 -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_vxmsfunct6 : vxmsfunct6 -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_vxsgfunct6981f52b04c2dc72d261714c34fb83ae6.tex b/sail_latex_riscv/valznum_of_vxsgfunct6981f52b04c2dc72d261714c34fb83ae6.tex | |
| index 43e5d3b3..b46f3fca 100644 | |
| --- a/sail_latex_riscv/valznum_of_vxsgfunct6981f52b04c2dc72d261714c34fb83ae6.tex | |
| +++ b/sail_latex_riscv/valznum_of_vxsgfunct6981f52b04c2dc72d261714c34fb83ae6.tex | |
| @@ -1 +1 @@ | |
| -num_of_vxsgfunct6 : vxsgfunct6 -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_vxsgfunct6 : vxsgfunct6 -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_wmvvfunct69ec655645fd11f223ae05480143570c0.tex b/sail_latex_riscv/valznum_of_wmvvfunct69ec655645fd11f223ae05480143570c0.tex | |
| index d114589d..ed85e2b5 100644 | |
| --- a/sail_latex_riscv/valznum_of_wmvvfunct69ec655645fd11f223ae05480143570c0.tex | |
| +++ b/sail_latex_riscv/valznum_of_wmvvfunct69ec655645fd11f223ae05480143570c0.tex | |
| @@ -1 +1 @@ | |
| -num_of_wmvvfunct6 : wmvvfunct6 -> {'e, (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| +num_of_wmvvfunct6 : wmvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 2). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_wmvxfunct67d58d2c22d9fb5cdb2ad6dc4f59adc8b.tex b/sail_latex_riscv/valznum_of_wmvxfunct67d58d2c22d9fb5cdb2ad6dc4f59adc8b.tex | |
| index 4de2b088..54675a27 100644 | |
| --- a/sail_latex_riscv/valznum_of_wmvxfunct67d58d2c22d9fb5cdb2ad6dc4f59adc8b.tex | |
| +++ b/sail_latex_riscv/valznum_of_wmvxfunct67d58d2c22d9fb5cdb2ad6dc4f59adc8b.tex | |
| @@ -1 +1 @@ | |
| -num_of_wmvxfunct6 : wmvxfunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_wmvxfunct6 : wmvxfunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_word_width80798ebf687d8b1ac16aea948967912d.tex b/sail_latex_riscv/valznum_of_word_width80798ebf687d8b1ac16aea948967912d.tex | |
| index bdceb00d..83c09d95 100644 | |
| --- a/sail_latex_riscv/valznum_of_word_width80798ebf687d8b1ac16aea948967912d.tex | |
| +++ b/sail_latex_riscv/valznum_of_word_width80798ebf687d8b1ac16aea948967912d.tex | |
| @@ -1 +1 @@ | |
| -num_of_word_width : word_width -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_word_width : word_width -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_write_kind056951dbaa3b47d3c25ba586d7093c91.tex b/sail_latex_riscv/valznum_of_write_kind056951dbaa3b47d3c25ba586d7093c91.tex | |
| index ecd492df..ad1e37e9 100644 | |
| --- a/sail_latex_riscv/valznum_of_write_kind056951dbaa3b47d3c25ba586d7093c91.tex | |
| +++ b/sail_latex_riscv/valznum_of_write_kind056951dbaa3b47d3c25ba586d7093c91.tex | |
| @@ -1 +1 @@ | |
| -num_of_write_kind : write_kind -> {'e, (0 <= 'e & 'e <= 10). int('e)} | |
| \ No newline at end of file | |
| +num_of_write_kind : write_kind -> {('e : Int), (0 <= 'e & 'e <= 10). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_wvfunct6853035a8eadd13b11f63977f302a6e0c.tex b/sail_latex_riscv/valznum_of_wvfunct6853035a8eadd13b11f63977f302a6e0c.tex | |
| index 9e5f01ef..fca1d1c3 100644 | |
| --- a/sail_latex_riscv/valznum_of_wvfunct6853035a8eadd13b11f63977f302a6e0c.tex | |
| +++ b/sail_latex_riscv/valznum_of_wvfunct6853035a8eadd13b11f63977f302a6e0c.tex | |
| @@ -1 +1 @@ | |
| -num_of_wvfunct6 : wvfunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_wvfunct6 : wvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_wvvfunct6e6194ccd5e4a6742bb083dc8b05a8339.tex b/sail_latex_riscv/valznum_of_wvvfunct6e6194ccd5e4a6742bb083dc8b05a8339.tex | |
| index da12c970..0e7dcb23 100644 | |
| --- a/sail_latex_riscv/valznum_of_wvvfunct6e6194ccd5e4a6742bb083dc8b05a8339.tex | |
| +++ b/sail_latex_riscv/valznum_of_wvvfunct6e6194ccd5e4a6742bb083dc8b05a8339.tex | |
| @@ -1 +1 @@ | |
| -num_of_wvvfunct6 : wvvfunct6 -> {'e, (0 <= 'e & 'e <= 6). int('e)} | |
| \ No newline at end of file | |
| +num_of_wvvfunct6 : wvvfunct6 -> {('e : Int), (0 <= 'e & 'e <= 6). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_wvxfunct6866884c974fab4dbfb3e148feb38fb3e.tex b/sail_latex_riscv/valznum_of_wvxfunct6866884c974fab4dbfb3e148feb38fb3e.tex | |
| index 2f58afbc..5e88ed02 100644 | |
| --- a/sail_latex_riscv/valznum_of_wvxfunct6866884c974fab4dbfb3e148feb38fb3e.tex | |
| +++ b/sail_latex_riscv/valznum_of_wvxfunct6866884c974fab4dbfb3e148feb38fb3e.tex | |
| @@ -1 +1 @@ | |
| -num_of_wvxfunct6 : wvxfunct6 -> {'e, (0 <= 'e & 'e <= 6). int('e)} | |
| \ No newline at end of file | |
| +num_of_wvxfunct6 : wvxfunct6 -> {('e : Int), (0 <= 'e & 'e <= 6). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_wxfunct649ded849c1d5ce951afa6640dc19e0e5.tex b/sail_latex_riscv/valznum_of_wxfunct649ded849c1d5ce951afa6640dc19e0e5.tex | |
| index 66428212..9789b067 100644 | |
| --- a/sail_latex_riscv/valznum_of_wxfunct649ded849c1d5ce951afa6640dc19e0e5.tex | |
| +++ b/sail_latex_riscv/valznum_of_wxfunct649ded849c1d5ce951afa6640dc19e0e5.tex | |
| @@ -1 +1 @@ | |
| -num_of_wxfunct6 : wxfunct6 -> {'e, (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| +num_of_wxfunct6 : wxfunct6 -> {('e : Int), (0 <= 'e & 'e <= 3). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznum_of_zzicondop3e6d4701d8934768c6aaf82a93f9c62d.tex b/sail_latex_riscv/valznum_of_zzicondop3e6d4701d8934768c6aaf82a93f9c62d.tex | |
| index 94eec92e..cdd243fd 100644 | |
| --- a/sail_latex_riscv/valznum_of_zzicondop3e6d4701d8934768c6aaf82a93f9c62d.tex | |
| +++ b/sail_latex_riscv/valznum_of_zzicondop3e6d4701d8934768c6aaf82a93f9c62d.tex | |
| @@ -1 +1 @@ | |
| -num_of_zicondop : zicondop -> {'e, (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| +num_of_zicondop : zicondop -> {('e : Int), (0 <= 'e & 'e <= 1). int('e)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznvfunct6_of_num0024ef08f19862ea544de8fc44c347fd.tex b/sail_latex_riscv/valznvfunct6_of_num0024ef08f19862ea544de8fc44c347fd.tex | |
| index df512830..4b7591c1 100644 | |
| --- a/sail_latex_riscv/valznvfunct6_of_num0024ef08f19862ea544de8fc44c347fd.tex | |
| +++ b/sail_latex_riscv/valznvfunct6_of_num0024ef08f19862ea544de8fc44c347fd.tex | |
| @@ -1 +1 @@ | |
| -nvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> nvfunct6 | |
| \ No newline at end of file | |
| +nvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> nvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznvsfunct6_of_num4a1d70ebd4b88fab641290203a9a9a6a.tex b/sail_latex_riscv/valznvsfunct6_of_num4a1d70ebd4b88fab641290203a9a9a6a.tex | |
| index 43161625..eca9d8a1 100644 | |
| --- a/sail_latex_riscv/valznvsfunct6_of_num4a1d70ebd4b88fab641290203a9a9a6a.tex | |
| +++ b/sail_latex_riscv/valznvsfunct6_of_num4a1d70ebd4b88fab641290203a9a9a6a.tex | |
| @@ -1 +1 @@ | |
| -nvsfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> nvsfunct6 | |
| \ No newline at end of file | |
| +nvsfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> nvsfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznxfunct6_of_num80a9e00ff2d7da4fedc101226e306f33.tex b/sail_latex_riscv/valznxfunct6_of_num80a9e00ff2d7da4fedc101226e306f33.tex | |
| index 58f482e9..c6d62a29 100644 | |
| --- a/sail_latex_riscv/valznxfunct6_of_num80a9e00ff2d7da4fedc101226e306f33.tex | |
| +++ b/sail_latex_riscv/valznxfunct6_of_num80a9e00ff2d7da4fedc101226e306f33.tex | |
| @@ -1 +1 @@ | |
| -nxfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> nxfunct6 | |
| \ No newline at end of file | |
| +nxfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> nxfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valznxsfunct6_of_numf2cf5fee0dac601b1519bdcf028a00d5.tex b/sail_latex_riscv/valznxsfunct6_of_numf2cf5fee0dac601b1519bdcf028a00d5.tex | |
| index 3a38bd37..4141492d 100644 | |
| --- a/sail_latex_riscv/valznxsfunct6_of_numf2cf5fee0dac601b1519bdcf028a00d5.tex | |
| +++ b/sail_latex_riscv/valznxsfunct6_of_numf2cf5fee0dac601b1519bdcf028a00d5.tex | |
| @@ -1 +1 @@ | |
| -nxsfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> nxsfunct6 | |
| \ No newline at end of file | |
| +nxsfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> nxsfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzones26f94136f5db8afd4e9df1e512f7fdc5.tex b/sail_latex_riscv/valzones26f94136f5db8afd4e9df1e512f7fdc5.tex | |
| index eec1b3e1..9554a081 100644 | |
| --- a/sail_latex_riscv/valzones26f94136f5db8afd4e9df1e512f7fdc5.tex | |
| +++ b/sail_latex_riscv/valzones26f94136f5db8afd4e9df1e512f7fdc5.tex | |
| @@ -1 +1 @@ | |
| -ones : forall 'n, 'n >= 0. implicit('n) -> bits('n) | |
| \ No newline at end of file | |
| +ones : forall ('n : Int), 'n >= 0. implicit('n) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzor_vec467c7a3f74be27085fe1b2aa3651ffe7.tex b/sail_latex_riscv/valzor_vec467c7a3f74be27085fe1b2aa3651ffe7.tex | |
| index 5739da96..45e50cce 100644 | |
| --- a/sail_latex_riscv/valzor_vec467c7a3f74be27085fe1b2aa3651ffe7.tex | |
| +++ b/sail_latex_riscv/valzor_vec467c7a3f74be27085fe1b2aa3651ffe7.tex | |
| @@ -1 +1 @@ | |
| -or_vec : forall 'n. (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| +or_vec : forall ('n : Int). (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzparse_hex_bitsffc487cc20efdb17ca475dcb1377cc5f.tex b/sail_latex_riscv/valzparse_hex_bitsffc487cc20efdb17ca475dcb1377cc5f.tex | |
| index 2b781310..daf417d7 100644 | |
| --- a/sail_latex_riscv/valzparse_hex_bitsffc487cc20efdb17ca475dcb1377cc5f.tex | |
| +++ b/sail_latex_riscv/valzparse_hex_bitsffc487cc20efdb17ca475dcb1377cc5f.tex | |
| @@ -1 +1 @@ | |
| -parse_hex_bits : forall 'n, 'n > 0. (int('n), string) -> bits('n) | |
| \ No newline at end of file | |
| +parse_hex_bits : forall ('n : Int), 'n > 0. (int('n), string) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzphys_mem_readdcad862ae3a42c22bfc78bad8e3328db.tex b/sail_latex_riscv/valzphys_mem_readdcad862ae3a42c22bfc78bad8e3328db.tex | |
| index 44e48c72..b80d2c06 100644 | |
| --- a/sail_latex_riscv/valzphys_mem_readdcad862ae3a42c22bfc78bad8e3328db.tex | |
| +++ b/sail_latex_riscv/valzphys_mem_readdcad862ae3a42c22bfc78bad8e3328db.tex | |
| @@ -1,2 +1,2 @@ | |
| -phys_mem_read : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +phys_mem_read : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), xlenbits, int('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzphys_mem_writefae7815adda192bed56129eba4b7bb01.tex b/sail_latex_riscv/valzphys_mem_writefae7815adda192bed56129eba4b7bb01.tex | |
| index 1f4be083..2da027a1 100644 | |
| --- a/sail_latex_riscv/valzphys_mem_writefae7815adda192bed56129eba4b7bb01.tex | |
| +++ b/sail_latex_riscv/valzphys_mem_writefae7815adda192bed56129eba4b7bb01.tex | |
| @@ -1,2 +1,2 @@ | |
| -phys_mem_write : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +phys_mem_write : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (write_kind, xlenbits, int('n), bits(8 * 'n), mem_meta) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzplain_vector_access792547dd734d4ff2e6078cbb88967469.tex b/sail_latex_riscv/valzplain_vector_access792547dd734d4ff2e6078cbb88967469.tex | |
| index 3f083084..40f8289d 100644 | |
| --- a/sail_latex_riscv/valzplain_vector_access792547dd734d4ff2e6078cbb88967469.tex | |
| +++ b/sail_latex_riscv/valzplain_vector_access792547dd734d4ff2e6078cbb88967469.tex | |
| @@ -1 +1 @@ | |
| -plain_vector_access : forall 'n 'm ('a : Type), (0 <= 'm & 'm < 'n). (vector('n, 'a), int('m)) -> 'a | |
| \ No newline at end of file | |
| +plain_vector_access : forall ('n : Int) ('m : Int) ('a : Type), (0 <= 'm & 'm < 'n). (vector('n, 'a), int('m)) -> 'a | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzplain_vector_updateb31d67bfe51b1a6f79983347dfc57da0.tex b/sail_latex_riscv/valzplain_vector_updateb31d67bfe51b1a6f79983347dfc57da0.tex | |
| index d8dff4a6..146fbaed 100644 | |
| --- a/sail_latex_riscv/valzplain_vector_updateb31d67bfe51b1a6f79983347dfc57da0.tex | |
| +++ b/sail_latex_riscv/valzplain_vector_updateb31d67bfe51b1a6f79983347dfc57da0.tex | |
| @@ -1 +1,2 @@ | |
| -plain_vector_update : forall 'n 'm ('a : Type), (0 <= 'm & 'm < 'n). (vector('n, 'a), int('m), 'a) -> vector('n, 'a) | |
| \ No newline at end of file | |
| +plain_vector_update : forall ('n : Int) ('m : Int) ('a : Type), (0 <= 'm & 'm < 'n). | |
| + (vector('n, 'a), int('m), 'a) -> vector('n, 'a) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpmp_mem_readc45533831bda1c394396c536ba168b7a.tex b/sail_latex_riscv/valzpmp_mem_readc45533831bda1c394396c536ba168b7a.tex | |
| index c27d9caf..d394a2f0 100644 | |
| --- a/sail_latex_riscv/valzpmp_mem_readc45533831bda1c394396c536ba168b7a.tex | |
| +++ b/sail_latex_riscv/valzpmp_mem_readc45533831bda1c394396c536ba168b7a.tex | |
| @@ -1,2 +1,2 @@ | |
| -pmp_mem_read : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +pmp_mem_read : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (AccessType(ext_access_type), Privilege, xlenbits, int('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpmp_mem_write4ae53a6de2384826cc3e765eccd350e8.tex b/sail_latex_riscv/valzpmp_mem_write4ae53a6de2384826cc3e765eccd350e8.tex | |
| index 84cb18e1..0995d3de 100644 | |
| --- a/sail_latex_riscv/valzpmp_mem_write4ae53a6de2384826cc3e765eccd350e8.tex | |
| +++ b/sail_latex_riscv/valzpmp_mem_write4ae53a6de2384826cc3e765eccd350e8.tex | |
| @@ -1,2 +1,2 @@ | |
| -pmp_mem_write : forall 'n, (0 < 'n & 'n <= max_mem_access). | |
| +pmp_mem_write : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| (write_kind, xlenbits, int('n), bits(8 * 'n), AccessType(ext_access_type), Privilege, mem_meta) -> MemoryOpResult(bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpmpaddrmatch_of_num92a36380d4ab664cee1f4ee0143e390f.tex b/sail_latex_riscv/valzpmpaddrmatch_of_num92a36380d4ab664cee1f4ee0143e390f.tex | |
| index 2933ca5e..041cdabe 100644 | |
| --- a/sail_latex_riscv/valzpmpaddrmatch_of_num92a36380d4ab664cee1f4ee0143e390f.tex | |
| +++ b/sail_latex_riscv/valzpmpaddrmatch_of_num92a36380d4ab664cee1f4ee0143e390f.tex | |
| @@ -1 +1 @@ | |
| -pmpAddrMatch_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> pmpAddrMatch | |
| \ No newline at end of file | |
| +pmpAddrMatch_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> pmpAddrMatch | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpmpaddrmatchtype_of_num05d549dd7f3bf4d35f3c38ea6a015bf3.tex b/sail_latex_riscv/valzpmpaddrmatchtype_of_num05d549dd7f3bf4d35f3c38ea6a015bf3.tex | |
| index 1db06584..b2c84e5e 100644 | |
| --- a/sail_latex_riscv/valzpmpaddrmatchtype_of_num05d549dd7f3bf4d35f3c38ea6a015bf3.tex | |
| +++ b/sail_latex_riscv/valzpmpaddrmatchtype_of_num05d549dd7f3bf4d35f3c38ea6a015bf3.tex | |
| @@ -1 +1 @@ | |
| -PmpAddrMatchType_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> PmpAddrMatchType | |
| \ No newline at end of file | |
| +PmpAddrMatchType_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> PmpAddrMatchType | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpmpcheck818accaacf804d4474fe874d5c97929a.tex b/sail_latex_riscv/valzpmpcheck818accaacf804d4474fe874d5c97929a.tex | |
| index 6cabfb3d..27bcaf78 100644 | |
| --- a/sail_latex_riscv/valzpmpcheck818accaacf804d4474fe874d5c97929a.tex | |
| +++ b/sail_latex_riscv/valzpmpcheck818accaacf804d4474fe874d5c97929a.tex | |
| @@ -1 +1,2 @@ | |
| -pmpCheck : forall 'n, 'n > 0. (xlenbits, int('n), AccessType(ext_access_type), Privilege) -> option(ExceptionType) | |
| \ No newline at end of file | |
| +pmpCheck : forall ('n : Int), 'n > 0. | |
| + (xlenbits, int('n), AccessType(ext_access_type), Privilege) -> option(ExceptionType) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpmpmatch_of_num271d71ea451fba2032d2e5ea441d9f49.tex b/sail_latex_riscv/valzpmpmatch_of_num271d71ea451fba2032d2e5ea441d9f49.tex | |
| index 768ff802..67cc7b1e 100644 | |
| --- a/sail_latex_riscv/valzpmpmatch_of_num271d71ea451fba2032d2e5ea441d9f49.tex | |
| +++ b/sail_latex_riscv/valzpmpmatch_of_num271d71ea451fba2032d2e5ea441d9f49.tex | |
| @@ -1 +1 @@ | |
| -pmpMatch_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> pmpMatch | |
| \ No newline at end of file | |
| +pmpMatch_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> pmpMatch | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzpow2e971ce2f9ebb899590551317286dfd1b.tex b/sail_latex_riscv/valzpow2e971ce2f9ebb899590551317286dfd1b.tex | |
| index 84b045d0..1e96e24d 100644 | |
| --- a/sail_latex_riscv/valzpow2e971ce2f9ebb899590551317286dfd1b.tex | |
| +++ b/sail_latex_riscv/valzpow2e971ce2f9ebb899590551317286dfd1b.tex | |
| @@ -1 +1 @@ | |
| -pow2 : forall 'n. int('n) -> int(2 ^ 'n) | |
| \ No newline at end of file | |
| +pow2 : forall ('n : Int). int('n) -> int(2 ^ 'n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzprerr_bits932899725108ebe483d3226f250f2b92.tex b/sail_latex_riscv/valzprerr_bits932899725108ebe483d3226f250f2b92.tex | |
| index 1647fa64..44097a2a 100644 | |
| --- a/sail_latex_riscv/valzprerr_bits932899725108ebe483d3226f250f2b92.tex | |
| +++ b/sail_latex_riscv/valzprerr_bits932899725108ebe483d3226f250f2b92.tex | |
| @@ -1 +1 @@ | |
| -prerr_bits : forall 'n. (string, bits('n)) -> unit | |
| \ No newline at end of file | |
| +prerr_bits : forall ('n : Int). (string, bits('n)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzprint_bits30cf225474fbf3e575d7aa83aa309559.tex b/sail_latex_riscv/valzprint_bits30cf225474fbf3e575d7aa83aa309559.tex | |
| index 72ef30ba..e2cebf75 100644 | |
| --- a/sail_latex_riscv/valzprint_bits30cf225474fbf3e575d7aa83aa309559.tex | |
| +++ b/sail_latex_riscv/valzprint_bits30cf225474fbf3e575d7aa83aa309559.tex | |
| @@ -1 +1 @@ | |
| -print_bits : forall 'n. (string, bits('n)) -> unit | |
| \ No newline at end of file | |
| +print_bits : forall ('n : Int). (string, bits('n)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzprivilege_of_num84ee3b92a1b0c896120347634e28615d.tex b/sail_latex_riscv/valzprivilege_of_num84ee3b92a1b0c896120347634e28615d.tex | |
| index 65f1d2bd..9c103f72 100644 | |
| --- a/sail_latex_riscv/valzprivilege_of_num84ee3b92a1b0c896120347634e28615d.tex | |
| +++ b/sail_latex_riscv/valzprivilege_of_num84ee3b92a1b0c896120347634e28615d.tex | |
| @@ -1 +1 @@ | |
| -Privilege_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> Privilege | |
| \ No newline at end of file | |
| +Privilege_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> Privilege | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzprocess_load7d9288eb90dd41d1aa3c47eda679c483.tex b/sail_latex_riscv/valzprocess_load7d9288eb90dd41d1aa3c47eda679c483.tex | |
| index ab0cad25..d56e5b89 100644 | |
| --- a/sail_latex_riscv/valzprocess_load7d9288eb90dd41d1aa3c47eda679c483.tex | |
| +++ b/sail_latex_riscv/valzprocess_load7d9288eb90dd41d1aa3c47eda679c483.tex | |
| @@ -1 +1,2 @@ | |
| -process_load : forall 'n, (0 < 'n & 'n <= xlen_bytes). (regidx, xlenbits, MemoryOpResult(bits(8 * 'n)), bool) -> Retired | |
| \ No newline at end of file | |
| +process_load : forall ('n : Int), (0 < 'n & 'n <= xlen_bytes). | |
| + (regidx, xlenbits, MemoryOpResult(bits(8 * 'n)), bool) -> Retired | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzprocess_loadres3acadfd67bd540642036cf41405a27c0.tex b/sail_latex_riscv/valzprocess_loadres3acadfd67bd540642036cf41405a27c0.tex | |
| index 282fd177..a9a5c2bb 100644 | |
| --- a/sail_latex_riscv/valzprocess_loadres3acadfd67bd540642036cf41405a27c0.tex | |
| +++ b/sail_latex_riscv/valzprocess_loadres3acadfd67bd540642036cf41405a27c0.tex | |
| @@ -1,2 +1,2 @@ | |
| -process_loadres : forall 'n, (0 < 'n & 'n <= xlen_bytes). | |
| +process_loadres : forall ('n : Int), (0 < 'n & 'n <= xlen_bytes). | |
| (regidx, xlenbits, MemoryOpResult(bits(8 * 'n)), bool) -> Retired | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrcda9d82cd736deb89a37d9ca089373805.tex b/sail_latex_riscv/valzrcda9d82cd736deb89a37d9ca089373805.tex | |
| index e1c93545..d5c21ddf 100644 | |
| --- a/sail_latex_riscv/valzrcda9d82cd736deb89a37d9ca089373805.tex | |
| +++ b/sail_latex_riscv/valzrcda9d82cd736deb89a37d9ca089373805.tex | |
| @@ -1 +1 @@ | |
| -rC : forall 'n, (0 <= 'n & 'n < 32). regno('n) -> regtype | |
| \ No newline at end of file | |
| +rC : forall ('n : Int), (0 <= 'n & 'n < 32). regno('n) -> regtype | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_kind_of_numd8fea9b1331732e205bdd70279e0ba47.tex b/sail_latex_riscv/valzread_kind_of_numd8fea9b1331732e205bdd70279e0ba47.tex | |
| index 55af9da2..0f402163 100644 | |
| --- a/sail_latex_riscv/valzread_kind_of_numd8fea9b1331732e205bdd70279e0ba47.tex | |
| +++ b/sail_latex_riscv/valzread_kind_of_numd8fea9b1331732e205bdd70279e0ba47.tex | |
| @@ -1 +1 @@ | |
| -read_kind_of_num : forall 'e, (0 <= 'e & 'e <= 12). int('e) -> read_kind | |
| \ No newline at end of file | |
| +read_kind_of_num : forall ('e : Int), (0 <= 'e & 'e <= 12). int('e) -> read_kind | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_ram020d2ffaf84d982d4588177095c24b8e.tex b/sail_latex_riscv/valzread_ram020d2ffaf84d982d4588177095c24b8e.tex | |
| index 3a17e13d..b5c7ec15 100644 | |
| --- a/sail_latex_riscv/valzread_ram020d2ffaf84d982d4588177095c24b8e.tex | |
| +++ b/sail_latex_riscv/valzread_ram020d2ffaf84d982d4588177095c24b8e.tex | |
| @@ -1 +1,2 @@ | |
| -read_ram : forall 'n, (0 < 'n & 'n <= max_mem_access). (read_kind, xlenbits, int('n), bool) -> (bits(8 * 'n), mem_meta) | |
| \ No newline at end of file | |
| +read_ram : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| + (read_kind, xlenbits, int('n), bool) -> (bits(8 * 'n), mem_meta) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_single_elementecd82175bfb7ca4b4852fe3a0e29c21f.tex b/sail_latex_riscv/valzread_single_elementecd82175bfb7ca4b4852fe3a0e29c21f.tex | |
| index 05c23349..10e6bd80 100644 | |
| --- a/sail_latex_riscv/valzread_single_elementecd82175bfb7ca4b4852fe3a0e29c21f.tex | |
| +++ b/sail_latex_riscv/valzread_single_elementecd82175bfb7ca4b4852fe3a0e29c21f.tex | |
| @@ -1 +1 @@ | |
| -read_single_element : forall 'm 'x, (8 <= 'm & 'm <= 128). (int('m), int('x), regidx) -> bits('m) | |
| \ No newline at end of file | |
| +read_single_element : forall ('m : Int) ('x : Int), (8 <= 'm & 'm <= 128). (int('m), int('x), regidx) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_single_vreg761249dcb99d28d50a2bf2d6e4e13dae.tex b/sail_latex_riscv/valzread_single_vreg761249dcb99d28d50a2bf2d6e4e13dae.tex | |
| index ecbb7716..ae400735 100644 | |
| --- a/sail_latex_riscv/valzread_single_vreg761249dcb99d28d50a2bf2d6e4e13dae.tex | |
| +++ b/sail_latex_riscv/valzread_single_vreg761249dcb99d28d50a2bf2d6e4e13dae.tex | |
| @@ -1 +1 @@ | |
| -read_single_vreg : forall 'n 'm, 'n >= 0. (int('n), int('m), regidx) -> vector('n, bits('m)) | |
| \ No newline at end of file | |
| +read_single_vreg : forall ('n : Int) ('m : Int), 'n >= 0. (int('n), int('m), regidx) -> vector('n, bits('m)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_vmask8230a3d5f3efcc1b7617d858dbfe5006.tex b/sail_latex_riscv/valzread_vmask8230a3d5f3efcc1b7617d858dbfe5006.tex | |
| index 6488ddf0..e47db7d2 100644 | |
| --- a/sail_latex_riscv/valzread_vmask8230a3d5f3efcc1b7617d858dbfe5006.tex | |
| +++ b/sail_latex_riscv/valzread_vmask8230a3d5f3efcc1b7617d858dbfe5006.tex | |
| @@ -1 +1 @@ | |
| -read_vmask : forall 'n, 'n >= 0. (int('n), bits(1), regidx) -> vector('n, bool) | |
| \ No newline at end of file | |
| +read_vmask : forall ('n : Int), 'n >= 0. (int('n), bits(1), regidx) -> vector('n, bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_vmask_carry93b9486b37d5f24909c289e181becef5.tex b/sail_latex_riscv/valzread_vmask_carry93b9486b37d5f24909c289e181becef5.tex | |
| index 94cd939c..f4f57d61 100644 | |
| --- a/sail_latex_riscv/valzread_vmask_carry93b9486b37d5f24909c289e181becef5.tex | |
| +++ b/sail_latex_riscv/valzread_vmask_carry93b9486b37d5f24909c289e181becef5.tex | |
| @@ -1 +1 @@ | |
| -read_vmask_carry : forall 'n, 'n >= 0. (int('n), bits(1), regidx) -> vector('n, bool) | |
| \ No newline at end of file | |
| +read_vmask_carry : forall ('n : Int), 'n >= 0. (int('n), bits(1), regidx) -> vector('n, bool) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzread_vreg919e2b05fa0cbbe1f62c7d6ab24aea4d.tex b/sail_latex_riscv/valzread_vreg919e2b05fa0cbbe1f62c7d6ab24aea4d.tex | |
| index 90b6c912..25177382 100644 | |
| --- a/sail_latex_riscv/valzread_vreg919e2b05fa0cbbe1f62c7d6ab24aea4d.tex | |
| +++ b/sail_latex_riscv/valzread_vreg919e2b05fa0cbbe1f62c7d6ab24aea4d.tex | |
| @@ -1 +1,2 @@ | |
| -read_vreg : forall 'n 'm 'p, 'n >= 0. (int('n), int('m), int('p), regidx) -> vector('n, bits('m)) | |
| \ No newline at end of file | |
| +read_vreg : forall ('n : Int) ('m : Int) ('p : Int), 'n >= 0. | |
| + (int('n), int('m), int('p), regidx) -> vector('n, bits('m)) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzregidx_to_regno46c7ee8e863ba355f36bf094aa680714.tex b/sail_latex_riscv/valzregidx_to_regno46c7ee8e863ba355f36bf094aa680714.tex | |
| index ce851262..4d87b19c 100644 | |
| --- a/sail_latex_riscv/valzregidx_to_regno46c7ee8e863ba355f36bf094aa680714.tex | |
| +++ b/sail_latex_riscv/valzregidx_to_regno46c7ee8e863ba355f36bf094aa680714.tex | |
| @@ -1 +1 @@ | |
| -regidx_to_regno : bits(5) -> {'n, (0 <= 'n & 'n < 32). regno('n)} | |
| \ No newline at end of file | |
| +regidx_to_regno : bits(5) -> {('n : Int), (0 <= 'n & 'n < 32). regno('n)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzreplicate_bitsb29bdab6bb9437712accf2dc81ea3d3e.tex b/sail_latex_riscv/valzreplicate_bitsb29bdab6bb9437712accf2dc81ea3d3e.tex | |
| index 638c36ac..0f7f4059 100644 | |
| --- a/sail_latex_riscv/valzreplicate_bitsb29bdab6bb9437712accf2dc81ea3d3e.tex | |
| +++ b/sail_latex_riscv/valzreplicate_bitsb29bdab6bb9437712accf2dc81ea3d3e.tex | |
| @@ -1 +1 @@ | |
| -replicate_bits : forall 'n 'm. (bits('n), int('m)) -> bits('n * 'm) | |
| \ No newline at end of file | |
| +replicate_bits : forall ('n : Int) ('m : Int), 'm >= 0. (bits('n), int('m)) -> bits('n * 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzretired_of_num68ab3748534f762d814246f11fcf7c77.tex b/sail_latex_riscv/valzretired_of_num68ab3748534f762d814246f11fcf7c77.tex | |
| index b18a2ce7..7725fb7d 100644 | |
| --- a/sail_latex_riscv/valzretired_of_num68ab3748534f762d814246f11fcf7c77.tex | |
| +++ b/sail_latex_riscv/valzretired_of_num68ab3748534f762d814246f11fcf7c77.tex | |
| @@ -1 +1 @@ | |
| -Retired_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> Retired | |
| \ No newline at end of file | |
| +Retired_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> Retired | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrff2ed1bbacd3ac737af7186c6d8884885.tex b/sail_latex_riscv/valzrff2ed1bbacd3ac737af7186c6d8884885.tex | |
| index 64eaddd3..53ea625a 100644 | |
| --- a/sail_latex_riscv/valzrff2ed1bbacd3ac737af7186c6d8884885.tex | |
| +++ b/sail_latex_riscv/valzrff2ed1bbacd3ac737af7186c6d8884885.tex | |
| @@ -1 +1 @@ | |
| -rF : forall 'n, (0 <= 'n & 'n < 32). regno('n) -> flenbits | |
| \ No newline at end of file | |
| +rF : forall ('n : Int), (0 <= 'n & 'n < 32). regno('n) -> flenbits | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrfvvfunct6_of_num466218f7c4cccaf7298925825145e11c.tex b/sail_latex_riscv/valzrfvvfunct6_of_num466218f7c4cccaf7298925825145e11c.tex | |
| index c545dae5..e902c460 100644 | |
| --- a/sail_latex_riscv/valzrfvvfunct6_of_num466218f7c4cccaf7298925825145e11c.tex | |
| +++ b/sail_latex_riscv/valzrfvvfunct6_of_num466218f7c4cccaf7298925825145e11c.tex | |
| @@ -1 +1 @@ | |
| -rfvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> rfvvfunct6 | |
| \ No newline at end of file | |
| +rfvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> rfvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrivvfunct6_of_num464e3b311d1bc31f691d87dabe85b2bf.tex b/sail_latex_riscv/valzrivvfunct6_of_num464e3b311d1bc31f691d87dabe85b2bf.tex | |
| index aabbea33..9bbdf5d8 100644 | |
| --- a/sail_latex_riscv/valzrivvfunct6_of_num464e3b311d1bc31f691d87dabe85b2bf.tex | |
| +++ b/sail_latex_riscv/valzrivvfunct6_of_num464e3b311d1bc31f691d87dabe85b2bf.tex | |
| @@ -1 +1 @@ | |
| -rivvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> rivvfunct6 | |
| \ No newline at end of file | |
| +rivvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> rivvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrmvvfunct6_of_num751330acfa3eb5a09a034a62a0175488.tex b/sail_latex_riscv/valzrmvvfunct6_of_num751330acfa3eb5a09a034a62a0175488.tex | |
| index ff63c9a8..718165bc 100644 | |
| --- a/sail_latex_riscv/valzrmvvfunct6_of_num751330acfa3eb5a09a034a62a0175488.tex | |
| +++ b/sail_latex_riscv/valzrmvvfunct6_of_num751330acfa3eb5a09a034a62a0175488.tex | |
| @@ -1 +1 @@ | |
| -rmvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> rmvvfunct6 | |
| \ No newline at end of file | |
| +rmvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> rmvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrop_of_numdb49159dd280dafb7370c6477b545c05.tex b/sail_latex_riscv/valzrop_of_numdb49159dd280dafb7370c6477b545c05.tex | |
| index fe41b1df..21c6ec6c 100644 | |
| --- a/sail_latex_riscv/valzrop_of_numdb49159dd280dafb7370c6477b545c05.tex | |
| +++ b/sail_latex_riscv/valzrop_of_numdb49159dd280dafb7370c6477b545c05.tex | |
| @@ -1 +1 @@ | |
| -rop_of_num : forall 'e, (0 <= 'e & 'e <= 9). int('e) -> rop | |
| \ No newline at end of file | |
| +rop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 9). int('e) -> rop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzropw_of_numbc49d41e4663ce1e2313189dca74c7f1.tex b/sail_latex_riscv/valzropw_of_numbc49d41e4663ce1e2313189dca74c7f1.tex | |
| index 66ccabf4..01e733c7 100644 | |
| --- a/sail_latex_riscv/valzropw_of_numbc49d41e4663ce1e2313189dca74c7f1.tex | |
| +++ b/sail_latex_riscv/valzropw_of_numbc49d41e4663ce1e2313189dca74c7f1.tex | |
| @@ -1 +1 @@ | |
| -ropw_of_num : forall 'e, (0 <= 'e & 'e <= 4). int('e) -> ropw | |
| \ No newline at end of file | |
| +ropw_of_num : forall ('e : Int), (0 <= 'e & 'e <= 4). int('e) -> ropw | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrotate_bits_left4e03f7aab76acaf8206bfa04b360ceec.tex b/sail_latex_riscv/valzrotate_bits_left4e03f7aab76acaf8206bfa04b360ceec.tex | |
| index 84829233..201458c9 100644 | |
| --- a/sail_latex_riscv/valzrotate_bits_left4e03f7aab76acaf8206bfa04b360ceec.tex | |
| +++ b/sail_latex_riscv/valzrotate_bits_left4e03f7aab76acaf8206bfa04b360ceec.tex | |
| @@ -1 +1 @@ | |
| -rotate_bits_left : forall 'n 'm, 'm >= 0. (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| +rotate_bits_left : forall ('n : Int) ('m : Int), 'm >= 0. (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrotate_bits_right483383a7bc5976025102ba9af61ab11d.tex b/sail_latex_riscv/valzrotate_bits_right483383a7bc5976025102ba9af61ab11d.tex | |
| index 0ec766c3..522e26f6 100644 | |
| --- a/sail_latex_riscv/valzrotate_bits_right483383a7bc5976025102ba9af61ab11d.tex | |
| +++ b/sail_latex_riscv/valzrotate_bits_right483383a7bc5976025102ba9af61ab11d.tex | |
| @@ -1 +1 @@ | |
| -rotate_bits_right : forall 'n 'm, 'm >= 0. (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| +rotate_bits_right : forall ('n : Int) ('m : Int), 'm >= 0. (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrotatelf071331b6fd023da4d264842a39a016a.tex b/sail_latex_riscv/valzrotatelf071331b6fd023da4d264842a39a016a.tex | |
| index 3841f436..998a4858 100644 | |
| --- a/sail_latex_riscv/valzrotatelf071331b6fd023da4d264842a39a016a.tex | |
| +++ b/sail_latex_riscv/valzrotatelf071331b6fd023da4d264842a39a016a.tex | |
| @@ -1 +1 @@ | |
| -rotatel : forall 'm 'n, ('m >= 'n & 'n >= 0). (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| +rotatel : forall ('m : Int) ('n : Int), ('m >= 'n & 'n >= 0). (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrotater926375a3d21b09b3881f991747cd9b14.tex b/sail_latex_riscv/valzrotater926375a3d21b09b3881f991747cd9b14.tex | |
| index 3b0450b8..61492698 100644 | |
| --- a/sail_latex_riscv/valzrotater926375a3d21b09b3881f991747cd9b14.tex | |
| +++ b/sail_latex_riscv/valzrotater926375a3d21b09b3881f991747cd9b14.tex | |
| @@ -1 +1 @@ | |
| -rotater : forall 'm 'n, ('m >= 'n & 'n >= 0). (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| +rotater : forall ('m : Int) ('n : Int), ('m >= 'n & 'n >= 0). (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrounding_mode_of_num6135245be40748c506fabd0190282238.tex b/sail_latex_riscv/valzrounding_mode_of_num6135245be40748c506fabd0190282238.tex | |
| index 9ee7b511..c34c7c57 100644 | |
| --- a/sail_latex_riscv/valzrounding_mode_of_num6135245be40748c506fabd0190282238.tex | |
| +++ b/sail_latex_riscv/valzrounding_mode_of_num6135245be40748c506fabd0190282238.tex | |
| @@ -1 +1 @@ | |
| -rounding_mode_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> rounding_mode | |
| \ No newline at end of file | |
| +rounding_mode_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> rounding_mode | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrv9b69db372cfdf1f63612f1bae6fd1e8a.tex b/sail_latex_riscv/valzrv9b69db372cfdf1f63612f1bae6fd1e8a.tex | |
| index 2bd6c4df..bf656467 100644 | |
| --- a/sail_latex_riscv/valzrv9b69db372cfdf1f63612f1bae6fd1e8a.tex | |
| +++ b/sail_latex_riscv/valzrv9b69db372cfdf1f63612f1bae6fd1e8a.tex | |
| @@ -1 +1 @@ | |
| -rV : forall 'n, (0 <= 'n & 'n < 32). regno('n) -> vregtype | |
| \ No newline at end of file | |
| +rV : forall ('n : Int), (0 <= 'n & 'n < 32). regno('n) -> vregtype | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrvfi_readaee7411fcd70e67f9e6d2f7f9f563435.tex b/sail_latex_riscv/valzrvfi_readaee7411fcd70e67f9e6d2f7f9f563435.tex | |
| index f82cb8cf..32831adf 100644 | |
| --- a/sail_latex_riscv/valzrvfi_readaee7411fcd70e67f9e6d2f7f9f563435.tex | |
| +++ b/sail_latex_riscv/valzrvfi_readaee7411fcd70e67f9e6d2f7f9f563435.tex | |
| @@ -1 +1 @@ | |
| -rvfi_read : forall 'n, 'n > 0. (xlenbits, int('n), MemoryOpResult((bits(8 * 'n), mem_meta))) -> unit | |
| \ No newline at end of file | |
| +rvfi_read : forall ('n : Int), 'n > 0. (xlenbits, int('n), MemoryOpResult((bits(8 * 'n), mem_meta))) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrvfi_write8e76a07b5a6f2a7b76947099108996b1.tex b/sail_latex_riscv/valzrvfi_write8e76a07b5a6f2a7b76947099108996b1.tex | |
| index aba29ce8..d5ae441d 100644 | |
| --- a/sail_latex_riscv/valzrvfi_write8e76a07b5a6f2a7b76947099108996b1.tex | |
| +++ b/sail_latex_riscv/valzrvfi_write8e76a07b5a6f2a7b76947099108996b1.tex | |
| @@ -1 +1 @@ | |
| -rvfi_write : forall 'n, 'n > 0. (xlenbits, int('n), bits(8 * 'n), mem_meta, MemoryOpResult(bool)) -> unit | |
| \ No newline at end of file | |
| +rvfi_write : forall ('n : Int), 'n > 0. (xlenbits, int('n), bits(8 * 'n), mem_meta, MemoryOpResult(bool)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrvfi_wxed842ecfeb56ef18626194f2f22935f3.tex b/sail_latex_riscv/valzrvfi_wxed842ecfeb56ef18626194f2f22935f3.tex | |
| index aa6386f3..1bdd037a 100644 | |
| --- a/sail_latex_riscv/valzrvfi_wxed842ecfeb56ef18626194f2f22935f3.tex | |
| +++ b/sail_latex_riscv/valzrvfi_wxed842ecfeb56ef18626194f2f22935f3.tex | |
| @@ -1 +1 @@ | |
| -rvfi_wX : forall 'n, (0 <= 'n & 'n < 32). (regno('n), xlenbits) -> unit | |
| \ No newline at end of file | |
| +rvfi_wX : forall ('n : Int), (0 <= 'n & 'n < 32). (regno('n), xlenbits) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzrxa8aad9466d0653707390b940aa9282e7.tex b/sail_latex_riscv/valzrxa8aad9466d0653707390b940aa9282e7.tex | |
| index 31fd1fe0..ee41a62c 100644 | |
| --- a/sail_latex_riscv/valzrxa8aad9466d0653707390b940aa9282e7.tex | |
| +++ b/sail_latex_riscv/valzrxa8aad9466d0653707390b940aa9282e7.tex | |
| @@ -1 +1 @@ | |
| -rX : forall 'n, (0 <= 'n & 'n < 32). regno('n) -> xlenbits | |
| \ No newline at end of file | |
| +rX : forall ('n : Int), (0 <= 'n & 'n < 32). regno('n) -> xlenbits | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_arith_shiftrighta24f06e92ffcd84e26ed61085c833371.tex b/sail_latex_riscv/valzsail_arith_shiftrighta24f06e92ffcd84e26ed61085c833371.tex | |
| index 398a2aed..17b5070d 100644 | |
| --- a/sail_latex_riscv/valzsail_arith_shiftrighta24f06e92ffcd84e26ed61085c833371.tex | |
| +++ b/sail_latex_riscv/valzsail_arith_shiftrighta24f06e92ffcd84e26ed61085c833371.tex | |
| @@ -1 +1 @@ | |
| -sail_arith_shiftright : forall 'n. (bitvector('n), int) -> bitvector('n) | |
| \ No newline at end of file | |
| +sail_arith_shiftright : forall ('n : Int). (bitvector('n), int) -> bitvector('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_maske146b73afc824e90813dd8234bfa3053.tex b/sail_latex_riscv/valzsail_maske146b73afc824e90813dd8234bfa3053.tex | |
| index dbda6f98..e19cb4a5 100644 | |
| --- a/sail_latex_riscv/valzsail_maske146b73afc824e90813dd8234bfa3053.tex | |
| +++ b/sail_latex_riscv/valzsail_maske146b73afc824e90813dd8234bfa3053.tex | |
| @@ -1 +1 @@ | |
| -sail_mask : forall 'len 'v, ('len >= 0 & 'v >= 0). (int('len), bits('v)) -> bits('len) | |
| \ No newline at end of file | |
| +sail_mask : forall ('len : Int) ('v : Int), ('len >= 0 & 'v >= 0). (int('len), bits('v)) -> bits('len) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_ones0510f34656bd3d7b905b0ff315bf81d7.tex b/sail_latex_riscv/valzsail_ones0510f34656bd3d7b905b0ff315bf81d7.tex | |
| index 4e0a6a6c..a8014f67 100644 | |
| --- a/sail_latex_riscv/valzsail_ones0510f34656bd3d7b905b0ff315bf81d7.tex | |
| +++ b/sail_latex_riscv/valzsail_ones0510f34656bd3d7b905b0ff315bf81d7.tex | |
| @@ -1 +1 @@ | |
| -sail_ones : forall 'n, 'n >= 0. int('n) -> bits('n) | |
| \ No newline at end of file | |
| +sail_ones : forall ('n : Int), 'n >= 0. int('n) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_shiftlefta7bc10407d10355c4e981688c9926084.tex b/sail_latex_riscv/valzsail_shiftlefta7bc10407d10355c4e981688c9926084.tex | |
| index 6e83d04d..d2088215 100644 | |
| --- a/sail_latex_riscv/valzsail_shiftlefta7bc10407d10355c4e981688c9926084.tex | |
| +++ b/sail_latex_riscv/valzsail_shiftlefta7bc10407d10355c4e981688c9926084.tex | |
| @@ -1 +1 @@ | |
| -sail_shiftleft : forall 'n. (bitvector('n), int) -> bitvector('n) | |
| \ No newline at end of file | |
| +sail_shiftleft : forall ('n : Int). (bitvector('n), int) -> bitvector('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_shiftrighte403ac5c2740b7767c2bdfe689082562.tex b/sail_latex_riscv/valzsail_shiftrighte403ac5c2740b7767c2bdfe689082562.tex | |
| index f9218e2e..f1a8ff7e 100644 | |
| --- a/sail_latex_riscv/valzsail_shiftrighte403ac5c2740b7767c2bdfe689082562.tex | |
| +++ b/sail_latex_riscv/valzsail_shiftrighte403ac5c2740b7767c2bdfe689082562.tex | |
| @@ -1 +1 @@ | |
| -sail_shiftright : forall 'n. (bitvector('n), int) -> bitvector('n) | |
| \ No newline at end of file | |
| +sail_shiftright : forall ('n : Int). (bitvector('n), int) -> bitvector('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_sign_extendb66ac7c1aaedb0cb21bdf07e4518af5e.tex b/sail_latex_riscv/valzsail_sign_extendb66ac7c1aaedb0cb21bdf07e4518af5e.tex | |
| index be66cb6b..c94b8e91 100644 | |
| --- a/sail_latex_riscv/valzsail_sign_extendb66ac7c1aaedb0cb21bdf07e4518af5e.tex | |
| +++ b/sail_latex_riscv/valzsail_sign_extendb66ac7c1aaedb0cb21bdf07e4518af5e.tex | |
| @@ -1 +1 @@ | |
| -sail_sign_extend : forall 'n 'm, 'm >= 'n. (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| +sail_sign_extend : forall ('n : Int) ('m : Int), 'm >= 'n. (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_zzero_extend411875c18d3b332113845d17151890c2.tex b/sail_latex_riscv/valzsail_zzero_extend411875c18d3b332113845d17151890c2.tex | |
| index b8f17eef..4bf6ec0f 100644 | |
| --- a/sail_latex_riscv/valzsail_zzero_extend411875c18d3b332113845d17151890c2.tex | |
| +++ b/sail_latex_riscv/valzsail_zzero_extend411875c18d3b332113845d17151890c2.tex | |
| @@ -1 +1 @@ | |
| -sail_zero_extend : forall 'n 'm, 'm >= 'n. (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| +sail_zero_extend : forall ('n : Int) ('m : Int), 'm >= 'n. (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsail_zzeros174d4d4928427d9df9fa9749f1df5f96.tex b/sail_latex_riscv/valzsail_zzeros174d4d4928427d9df9fa9749f1df5f96.tex | |
| index ffdd9095..fee38a4b 100644 | |
| --- a/sail_latex_riscv/valzsail_zzeros174d4d4928427d9df9fa9749f1df5f96.tex | |
| +++ b/sail_latex_riscv/valzsail_zzeros174d4d4928427d9df9fa9749f1df5f96.tex | |
| @@ -1 +1 @@ | |
| -sail_zeros : forall 'n, 'n >= 0. int('n) -> bits('n) | |
| \ No newline at end of file | |
| +sail_zeros : forall ('n : Int), 'n >= 0. int('n) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsatpmode_of_num09ad57622dbe0d0a7b111194f1a36856.tex b/sail_latex_riscv/valzsatpmode_of_num09ad57622dbe0d0a7b111194f1a36856.tex | |
| index 68a6a867..29198346 100644 | |
| --- a/sail_latex_riscv/valzsatpmode_of_num09ad57622dbe0d0a7b111194f1a36856.tex | |
| +++ b/sail_latex_riscv/valzsatpmode_of_num09ad57622dbe0d0a7b111194f1a36856.tex | |
| @@ -1 +1 @@ | |
| -SATPMode_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> SATPMode | |
| \ No newline at end of file | |
| +SATPMode_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> SATPMode | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzseed_opst_of_numf83d66097ccbfc3cdc7fa8b94f8969b6.tex b/sail_latex_riscv/valzseed_opst_of_numf83d66097ccbfc3cdc7fa8b94f8969b6.tex | |
| index 83947e43..08c79a5e 100644 | |
| --- a/sail_latex_riscv/valzseed_opst_of_numf83d66097ccbfc3cdc7fa8b94f8969b6.tex | |
| +++ b/sail_latex_riscv/valzseed_opst_of_numf83d66097ccbfc3cdc7fa8b94f8969b6.tex | |
| @@ -1 +1 @@ | |
| -seed_opst_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> seed_opst | |
| \ No newline at end of file | |
| +seed_opst_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> seed_opst | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzset_slice_bits5956200094c551f35973411fcc90a521.tex b/sail_latex_riscv/valzset_slice_bits5956200094c551f35973411fcc90a521.tex | |
| index 489683ac..20e00d6c 100644 | |
| --- a/sail_latex_riscv/valzset_slice_bits5956200094c551f35973411fcc90a521.tex | |
| +++ b/sail_latex_riscv/valzset_slice_bits5956200094c551f35973411fcc90a521.tex | |
| @@ -1 +1 @@ | |
| -set_slice_bits : forall 'n 'm. (implicit('n), int('m), bits('n), int, bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| +set_slice_bits : forall ('n : Int) ('m : Int). (implicit('n), int('m), bits('n), int, bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzset_slice_intf4b6b0ed3d8b3bb2f2e0d7a492959629.tex b/sail_latex_riscv/valzset_slice_intf4b6b0ed3d8b3bb2f2e0d7a492959629.tex | |
| index f42f0424..edb9c5e7 100644 | |
| --- a/sail_latex_riscv/valzset_slice_intf4b6b0ed3d8b3bb2f2e0d7a492959629.tex | |
| +++ b/sail_latex_riscv/valzset_slice_intf4b6b0ed3d8b3bb2f2e0d7a492959629.tex | |
| @@ -1 +1 @@ | |
| -set_slice_int : forall 'w. (int('w), int, int, bits('w)) -> int | |
| \ No newline at end of file | |
| +set_slice_int : forall ('w : Int). (int('w), int, int, bits('w)) -> int | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzshift_bits_left0754e8b870e2a3ba46646c35dac7af10.tex b/sail_latex_riscv/valzshift_bits_left0754e8b870e2a3ba46646c35dac7af10.tex | |
| index 4b985e37..75506009 100644 | |
| --- a/sail_latex_riscv/valzshift_bits_left0754e8b870e2a3ba46646c35dac7af10.tex | |
| +++ b/sail_latex_riscv/valzshift_bits_left0754e8b870e2a3ba46646c35dac7af10.tex | |
| @@ -1 +1 @@ | |
| -shift_bits_left : forall 'n 'm. (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| +shift_bits_left : forall ('n : Int) ('m : Int). (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzshift_bits_right281f5e6a28fe3c92d35fe5c78a0deb41.tex b/sail_latex_riscv/valzshift_bits_right281f5e6a28fe3c92d35fe5c78a0deb41.tex | |
| index 5b295aed..e1547ff2 100644 | |
| --- a/sail_latex_riscv/valzshift_bits_right281f5e6a28fe3c92d35fe5c78a0deb41.tex | |
| +++ b/sail_latex_riscv/valzshift_bits_right281f5e6a28fe3c92d35fe5c78a0deb41.tex | |
| @@ -1 +1 @@ | |
| -shift_bits_right : forall 'n 'm. (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| +shift_bits_right : forall ('n : Int) ('m : Int). (bits('n), bits('m)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzshiftl7827d0dcac29bd8258f158e7c1e77658.tex b/sail_latex_riscv/valzshiftl7827d0dcac29bd8258f158e7c1e77658.tex | |
| index cf19461a..71a418ee 100644 | |
| --- a/sail_latex_riscv/valzshiftl7827d0dcac29bd8258f158e7c1e77658.tex | |
| +++ b/sail_latex_riscv/valzshiftl7827d0dcac29bd8258f158e7c1e77658.tex | |
| @@ -1 +1 @@ | |
| -shiftl : forall 'm 'n, 'n >= 0. (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| +shiftl : forall ('m : Int) ('n : Int), 'n >= 0. (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzshiftr173b7dba7206ed1b61a12344bdf9182a.tex b/sail_latex_riscv/valzshiftr173b7dba7206ed1b61a12344bdf9182a.tex | |
| index 46222126..1bd71916 100644 | |
| --- a/sail_latex_riscv/valzshiftr173b7dba7206ed1b61a12344bdf9182a.tex | |
| +++ b/sail_latex_riscv/valzshiftr173b7dba7206ed1b61a12344bdf9182a.tex | |
| @@ -1 +1 @@ | |
| -shiftr : forall 'm 'n, 'n >= 0. (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| +shiftr : forall ('m : Int) ('n : Int), 'n >= 0. (bits('m), int('n)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsign_extendd299e34344c466213b3253f0d877453d.tex b/sail_latex_riscv/valzsign_extendd299e34344c466213b3253f0d877453d.tex | |
| index 71b22f93..e367fa70 100644 | |
| --- a/sail_latex_riscv/valzsign_extendd299e34344c466213b3253f0d877453d.tex | |
| +++ b/sail_latex_riscv/valzsign_extendd299e34344c466213b3253f0d877453d.tex | |
| @@ -1 +1 @@ | |
| -sign_extend : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m) | |
| \ No newline at end of file | |
| +sign_extend : forall ('n : Int) ('m : Int), 'm >= 'n. (implicit('m), bits('n)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsigned36d2317f34f1dacb4e465e6e56b185e6.tex b/sail_latex_riscv/valzsigned36d2317f34f1dacb4e465e6e56b185e6.tex | |
| index 8197f196..75b658cf 100644 | |
| --- a/sail_latex_riscv/valzsigned36d2317f34f1dacb4e465e6e56b185e6.tex | |
| +++ b/sail_latex_riscv/valzsigned36d2317f34f1dacb4e465e6e56b185e6.tex | |
| @@ -1 +1 @@ | |
| -signed : forall 'n, 'n > 0. bits('n) -> range(- (2 ^ ('n - 1)), 2 ^ ('n - 1) - 1) | |
| \ No newline at end of file | |
| +signed : forall ('n : Int), 'n > 0. bits('n) -> range(- (2 ^ ('n - 1)), 2 ^ ('n - 1) - 1) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzslice9979e992fd48f77a2c3fef7fbcce068e.tex b/sail_latex_riscv/valzslice9979e992fd48f77a2c3fef7fbcce068e.tex | |
| index 73306c77..3673b4d0 100644 | |
| --- a/sail_latex_riscv/valzslice9979e992fd48f77a2c3fef7fbcce068e.tex | |
| +++ b/sail_latex_riscv/valzslice9979e992fd48f77a2c3fef7fbcce068e.tex | |
| @@ -1 +1 @@ | |
| -slice : forall 'n 'm 'o, (0 <= 'm & 0 <= 'n). (bits('m), int('o), int('n)) -> bits('n) | |
| \ No newline at end of file | |
| +slice : forall ('n : Int) ('m : Int) ('o : Int), (0 <= 'm & 0 <= 'n). (bits('m), int('o), int('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzslice_maske01cafc7448fbf1583dc5dd96b06c854.tex b/sail_latex_riscv/valzslice_maske01cafc7448fbf1583dc5dd96b06c854.tex | |
| index 3a029e93..77bf7c81 100644 | |
| --- a/sail_latex_riscv/valzslice_maske01cafc7448fbf1583dc5dd96b06c854.tex | |
| +++ b/sail_latex_riscv/valzslice_maske01cafc7448fbf1583dc5dd96b06c854.tex | |
| @@ -1 +1 @@ | |
| -slice_mask : forall 'n, 'n >= 0. (implicit('n), int, int) -> bits('n) | |
| \ No newline at end of file | |
| +slice_mask : forall ('n : Int), 'n >= 0. (implicit('n), int, int) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsop_of_num788240d3b5d5ef8334c5920b24c291e9.tex b/sail_latex_riscv/valzsop_of_num788240d3b5d5ef8334c5920b24c291e9.tex | |
| index 0a94f0f5..40871c27 100644 | |
| --- a/sail_latex_riscv/valzsop_of_num788240d3b5d5ef8334c5920b24c291e9.tex | |
| +++ b/sail_latex_riscv/valzsop_of_num788240d3b5d5ef8334c5920b24c291e9.tex | |
| @@ -1 +1 @@ | |
| -sop_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> sop | |
| \ No newline at end of file | |
| +sop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> sop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsopw_of_num696c7b3c0b6fb9b9c9d699cd0a410ea3.tex b/sail_latex_riscv/valzsopw_of_num696c7b3c0b6fb9b9c9d699cd0a410ea3.tex | |
| index 322d2210..093f3285 100644 | |
| --- a/sail_latex_riscv/valzsopw_of_num696c7b3c0b6fb9b9c9d699cd0a410ea3.tex | |
| +++ b/sail_latex_riscv/valzsopw_of_num696c7b3c0b6fb9b9c9d699cd0a410ea3.tex | |
| @@ -1 +1 @@ | |
| -sopw_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> sopw | |
| \ No newline at end of file | |
| +sopw_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> sopw | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsub_atom328a68dfbab1a07c42d4e7b98eac766f.tex b/sail_latex_riscv/valzsub_atom328a68dfbab1a07c42d4e7b98eac766f.tex | |
| index 8b78831d..75cc2565 100644 | |
| --- a/sail_latex_riscv/valzsub_atom328a68dfbab1a07c42d4e7b98eac766f.tex | |
| +++ b/sail_latex_riscv/valzsub_atom328a68dfbab1a07c42d4e7b98eac766f.tex | |
| @@ -1 +1 @@ | |
| -sub_atom : forall 'n 'm. (int('n), int('m)) -> int('n - 'm) | |
| \ No newline at end of file | |
| +sub_atom : forall ('n : Int) ('m : Int). (int('n), int('m)) -> int('n - 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsub_bitsf0dc4fc3429d45517c523db21af72127.tex b/sail_latex_riscv/valzsub_bitsf0dc4fc3429d45517c523db21af72127.tex | |
| index 5f2dfaee..c3992272 100644 | |
| --- a/sail_latex_riscv/valzsub_bitsf0dc4fc3429d45517c523db21af72127.tex | |
| +++ b/sail_latex_riscv/valzsub_bitsf0dc4fc3429d45517c523db21af72127.tex | |
| @@ -1 +1 @@ | |
| -sub_bits : forall 'n. (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| +sub_bits : forall ('n : Int). (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsub_vec326e0ba0bb00229be26645e2d44dbd83.tex b/sail_latex_riscv/valzsub_vec326e0ba0bb00229be26645e2d44dbd83.tex | |
| index 17b59e7b..b62484d5 100644 | |
| --- a/sail_latex_riscv/valzsub_vec326e0ba0bb00229be26645e2d44dbd83.tex | |
| +++ b/sail_latex_riscv/valzsub_vec326e0ba0bb00229be26645e2d44dbd83.tex | |
| @@ -1 +1 @@ | |
| -sub_vec : forall 'n. (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| +sub_vec : forall ('n : Int). (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsub_vec_int5e6c04459782b1b8cc706ba2e4c8a435.tex b/sail_latex_riscv/valzsub_vec_int5e6c04459782b1b8cc706ba2e4c8a435.tex | |
| index dfe2b1d9..568790f9 100644 | |
| --- a/sail_latex_riscv/valzsub_vec_int5e6c04459782b1b8cc706ba2e4c8a435.tex | |
| +++ b/sail_latex_riscv/valzsub_vec_int5e6c04459782b1b8cc706ba2e4c8a435.tex | |
| @@ -1 +1 @@ | |
| -sub_vec_int : forall 'n. (bits('n), int) -> bits('n) | |
| \ No newline at end of file | |
| +sub_vec_int : forall ('n : Int). (bits('n), int) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzsubrange_bits6c497c14df4f4754bd345a6c56ca2aad.tex b/sail_latex_riscv/valzsubrange_bits6c497c14df4f4754bd345a6c56ca2aad.tex | |
| index 8170bffa..fa5e47bd 100644 | |
| --- a/sail_latex_riscv/valzsubrange_bits6c497c14df4f4754bd345a6c56ca2aad.tex | |
| +++ b/sail_latex_riscv/valzsubrange_bits6c497c14df4f4754bd345a6c56ca2aad.tex | |
| @@ -1 +1,2 @@ | |
| -subrange_bits : forall 'n 'm 'o, (0 <= 'o & 'o <= 'm & 'm < 'n). (bits('n), int('m), int('o)) -> bits('m - 'o + 1) | |
| \ No newline at end of file | |
| +subrange_bits : forall ('n : Int) ('m : Int) ('o : Int), (0 <= 'o & 'o <= 'm & 'm < 'n). | |
| + (bits('n), int('m), int('o)) -> bits('m - 'o + 1) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzto_bits9fb7c0bf64c9bfa589ae4882a09f2a40.tex b/sail_latex_riscv/valzto_bits9fb7c0bf64c9bfa589ae4882a09f2a40.tex | |
| index 52cc8d29..e8880e05 100644 | |
| --- a/sail_latex_riscv/valzto_bits9fb7c0bf64c9bfa589ae4882a09f2a40.tex | |
| +++ b/sail_latex_riscv/valzto_bits9fb7c0bf64c9bfa589ae4882a09f2a40.tex | |
| @@ -1 +1 @@ | |
| -to_bits : forall 'l, 'l >= 0. (int('l), int) -> bits('l) | |
| \ No newline at end of file | |
| +to_bits : forall ('l : Int), 'l >= 0. (int('l), int) -> bits('l) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valztrans_kind_of_num89fdff5348b6925bdad7af7bbcc092d6.tex b/sail_latex_riscv/valztrans_kind_of_num89fdff5348b6925bdad7af7bbcc092d6.tex | |
| index 8faa556a..86894049 100644 | |
| --- a/sail_latex_riscv/valztrans_kind_of_num89fdff5348b6925bdad7af7bbcc092d6.tex | |
| +++ b/sail_latex_riscv/valztrans_kind_of_num89fdff5348b6925bdad7af7bbcc092d6.tex | |
| @@ -1 +1 @@ | |
| -trans_kind_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> trans_kind | |
| \ No newline at end of file | |
| +trans_kind_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> trans_kind | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valztrapvectormode_of_num8f2938d16cb187b62f9cdbbb35278d48.tex b/sail_latex_riscv/valztrapvectormode_of_num8f2938d16cb187b62f9cdbbb35278d48.tex | |
| index 80a5a094..79cd2ce6 100644 | |
| --- a/sail_latex_riscv/valztrapvectormode_of_num8f2938d16cb187b62f9cdbbb35278d48.tex | |
| +++ b/sail_latex_riscv/valztrapvectormode_of_num8f2938d16cb187b62f9cdbbb35278d48.tex | |
| @@ -1 +1 @@ | |
| -TrapVectorMode_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> TrapVectorMode | |
| \ No newline at end of file | |
| +TrapVectorMode_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> TrapVectorMode | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valztruncatea666e28ae0c8ca7327a2b3fcd1ed4ec7.tex b/sail_latex_riscv/valztruncatea666e28ae0c8ca7327a2b3fcd1ed4ec7.tex | |
| index ed1b336a..3bcb9cb8 100644 | |
| --- a/sail_latex_riscv/valztruncatea666e28ae0c8ca7327a2b3fcd1ed4ec7.tex | |
| +++ b/sail_latex_riscv/valztruncatea666e28ae0c8ca7327a2b3fcd1ed4ec7.tex | |
| @@ -1 +1 @@ | |
| -truncate : forall 'm 'n, ('m >= 0 & 'm <= 'n). (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| +truncate : forall ('m : Int) ('n : Int), ('m >= 0 & 'm <= 'n). (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valztruncatelsb4d124c6ec672453343dc0b20d295e82d.tex b/sail_latex_riscv/valztruncatelsb4d124c6ec672453343dc0b20d295e82d.tex | |
| index 37d929a9..d1479d91 100644 | |
| --- a/sail_latex_riscv/valztruncatelsb4d124c6ec672453343dc0b20d295e82d.tex | |
| +++ b/sail_latex_riscv/valztruncatelsb4d124c6ec672453343dc0b20d295e82d.tex | |
| @@ -1 +1 @@ | |
| -truncateLSB : forall 'm 'n, ('m >= 0 & 'm <= 'n). (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| +truncateLSB : forall ('m : Int) ('n : Int), ('m >= 0 & 'm <= 'n). (bits('n), int('m)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzundefined_bitvectorc0153f961b53b1b17bf36adcf5409590.tex b/sail_latex_riscv/valzundefined_bitvectorc0153f961b53b1b17bf36adcf5409590.tex | |
| index a758c28e..1bff1f51 100644 | |
| --- a/sail_latex_riscv/valzundefined_bitvectorc0153f961b53b1b17bf36adcf5409590.tex | |
| +++ b/sail_latex_riscv/valzundefined_bitvectorc0153f961b53b1b17bf36adcf5409590.tex | |
| @@ -1 +1 @@ | |
| -undefined_bitvector : forall 'n. int('n) -> bitvector('n) | |
| \ No newline at end of file | |
| +undefined_bitvector : forall ('n : Int). int('n) -> bitvector('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzundefined_range78fb4a60a699f8333068f57d526860fa.tex b/sail_latex_riscv/valzundefined_range78fb4a60a699f8333068f57d526860fa.tex | |
| index 797bceb3..255c8c31 100644 | |
| --- a/sail_latex_riscv/valzundefined_range78fb4a60a699f8333068f57d526860fa.tex | |
| +++ b/sail_latex_riscv/valzundefined_range78fb4a60a699f8333068f57d526860fa.tex | |
| @@ -1 +1 @@ | |
| -undefined_range : forall 'n 'm. (int('n), int('m)) -> range('n, 'm) | |
| \ No newline at end of file | |
| +undefined_range : forall ('n : Int) ('m : Int). (int('n), int('m)) -> range('n, 'm) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzundefined_vector7dcc506a79e97a89a0d66bc54b515466.tex b/sail_latex_riscv/valzundefined_vector7dcc506a79e97a89a0d66bc54b515466.tex | |
| index b536ad61..10729b80 100644 | |
| --- a/sail_latex_riscv/valzundefined_vector7dcc506a79e97a89a0d66bc54b515466.tex | |
| +++ b/sail_latex_riscv/valzundefined_vector7dcc506a79e97a89a0d66bc54b515466.tex | |
| @@ -1 +1 @@ | |
| -undefined_vector : forall 'n ('a : Type). (int('n), 'a) -> vector('n, 'a) | |
| \ No newline at end of file | |
| +undefined_vector : forall ('n : Int) ('a : Type). (int('n), 'a) -> vector('n, 'a) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzunsigned1010eda2cdd2666cd8fd0ddf82ac526f.tex b/sail_latex_riscv/valzunsigned1010eda2cdd2666cd8fd0ddf82ac526f.tex | |
| index 410c5cb0..2bf99f64 100644 | |
| --- a/sail_latex_riscv/valzunsigned1010eda2cdd2666cd8fd0ddf82ac526f.tex | |
| +++ b/sail_latex_riscv/valzunsigned1010eda2cdd2666cd8fd0ddf82ac526f.tex | |
| @@ -1 +1 @@ | |
| -unsigned : forall 'n. bits('n) -> range(0, 2 ^ 'n - 1) | |
| \ No newline at end of file | |
| +unsigned : forall ('n : Int). bits('n) -> range(0, 2 ^ 'n - 1) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzuop_of_num86c5f7f375d0126822beff686eb42370.tex b/sail_latex_riscv/valzuop_of_num86c5f7f375d0126822beff686eb42370.tex | |
| index 0529fee3..001384f9 100644 | |
| --- a/sail_latex_riscv/valzuop_of_num86c5f7f375d0126822beff686eb42370.tex | |
| +++ b/sail_latex_riscv/valzuop_of_num86c5f7f375d0126822beff686eb42370.tex | |
| @@ -1 +1 @@ | |
| -uop_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> uop | |
| \ No newline at end of file | |
| +uop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> uop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzupdate_subrange_bitsb5ffe862b26310b45a779cd45bbf041e.tex b/sail_latex_riscv/valzupdate_subrange_bitsb5ffe862b26310b45a779cd45bbf041e.tex | |
| index ce5b4d19..d07341a1 100644 | |
| --- a/sail_latex_riscv/valzupdate_subrange_bitsb5ffe862b26310b45a779cd45bbf041e.tex | |
| +++ b/sail_latex_riscv/valzupdate_subrange_bitsb5ffe862b26310b45a779cd45bbf041e.tex | |
| @@ -1,2 +1,2 @@ | |
| -update_subrange_bits : forall 'n 'm 'o, (0 <= 'o & 'o <= 'm & 'm < 'n). | |
| +update_subrange_bits : forall ('n : Int) ('m : Int) ('o : Int), (0 <= 'o & 'o <= 'm & 'm < 'n). | |
| (bits('n), int('m), int('o), bits('m - ('o - 1))) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvalid_hex_bits3d13251182f3a5b7d23d84db5a213493.tex b/sail_latex_riscv/valzvalid_hex_bits3d13251182f3a5b7d23d84db5a213493.tex | |
| index a08e81ee..7b2e59d1 100644 | |
| --- a/sail_latex_riscv/valzvalid_hex_bits3d13251182f3a5b7d23d84db5a213493.tex | |
| +++ b/sail_latex_riscv/valzvalid_hex_bits3d13251182f3a5b7d23d84db5a213493.tex | |
| @@ -1 +1 @@ | |
| -valid_hex_bits : forall 'n, 'n > 0. (int('n), string) -> bool | |
| \ No newline at end of file | |
| +valid_hex_bits : forall ('n : Int), 'n > 0. (int('n), string) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvaliddoubleregscd4e0fc960d20d254e143f01d81b4d44.tex b/sail_latex_riscv/valzvaliddoubleregscd4e0fc960d20d254e143f01d81b4d44.tex | |
| index 47b6b144..d8ec4ae2 100644 | |
| --- a/sail_latex_riscv/valzvaliddoubleregscd4e0fc960d20d254e143f01d81b4d44.tex | |
| +++ b/sail_latex_riscv/valzvaliddoubleregscd4e0fc960d20d254e143f01d81b4d44.tex | |
| @@ -1 +1 @@ | |
| -validDoubleRegs : forall 'n, 'n > 0. (implicit('n), vector('n, regidx)) -> bool | |
| \ No newline at end of file | |
| +validDoubleRegs : forall ('n : Int), 'n > 0. (implicit('n), vector('n, regidx)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvector_inita510fd0ead8056bd52754fbb56c09b98.tex b/sail_latex_riscv/valzvector_inita510fd0ead8056bd52754fbb56c09b98.tex | |
| index c7d2567c..ae672871 100644 | |
| --- a/sail_latex_riscv/valzvector_inita510fd0ead8056bd52754fbb56c09b98.tex | |
| +++ b/sail_latex_riscv/valzvector_inita510fd0ead8056bd52754fbb56c09b98.tex | |
| @@ -1 +1 @@ | |
| -vector_init : forall 'n ('a : Type), 'n >= 0. (implicit('n), 'a) -> vector('n, 'a) | |
| \ No newline at end of file | |
| +vector_init : forall ('n : Int) ('a : Type), 'n >= 0. (implicit('n), 'a) -> vector('n, 'a) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvector_length9ee541b308cdfd9738d44bfb3dff4b46.tex b/sail_latex_riscv/valzvector_length9ee541b308cdfd9738d44bfb3dff4b46.tex | |
| index 3294816b..e79d75fe 100644 | |
| --- a/sail_latex_riscv/valzvector_length9ee541b308cdfd9738d44bfb3dff4b46.tex | |
| +++ b/sail_latex_riscv/valzvector_length9ee541b308cdfd9738d44bfb3dff4b46.tex | |
| @@ -1 +1 @@ | |
| -vector_length : forall 'n ('a : Type). vector('n, 'a) -> int('n) | |
| \ No newline at end of file | |
| +vector_length : forall ('n : Int) ('a : Type). vector('n, 'a) -> int('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvext2funct6_of_num10790fa38f547f988796a7b35e7da07a.tex b/sail_latex_riscv/valzvext2funct6_of_num10790fa38f547f988796a7b35e7da07a.tex | |
| index 2ba5f47c..bf6e3828 100644 | |
| --- a/sail_latex_riscv/valzvext2funct6_of_num10790fa38f547f988796a7b35e7da07a.tex | |
| +++ b/sail_latex_riscv/valzvext2funct6_of_num10790fa38f547f988796a7b35e7da07a.tex | |
| @@ -1 +1 @@ | |
| -vext2funct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vext2funct6 | |
| \ No newline at end of file | |
| +vext2funct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vext2funct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvext4funct6_of_numc83eb14a0af7dcfa35d516fcbb2ee513.tex b/sail_latex_riscv/valzvext4funct6_of_numc83eb14a0af7dcfa35d516fcbb2ee513.tex | |
| index b8fbe2d2..5d6fdc93 100644 | |
| --- a/sail_latex_riscv/valzvext4funct6_of_numc83eb14a0af7dcfa35d516fcbb2ee513.tex | |
| +++ b/sail_latex_riscv/valzvext4funct6_of_numc83eb14a0af7dcfa35d516fcbb2ee513.tex | |
| @@ -1 +1 @@ | |
| -vext4funct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vext4funct6 | |
| \ No newline at end of file | |
| +vext4funct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vext4funct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvext8funct6_of_numa679b61cd8e522ca8b0e455fe9b511e9.tex b/sail_latex_riscv/valzvext8funct6_of_numa679b61cd8e522ca8b0e455fe9b511e9.tex | |
| index d0364ee2..4afdf7ec 100644 | |
| --- a/sail_latex_riscv/valzvext8funct6_of_numa679b61cd8e522ca8b0e455fe9b511e9.tex | |
| +++ b/sail_latex_riscv/valzvext8funct6_of_numa679b61cd8e522ca8b0e455fe9b511e9.tex | |
| @@ -1 +1 @@ | |
| -vext8funct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vext8funct6 | |
| \ No newline at end of file | |
| +vext8funct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vext8funct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvfnunary0_of_num2fe6ee3231313bf5bc36ab901d1b7dd7.tex b/sail_latex_riscv/valzvfnunary0_of_num2fe6ee3231313bf5bc36ab901d1b7dd7.tex | |
| index 3c1479af..3f34f431 100644 | |
| --- a/sail_latex_riscv/valzvfnunary0_of_num2fe6ee3231313bf5bc36ab901d1b7dd7.tex | |
| +++ b/sail_latex_riscv/valzvfnunary0_of_num2fe6ee3231313bf5bc36ab901d1b7dd7.tex | |
| @@ -1 +1 @@ | |
| -vfnunary0_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> vfnunary0 | |
| \ No newline at end of file | |
| +vfnunary0_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> vfnunary0 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvfunary0_of_numf01648e6e9b909dea3ed4a2410a5aba2.tex b/sail_latex_riscv/valzvfunary0_of_numf01648e6e9b909dea3ed4a2410a5aba2.tex | |
| index aea682e8..8337f4e7 100644 | |
| --- a/sail_latex_riscv/valzvfunary0_of_numf01648e6e9b909dea3ed4a2410a5aba2.tex | |
| +++ b/sail_latex_riscv/valzvfunary0_of_numf01648e6e9b909dea3ed4a2410a5aba2.tex | |
| @@ -1 +1 @@ | |
| -vfunary0_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> vfunary0 | |
| \ No newline at end of file | |
| +vfunary0_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> vfunary0 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvfunary1_of_numf7a6285aae19c114bf5d25ce4758ae59.tex b/sail_latex_riscv/valzvfunary1_of_numf7a6285aae19c114bf5d25ce4758ae59.tex | |
| index 2f4fa9e5..7e0341e2 100644 | |
| --- a/sail_latex_riscv/valzvfunary1_of_numf7a6285aae19c114bf5d25ce4758ae59.tex | |
| +++ b/sail_latex_riscv/valzvfunary1_of_numf7a6285aae19c114bf5d25ce4758ae59.tex | |
| @@ -1 +1 @@ | |
| -vfunary1_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> vfunary1 | |
| \ No newline at end of file | |
| +vfunary1_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> vfunary1 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvfwunary0_of_num05a8aa34b80bf3717e415115c1af58a1.tex b/sail_latex_riscv/valzvfwunary0_of_num05a8aa34b80bf3717e415115c1af58a1.tex | |
| index 8acff3e2..8e4714a7 100644 | |
| --- a/sail_latex_riscv/valzvfwunary0_of_num05a8aa34b80bf3717e415115c1af58a1.tex | |
| +++ b/sail_latex_riscv/valzvfwunary0_of_num05a8aa34b80bf3717e415115c1af58a1.tex | |
| @@ -1 +1 @@ | |
| -vfwunary0_of_num : forall 'e, (0 <= 'e & 'e <= 6). int('e) -> vfwunary0 | |
| \ No newline at end of file | |
| +vfwunary0_of_num : forall ('e : Int), (0 <= 'e & 'e <= 6). int('e) -> vfwunary0 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvicmpfunct6_of_numb556a2605d2dd213b277ce014044d638.tex b/sail_latex_riscv/valzvicmpfunct6_of_numb556a2605d2dd213b277ce014044d638.tex | |
| index a4ca7b3c..f021578a 100644 | |
| --- a/sail_latex_riscv/valzvicmpfunct6_of_numb556a2605d2dd213b277ce014044d638.tex | |
| +++ b/sail_latex_riscv/valzvicmpfunct6_of_numb556a2605d2dd213b277ce014044d638.tex | |
| @@ -1 +1 @@ | |
| -vicmpfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> vicmpfunct6 | |
| \ No newline at end of file | |
| +vicmpfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> vicmpfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvifunct6_of_num4a4afa54cc8613e8c86c47bcd13f582d.tex b/sail_latex_riscv/valzvifunct6_of_num4a4afa54cc8613e8c86c47bcd13f582d.tex | |
| index 869fb46e..b43f0ac1 100644 | |
| --- a/sail_latex_riscv/valzvifunct6_of_num4a4afa54cc8613e8c86c47bcd13f582d.tex | |
| +++ b/sail_latex_riscv/valzvifunct6_of_num4a4afa54cc8613e8c86c47bcd13f582d.tex | |
| @@ -1 +1 @@ | |
| -vifunct6_of_num : forall 'e, (0 <= 'e & 'e <= 11). int('e) -> vifunct6 | |
| \ No newline at end of file | |
| +vifunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 11). int('e) -> vifunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvimcfunct6_of_num2bbd84014970e24a0bfcfef2804a856f.tex b/sail_latex_riscv/valzvimcfunct6_of_num2bbd84014970e24a0bfcfef2804a856f.tex | |
| index b182678b..d87fe991 100644 | |
| --- a/sail_latex_riscv/valzvimcfunct6_of_num2bbd84014970e24a0bfcfef2804a856f.tex | |
| +++ b/sail_latex_riscv/valzvimcfunct6_of_num2bbd84014970e24a0bfcfef2804a856f.tex | |
| @@ -1 +1 @@ | |
| -vimcfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 0). int('e) -> vimcfunct6 | |
| \ No newline at end of file | |
| +vimcfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 0). int('e) -> vimcfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvimfunct6_of_num04ccb7f384990028a7d7b2d63add06b8.tex b/sail_latex_riscv/valzvimfunct6_of_num04ccb7f384990028a7d7b2d63add06b8.tex | |
| index 222fd71f..d7b5d718 100644 | |
| --- a/sail_latex_riscv/valzvimfunct6_of_num04ccb7f384990028a7d7b2d63add06b8.tex | |
| +++ b/sail_latex_riscv/valzvimfunct6_of_num04ccb7f384990028a7d7b2d63add06b8.tex | |
| @@ -1 +1 @@ | |
| -vimfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 0). int('e) -> vimfunct6 | |
| \ No newline at end of file | |
| +vimfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 0). int('e) -> vimfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvimsfunct6_of_num79753b6794b4eab26c7bfb3a70662e76.tex b/sail_latex_riscv/valzvimsfunct6_of_num79753b6794b4eab26c7bfb3a70662e76.tex | |
| index f21afb71..046b80da 100644 | |
| --- a/sail_latex_riscv/valzvimsfunct6_of_num79753b6794b4eab26c7bfb3a70662e76.tex | |
| +++ b/sail_latex_riscv/valzvimsfunct6_of_num79753b6794b4eab26c7bfb3a70662e76.tex | |
| @@ -1 +1 @@ | |
| -vimsfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 0). int('e) -> vimsfunct6 | |
| \ No newline at end of file | |
| +vimsfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 0). int('e) -> vimsfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvisgfunct6_of_num8b0aa8797be01edae373bcd2f0a27745.tex b/sail_latex_riscv/valzvisgfunct6_of_num8b0aa8797be01edae373bcd2f0a27745.tex | |
| index 93895923..0d2d7ed2 100644 | |
| --- a/sail_latex_riscv/valzvisgfunct6_of_num8b0aa8797be01edae373bcd2f0a27745.tex | |
| +++ b/sail_latex_riscv/valzvisgfunct6_of_num8b0aa8797be01edae373bcd2f0a27745.tex | |
| @@ -1 +1 @@ | |
| -visgfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> visgfunct6 | |
| \ No newline at end of file | |
| +visgfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> visgfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvlewidth_of_num045760e9ec50e7d05c5b2c9bbed76275.tex b/sail_latex_riscv/valzvlewidth_of_num045760e9ec50e7d05c5b2c9bbed76275.tex | |
| index 3b5e4763..de228e86 100644 | |
| --- a/sail_latex_riscv/valzvlewidth_of_num045760e9ec50e7d05c5b2c9bbed76275.tex | |
| +++ b/sail_latex_riscv/valzvlewidth_of_num045760e9ec50e7d05c5b2c9bbed76275.tex | |
| @@ -1 +1 @@ | |
| -vlewidth_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> vlewidth | |
| \ No newline at end of file | |
| +vlewidth_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> vlewidth | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvmlsop_of_num45c7e74e65bc011e1058613bd86731c1.tex b/sail_latex_riscv/valzvmlsop_of_num45c7e74e65bc011e1058613bd86731c1.tex | |
| index 5a6929b8..d8f1d470 100644 | |
| --- a/sail_latex_riscv/valzvmlsop_of_num45c7e74e65bc011e1058613bd86731c1.tex | |
| +++ b/sail_latex_riscv/valzvmlsop_of_num45c7e74e65bc011e1058613bd86731c1.tex | |
| @@ -1 +1 @@ | |
| -vmlsop_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vmlsop | |
| \ No newline at end of file | |
| +vmlsop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vmlsop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvsetop_of_num6eb73d83ee71aec936cdc60361c2e83e.tex b/sail_latex_riscv/valzvsetop_of_num6eb73d83ee71aec936cdc60361c2e83e.tex | |
| index 7802de86..f71e2561 100644 | |
| --- a/sail_latex_riscv/valzvsetop_of_num6eb73d83ee71aec936cdc60361c2e83e.tex | |
| +++ b/sail_latex_riscv/valzvsetop_of_num6eb73d83ee71aec936cdc60361c2e83e.tex | |
| @@ -1 +1 @@ | |
| -vsetop_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vsetop | |
| \ No newline at end of file | |
| +vsetop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vsetop | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvvcmpfunct6_of_num64e76c1525e4d429795687a4db050160.tex b/sail_latex_riscv/valzvvcmpfunct6_of_num64e76c1525e4d429795687a4db050160.tex | |
| index a936bd48..77c6a452 100644 | |
| --- a/sail_latex_riscv/valzvvcmpfunct6_of_num64e76c1525e4d429795687a4db050160.tex | |
| +++ b/sail_latex_riscv/valzvvcmpfunct6_of_num64e76c1525e4d429795687a4db050160.tex | |
| @@ -1 +1 @@ | |
| -vvcmpfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 5). int('e) -> vvcmpfunct6 | |
| \ No newline at end of file | |
| +vvcmpfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 5). int('e) -> vvcmpfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvvfunct6_of_num7156ead880afd70c5398f928a390f7a3.tex b/sail_latex_riscv/valzvvfunct6_of_num7156ead880afd70c5398f928a390f7a3.tex | |
| index 429bf4e7..e50bee4d 100644 | |
| --- a/sail_latex_riscv/valzvvfunct6_of_num7156ead880afd70c5398f928a390f7a3.tex | |
| +++ b/sail_latex_riscv/valzvvfunct6_of_num7156ead880afd70c5398f928a390f7a3.tex | |
| @@ -1 +1 @@ | |
| -vvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 20). int('e) -> vvfunct6 | |
| \ No newline at end of file | |
| +vvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 20). int('e) -> vvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvvmcfunct6_of_num3cb1abe7f4c0132071b3252610a4f271.tex b/sail_latex_riscv/valzvvmcfunct6_of_num3cb1abe7f4c0132071b3252610a4f271.tex | |
| index 3035ee07..4cc18f83 100644 | |
| --- a/sail_latex_riscv/valzvvmcfunct6_of_num3cb1abe7f4c0132071b3252610a4f271.tex | |
| +++ b/sail_latex_riscv/valzvvmcfunct6_of_num3cb1abe7f4c0132071b3252610a4f271.tex | |
| @@ -1 +1 @@ | |
| -vvmcfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vvmcfunct6 | |
| \ No newline at end of file | |
| +vvmcfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vvmcfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvvmfunct6_of_numb10e64f105b5c4b951b9e4eec8b687ef.tex b/sail_latex_riscv/valzvvmfunct6_of_numb10e64f105b5c4b951b9e4eec8b687ef.tex | |
| index be7921a4..f5df498c 100644 | |
| --- a/sail_latex_riscv/valzvvmfunct6_of_numb10e64f105b5c4b951b9e4eec8b687ef.tex | |
| +++ b/sail_latex_riscv/valzvvmfunct6_of_numb10e64f105b5c4b951b9e4eec8b687ef.tex | |
| @@ -1 +1 @@ | |
| -vvmfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vvmfunct6 | |
| \ No newline at end of file | |
| +vvmfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vvmfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvvmsfunct6_of_numcfeaeb8cb14af9f0de2b5e7bba7eccc4.tex b/sail_latex_riscv/valzvvmsfunct6_of_numcfeaeb8cb14af9f0de2b5e7bba7eccc4.tex | |
| index 67ede849..0c7cc3c3 100644 | |
| --- a/sail_latex_riscv/valzvvmsfunct6_of_numcfeaeb8cb14af9f0de2b5e7bba7eccc4.tex | |
| +++ b/sail_latex_riscv/valzvvmsfunct6_of_numcfeaeb8cb14af9f0de2b5e7bba7eccc4.tex | |
| @@ -1 +1 @@ | |
| -vvmsfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vvmsfunct6 | |
| \ No newline at end of file | |
| +vvmsfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vvmsfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvxcmpfunct6_of_numde6c0a9b825f4e52763028fb3d286386.tex b/sail_latex_riscv/valzvxcmpfunct6_of_numde6c0a9b825f4e52763028fb3d286386.tex | |
| index 1d57f9b2..8063b21d 100644 | |
| --- a/sail_latex_riscv/valzvxcmpfunct6_of_numde6c0a9b825f4e52763028fb3d286386.tex | |
| +++ b/sail_latex_riscv/valzvxcmpfunct6_of_numde6c0a9b825f4e52763028fb3d286386.tex | |
| @@ -1 +1 @@ | |
| -vxcmpfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 7). int('e) -> vxcmpfunct6 | |
| \ No newline at end of file | |
| +vxcmpfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 7). int('e) -> vxcmpfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvxfunct6_of_num3f5769c9ee2adb48585f9491dd25cb60.tex b/sail_latex_riscv/valzvxfunct6_of_num3f5769c9ee2adb48585f9491dd25cb60.tex | |
| index 9b700240..2dbe1820 100644 | |
| --- a/sail_latex_riscv/valzvxfunct6_of_num3f5769c9ee2adb48585f9491dd25cb60.tex | |
| +++ b/sail_latex_riscv/valzvxfunct6_of_num3f5769c9ee2adb48585f9491dd25cb60.tex | |
| @@ -1 +1 @@ | |
| -vxfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 19). int('e) -> vxfunct6 | |
| \ No newline at end of file | |
| +vxfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 19). int('e) -> vxfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvxmcfunct6_of_numbf835f207a56d71ff783b61cb63e2217.tex b/sail_latex_riscv/valzvxmcfunct6_of_numbf835f207a56d71ff783b61cb63e2217.tex | |
| index 35e36af5..85542fbb 100644 | |
| --- a/sail_latex_riscv/valzvxmcfunct6_of_numbf835f207a56d71ff783b61cb63e2217.tex | |
| +++ b/sail_latex_riscv/valzvxmcfunct6_of_numbf835f207a56d71ff783b61cb63e2217.tex | |
| @@ -1 +1 @@ | |
| -vxmcfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vxmcfunct6 | |
| \ No newline at end of file | |
| +vxmcfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vxmcfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvxmfunct6_of_num5c137be1443380a4c90e2a7daff09a85.tex b/sail_latex_riscv/valzvxmfunct6_of_num5c137be1443380a4c90e2a7daff09a85.tex | |
| index ea536afb..215c6bd3 100644 | |
| --- a/sail_latex_riscv/valzvxmfunct6_of_num5c137be1443380a4c90e2a7daff09a85.tex | |
| +++ b/sail_latex_riscv/valzvxmfunct6_of_num5c137be1443380a4c90e2a7daff09a85.tex | |
| @@ -1 +1 @@ | |
| -vxmfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vxmfunct6 | |
| \ No newline at end of file | |
| +vxmfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vxmfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvxmsfunct6_of_num071561f2e0157e4dd9f72d5b59b98023.tex b/sail_latex_riscv/valzvxmsfunct6_of_num071561f2e0157e4dd9f72d5b59b98023.tex | |
| index 226f4d2c..928b9de6 100644 | |
| --- a/sail_latex_riscv/valzvxmsfunct6_of_num071561f2e0157e4dd9f72d5b59b98023.tex | |
| +++ b/sail_latex_riscv/valzvxmsfunct6_of_num071561f2e0157e4dd9f72d5b59b98023.tex | |
| @@ -1 +1 @@ | |
| -vxmsfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> vxmsfunct6 | |
| \ No newline at end of file | |
| +vxmsfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> vxmsfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzvxsgfunct6_of_numd54b6e8e8c34b324ec1fe2784507c968.tex b/sail_latex_riscv/valzvxsgfunct6_of_numd54b6e8e8c34b324ec1fe2784507c968.tex | |
| index 56b993e1..3492263c 100644 | |
| --- a/sail_latex_riscv/valzvxsgfunct6_of_numd54b6e8e8c34b324ec1fe2784507c968.tex | |
| +++ b/sail_latex_riscv/valzvxsgfunct6_of_numd54b6e8e8c34b324ec1fe2784507c968.tex | |
| @@ -1 +1 @@ | |
| -vxsgfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> vxsgfunct6 | |
| \ No newline at end of file | |
| +vxsgfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> vxsgfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwc721d52ce2fe818d0148aaf1d5b6e2bec.tex b/sail_latex_riscv/valzwc721d52ce2fe818d0148aaf1d5b6e2bec.tex | |
| index 630fd9e8..a01e8f70 100644 | |
| --- a/sail_latex_riscv/valzwc721d52ce2fe818d0148aaf1d5b6e2bec.tex | |
| +++ b/sail_latex_riscv/valzwc721d52ce2fe818d0148aaf1d5b6e2bec.tex | |
| @@ -1 +1 @@ | |
| -wC : forall 'n, (0 <= 'n & 'n < 32). (regno('n), regtype) -> unit | |
| \ No newline at end of file | |
| +wC : forall ('n : Int), (0 <= 'n & 'n < 32). (regno('n), regtype) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwfd3e403dd75784ce7e0cfdf609e32706e.tex b/sail_latex_riscv/valzwfd3e403dd75784ce7e0cfdf609e32706e.tex | |
| index 6f598d1e..04505dcb 100644 | |
| --- a/sail_latex_riscv/valzwfd3e403dd75784ce7e0cfdf609e32706e.tex | |
| +++ b/sail_latex_riscv/valzwfd3e403dd75784ce7e0cfdf609e32706e.tex | |
| @@ -1 +1 @@ | |
| -wF : forall 'n, (0 <= 'n & 'n < 32). (regno('n), flenbits) -> unit | |
| \ No newline at end of file | |
| +wF : forall ('n : Int), (0 <= 'n & 'n < 32). (regno('n), flenbits) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwithin_clintc139e042afc9910b6edf55c2c70f2e80.tex b/sail_latex_riscv/valzwithin_clintc139e042afc9910b6edf55c2c70f2e80.tex | |
| index 65ac67f2..bbfb2681 100644 | |
| --- a/sail_latex_riscv/valzwithin_clintc139e042afc9910b6edf55c2c70f2e80.tex | |
| +++ b/sail_latex_riscv/valzwithin_clintc139e042afc9910b6edf55c2c70f2e80.tex | |
| @@ -1 +1 @@ | |
| -within_clint : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +within_clint : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwithin_htif_readable2f6131e40985c12d9270943521113c33.tex b/sail_latex_riscv/valzwithin_htif_readable2f6131e40985c12d9270943521113c33.tex | |
| index a698f8d4..324e3116 100644 | |
| --- a/sail_latex_riscv/valzwithin_htif_readable2f6131e40985c12d9270943521113c33.tex | |
| +++ b/sail_latex_riscv/valzwithin_htif_readable2f6131e40985c12d9270943521113c33.tex | |
| @@ -1 +1 @@ | |
| -within_htif_readable : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +within_htif_readable : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwithin_htif_writablec356d0ea372a60437fdf28745e5e9ae3.tex b/sail_latex_riscv/valzwithin_htif_writablec356d0ea372a60437fdf28745e5e9ae3.tex | |
| index 2aba172d..c4d0b8e8 100644 | |
| --- a/sail_latex_riscv/valzwithin_htif_writablec356d0ea372a60437fdf28745e5e9ae3.tex | |
| +++ b/sail_latex_riscv/valzwithin_htif_writablec356d0ea372a60437fdf28745e5e9ae3.tex | |
| @@ -1 +1 @@ | |
| -within_htif_writable : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +within_htif_writable : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwithin_mmio_readable2afaf2bf016b6ead5a5708ec8508d184.tex b/sail_latex_riscv/valzwithin_mmio_readable2afaf2bf016b6ead5a5708ec8508d184.tex | |
| index 6a86c91a..b292eb46 100644 | |
| --- a/sail_latex_riscv/valzwithin_mmio_readable2afaf2bf016b6ead5a5708ec8508d184.tex | |
| +++ b/sail_latex_riscv/valzwithin_mmio_readable2afaf2bf016b6ead5a5708ec8508d184.tex | |
| @@ -1 +1 @@ | |
| -within_mmio_readable : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +within_mmio_readable : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwithin_mmio_writable310089204ce2d4e6a33811b1982373ad.tex b/sail_latex_riscv/valzwithin_mmio_writable310089204ce2d4e6a33811b1982373ad.tex | |
| index 6e084641..82b29629 100644 | |
| --- a/sail_latex_riscv/valzwithin_mmio_writable310089204ce2d4e6a33811b1982373ad.tex | |
| +++ b/sail_latex_riscv/valzwithin_mmio_writable310089204ce2d4e6a33811b1982373ad.tex | |
| @@ -1 +1 @@ | |
| -within_mmio_writable : forall 'n, (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +within_mmio_writable : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwithin_phys_mem5b6233a64f93394cb594812a945dcbb2.tex b/sail_latex_riscv/valzwithin_phys_mem5b6233a64f93394cb594812a945dcbb2.tex | |
| index a3da8207..31106a78 100644 | |
| --- a/sail_latex_riscv/valzwithin_phys_mem5b6233a64f93394cb594812a945dcbb2.tex | |
| +++ b/sail_latex_riscv/valzwithin_phys_mem5b6233a64f93394cb594812a945dcbb2.tex | |
| @@ -1 +1 @@ | |
| -within_phys_mem : forall 'n, 'n <= max_mem_access. (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| +within_phys_mem : forall ('n : Int), 'n <= max_mem_access. (xlenbits, int('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwmvvfunct6_of_numea7d27acaa637aae81a629f16e6913f5.tex b/sail_latex_riscv/valzwmvvfunct6_of_numea7d27acaa637aae81a629f16e6913f5.tex | |
| index d75b1c9e..2ad59005 100644 | |
| --- a/sail_latex_riscv/valzwmvvfunct6_of_numea7d27acaa637aae81a629f16e6913f5.tex | |
| +++ b/sail_latex_riscv/valzwmvvfunct6_of_numea7d27acaa637aae81a629f16e6913f5.tex | |
| @@ -1 +1 @@ | |
| -wmvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 2). int('e) -> wmvvfunct6 | |
| \ No newline at end of file | |
| +wmvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 2). int('e) -> wmvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwmvxfunct6_of_numc8e574116de702aa4a9ccbf511f1cb39.tex b/sail_latex_riscv/valzwmvxfunct6_of_numc8e574116de702aa4a9ccbf511f1cb39.tex | |
| index 3a7bfd26..c310151e 100644 | |
| --- a/sail_latex_riscv/valzwmvxfunct6_of_numc8e574116de702aa4a9ccbf511f1cb39.tex | |
| +++ b/sail_latex_riscv/valzwmvxfunct6_of_numc8e574116de702aa4a9ccbf511f1cb39.tex | |
| @@ -1 +1 @@ | |
| -wmvxfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> wmvxfunct6 | |
| \ No newline at end of file | |
| +wmvxfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> wmvxfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzword_width_bytes3499487c0f03a80d8659fa504a62261f.tex b/sail_latex_riscv/valzword_width_bytes3499487c0f03a80d8659fa504a62261f.tex | |
| index 6e1dd7c8..a5463c8b 100644 | |
| --- a/sail_latex_riscv/valzword_width_bytes3499487c0f03a80d8659fa504a62261f.tex | |
| +++ b/sail_latex_riscv/valzword_width_bytes3499487c0f03a80d8659fa504a62261f.tex | |
| @@ -1 +1 @@ | |
| -word_width_bytes : word_width -> {'s, 's in {1, 2, 4, 8}. int('s)} | |
| \ No newline at end of file | |
| +word_width_bytes : word_width -> {('s : Int), 's in {1, 2, 4, 8}. int('s)} | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzword_width_of_num5022e9594f19a45eb3d8079a7a770a00.tex b/sail_latex_riscv/valzword_width_of_num5022e9594f19a45eb3d8079a7a770a00.tex | |
| index c1004a60..3be72a7e 100644 | |
| --- a/sail_latex_riscv/valzword_width_of_num5022e9594f19a45eb3d8079a7a770a00.tex | |
| +++ b/sail_latex_riscv/valzword_width_of_num5022e9594f19a45eb3d8079a7a770a00.tex | |
| @@ -1 +1 @@ | |
| -word_width_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> word_width | |
| \ No newline at end of file | |
| +word_width_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> word_width | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_kind_of_num3c6c37285ad605eea3332f170d5b12d9.tex b/sail_latex_riscv/valzwrite_kind_of_num3c6c37285ad605eea3332f170d5b12d9.tex | |
| index 823fa6f4..c29fd2e8 100644 | |
| --- a/sail_latex_riscv/valzwrite_kind_of_num3c6c37285ad605eea3332f170d5b12d9.tex | |
| +++ b/sail_latex_riscv/valzwrite_kind_of_num3c6c37285ad605eea3332f170d5b12d9.tex | |
| @@ -1 +1 @@ | |
| -write_kind_of_num : forall 'e, (0 <= 'e & 'e <= 10). int('e) -> write_kind | |
| \ No newline at end of file | |
| +write_kind_of_num : forall ('e : Int), (0 <= 'e & 'e <= 10). int('e) -> write_kind | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_ram_ea38ee1d0d3a88b7ca22f44ac1921c34c8.tex b/sail_latex_riscv/valzwrite_ram_ea38ee1d0d3a88b7ca22f44ac1921c34c8.tex | |
| index 328a4b57..f9f87487 100644 | |
| --- a/sail_latex_riscv/valzwrite_ram_ea38ee1d0d3a88b7ca22f44ac1921c34c8.tex | |
| +++ b/sail_latex_riscv/valzwrite_ram_ea38ee1d0d3a88b7ca22f44ac1921c34c8.tex | |
| @@ -1 +1 @@ | |
| -write_ram_ea : forall 'n, (0 < 'n & 'n <= max_mem_access). (write_kind, xlenbits, int('n)) -> unit | |
| \ No newline at end of file | |
| +write_ram_ea : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). (write_kind, xlenbits, int('n)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_ramaf59f53ca3a497b3b8d64cf319996fb8.tex b/sail_latex_riscv/valzwrite_ramaf59f53ca3a497b3b8d64cf319996fb8.tex | |
| index a2962363..d2a7d47a 100644 | |
| --- a/sail_latex_riscv/valzwrite_ramaf59f53ca3a497b3b8d64cf319996fb8.tex | |
| +++ b/sail_latex_riscv/valzwrite_ramaf59f53ca3a497b3b8d64cf319996fb8.tex | |
| @@ -1 +1,2 @@ | |
| -write_ram : forall 'n, (0 < 'n & 'n <= max_mem_access). (write_kind, xlenbits, int('n), bits(8 * 'n), mem_meta) -> bool | |
| \ No newline at end of file | |
| +write_ram : forall ('n : Int), (0 < 'n & 'n <= max_mem_access). | |
| + (write_kind, xlenbits, int('n), bits(8 * 'n), mem_meta) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_single_element09172c8fe0728a6d5dae03cf0bd1f1de.tex b/sail_latex_riscv/valzwrite_single_element09172c8fe0728a6d5dae03cf0bd1f1de.tex | |
| index 79a61f38..c2e7c397 100644 | |
| --- a/sail_latex_riscv/valzwrite_single_element09172c8fe0728a6d5dae03cf0bd1f1de.tex | |
| +++ b/sail_latex_riscv/valzwrite_single_element09172c8fe0728a6d5dae03cf0bd1f1de.tex | |
| @@ -1 +1 @@ | |
| -write_single_element : forall 'm 'x, (8 <= 'm & 'm <= 128). (int('m), int('x), regidx, bits('m)) -> unit | |
| \ No newline at end of file | |
| +write_single_element : forall ('m : Int) ('x : Int), (8 <= 'm & 'm <= 128). (int('m), int('x), regidx, bits('m)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_single_vregd5fffe79f09a117cfb1585d7f48d4b51.tex b/sail_latex_riscv/valzwrite_single_vregd5fffe79f09a117cfb1585d7f48d4b51.tex | |
| index 1dce120c..e65a3563 100644 | |
| --- a/sail_latex_riscv/valzwrite_single_vregd5fffe79f09a117cfb1585d7f48d4b51.tex | |
| +++ b/sail_latex_riscv/valzwrite_single_vregd5fffe79f09a117cfb1585d7f48d4b51.tex | |
| @@ -1 +1 @@ | |
| -write_single_vreg : forall 'n 'm, 'n >= 0. (int('n), int('m), regidx, vector('n, bits('m))) -> unit | |
| \ No newline at end of file | |
| +write_single_vreg : forall ('n : Int) ('m : Int), 'n >= 0. (int('n), int('m), regidx, vector('n, bits('m))) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_vmask33e97ec7149d648c3514fd2fa1f624cd.tex b/sail_latex_riscv/valzwrite_vmask33e97ec7149d648c3514fd2fa1f624cd.tex | |
| index c146d9c9..09bb8dda 100644 | |
| --- a/sail_latex_riscv/valzwrite_vmask33e97ec7149d648c3514fd2fa1f624cd.tex | |
| +++ b/sail_latex_riscv/valzwrite_vmask33e97ec7149d648c3514fd2fa1f624cd.tex | |
| @@ -1 +1 @@ | |
| -write_vmask : forall 'n, 'n >= 0. (int('n), regidx, vector('n, bool)) -> unit | |
| \ No newline at end of file | |
| +write_vmask : forall ('n : Int), 'n >= 0. (int('n), regidx, vector('n, bool)) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwrite_vrege57271b030e89c8da2ba7cac36733dd9.tex b/sail_latex_riscv/valzwrite_vrege57271b030e89c8da2ba7cac36733dd9.tex | |
| index 529de902..b5c6cb75 100644 | |
| --- a/sail_latex_riscv/valzwrite_vrege57271b030e89c8da2ba7cac36733dd9.tex | |
| +++ b/sail_latex_riscv/valzwrite_vrege57271b030e89c8da2ba7cac36733dd9.tex | |
| @@ -1 +1,2 @@ | |
| -write_vreg : forall 'n 'm 'p, 'n >= 0. (int('n), int('m), int('p), regidx, vector('n, bits('m))) -> unit | |
| \ No newline at end of file | |
| +write_vreg : forall ('n : Int) ('m : Int) ('p : Int), 'n >= 0. | |
| + (int('n), int('m), int('p), regidx, vector('n, bits('m))) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwv8e4143c46b47c3f26a9092f31168f86d.tex b/sail_latex_riscv/valzwv8e4143c46b47c3f26a9092f31168f86d.tex | |
| index 825c4d06..5a1322a8 100644 | |
| --- a/sail_latex_riscv/valzwv8e4143c46b47c3f26a9092f31168f86d.tex | |
| +++ b/sail_latex_riscv/valzwv8e4143c46b47c3f26a9092f31168f86d.tex | |
| @@ -1 +1 @@ | |
| -wV : forall 'n, (0 <= 'n & 'n < 32). (regno('n), vregtype) -> unit | |
| \ No newline at end of file | |
| +wV : forall ('n : Int), (0 <= 'n & 'n < 32). (regno('n), vregtype) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwvfunct6_of_numf2612e4dd67775e660e201c2da2365db.tex b/sail_latex_riscv/valzwvfunct6_of_numf2612e4dd67775e660e201c2da2365db.tex | |
| index d2a65f16..fe856abd 100644 | |
| --- a/sail_latex_riscv/valzwvfunct6_of_numf2612e4dd67775e660e201c2da2365db.tex | |
| +++ b/sail_latex_riscv/valzwvfunct6_of_numf2612e4dd67775e660e201c2da2365db.tex | |
| @@ -1 +1 @@ | |
| -wvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> wvfunct6 | |
| \ No newline at end of file | |
| +wvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> wvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwvvfunct6_of_num60a9700e4a130d5224ebced8e94cd0f7.tex b/sail_latex_riscv/valzwvvfunct6_of_num60a9700e4a130d5224ebced8e94cd0f7.tex | |
| index 8a971873..85f773f4 100644 | |
| --- a/sail_latex_riscv/valzwvvfunct6_of_num60a9700e4a130d5224ebced8e94cd0f7.tex | |
| +++ b/sail_latex_riscv/valzwvvfunct6_of_num60a9700e4a130d5224ebced8e94cd0f7.tex | |
| @@ -1 +1 @@ | |
| -wvvfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 6). int('e) -> wvvfunct6 | |
| \ No newline at end of file | |
| +wvvfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 6). int('e) -> wvvfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwvxfunct6_of_num55968a092ac4cf9d09354a5ba0267ad4.tex b/sail_latex_riscv/valzwvxfunct6_of_num55968a092ac4cf9d09354a5ba0267ad4.tex | |
| index 156237d2..a570f850 100644 | |
| --- a/sail_latex_riscv/valzwvxfunct6_of_num55968a092ac4cf9d09354a5ba0267ad4.tex | |
| +++ b/sail_latex_riscv/valzwvxfunct6_of_num55968a092ac4cf9d09354a5ba0267ad4.tex | |
| @@ -1 +1 @@ | |
| -wvxfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 6). int('e) -> wvxfunct6 | |
| \ No newline at end of file | |
| +wvxfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 6). int('e) -> wvxfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwx0042b1ee0bdb45d47dcb45d5a9461882.tex b/sail_latex_riscv/valzwx0042b1ee0bdb45d47dcb45d5a9461882.tex | |
| index a1ab12c8..d755be43 100644 | |
| --- a/sail_latex_riscv/valzwx0042b1ee0bdb45d47dcb45d5a9461882.tex | |
| +++ b/sail_latex_riscv/valzwx0042b1ee0bdb45d47dcb45d5a9461882.tex | |
| @@ -1 +1 @@ | |
| -wX : forall 'n, (0 <= 'n & 'n < 32). (regno('n), xlenbits) -> unit | |
| \ No newline at end of file | |
| +wX : forall ('n : Int), (0 <= 'n & 'n < 32). (regno('n), xlenbits) -> unit | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzwxfunct6_of_numf9d1384fcbbd36fd4b4b741bbcb47660.tex b/sail_latex_riscv/valzwxfunct6_of_numf9d1384fcbbd36fd4b4b741bbcb47660.tex | |
| index af2ad032..10c73a84 100644 | |
| --- a/sail_latex_riscv/valzwxfunct6_of_numf9d1384fcbbd36fd4b4b741bbcb47660.tex | |
| +++ b/sail_latex_riscv/valzwxfunct6_of_numf9d1384fcbbd36fd4b4b741bbcb47660.tex | |
| @@ -1 +1 @@ | |
| -wxfunct6_of_num : forall 'e, (0 <= 'e & 'e <= 3). int('e) -> wxfunct6 | |
| \ No newline at end of file | |
| +wxfunct6_of_num : forall ('e : Int), (0 <= 'e & 'e <= 3). int('e) -> wxfunct6 | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzxor_vecdacd54acc32f073fb01d1c188177bc8c.tex b/sail_latex_riscv/valzxor_vecdacd54acc32f073fb01d1c188177bc8c.tex | |
| index 808b0f66..6a07449f 100644 | |
| --- a/sail_latex_riscv/valzxor_vecdacd54acc32f073fb01d1c188177bc8c.tex | |
| +++ b/sail_latex_riscv/valzxor_vecdacd54acc32f073fb01d1c188177bc8c.tex | |
| @@ -1 +1 @@ | |
| -xor_vec : forall 'n. (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| +xor_vec : forall ('n : Int). (bits('n), bits('n)) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzz8operatorz0zi_sz956bf0eb8f384ccc952f43b53c00f14d1.tex b/sail_latex_riscv/valzz8operatorz0zi_sz956bf0eb8f384ccc952f43b53c00f14d1.tex | |
| index 07c2d3db..4248cb4d 100644 | |
| --- a/sail_latex_riscv/valzz8operatorz0zi_sz956bf0eb8f384ccc952f43b53c00f14d1.tex | |
| +++ b/sail_latex_riscv/valzz8operatorz0zi_sz956bf0eb8f384ccc952f43b53c00f14d1.tex | |
| @@ -1 +1 @@ | |
| -operator <_s : forall 'n, 'n > 0. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +operator <_s : forall ('n : Int), 'n > 0. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzz8operatorz0zi_uz975e6e2563e418725e99f2d020a6e269f.tex b/sail_latex_riscv/valzz8operatorz0zi_uz975e6e2563e418725e99f2d020a6e269f.tex | |
| index fb971d1f..cbc11d56 100644 | |
| --- a/sail_latex_riscv/valzz8operatorz0zi_uz975e6e2563e418725e99f2d020a6e269f.tex | |
| +++ b/sail_latex_riscv/valzz8operatorz0zi_uz975e6e2563e418725e99f2d020a6e269f.tex | |
| @@ -1 +1 @@ | |
| -operator <_u : forall 'n. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +operator <_u : forall ('n : Int). (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzz8operatorz0zizj_uz99c310fa9a514922f781c01ba7354f99f.tex b/sail_latex_riscv/valzz8operatorz0zizj_uz99c310fa9a514922f781c01ba7354f99f.tex | |
| index 66c1664e..4e1c2426 100644 | |
| --- a/sail_latex_riscv/valzz8operatorz0zizj_uz99c310fa9a514922f781c01ba7354f99f.tex | |
| +++ b/sail_latex_riscv/valzz8operatorz0zizj_uz99c310fa9a514922f781c01ba7354f99f.tex | |
| @@ -1 +1 @@ | |
| -operator <=_u : forall 'n. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +operator <=_u : forall ('n : Int). (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzz8operatorz0zkzj_sz904d1eed458afb5704c50166298da928d.tex b/sail_latex_riscv/valzz8operatorz0zkzj_sz904d1eed458afb5704c50166298da928d.tex | |
| index c71cb881..28d0949c 100644 | |
| --- a/sail_latex_riscv/valzz8operatorz0zkzj_sz904d1eed458afb5704c50166298da928d.tex | |
| +++ b/sail_latex_riscv/valzz8operatorz0zkzj_sz904d1eed458afb5704c50166298da928d.tex | |
| @@ -1 +1 @@ | |
| -operator >=_s : forall 'n, 'n > 0. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +operator >=_s : forall ('n : Int), 'n > 0. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzz8operatorz0zkzj_uz932ccbf178c78f699a55ad5e4e3db033c.tex b/sail_latex_riscv/valzz8operatorz0zkzj_uz932ccbf178c78f699a55ad5e4e3db033c.tex | |
| index c2d5b45f..a3bf84fd 100644 | |
| --- a/sail_latex_riscv/valzz8operatorz0zkzj_uz932ccbf178c78f699a55ad5e4e3db033c.tex | |
| +++ b/sail_latex_riscv/valzz8operatorz0zkzj_uz932ccbf178c78f699a55ad5e4e3db033c.tex | |
| @@ -1 +1 @@ | |
| -operator >=_u : forall 'n. (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| +operator >=_u : forall ('n : Int). (bits('n), bits('n)) -> bool | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzzzero_extendd7d8b08ed1667724fd3dfa843cf0ae78.tex b/sail_latex_riscv/valzzzero_extendd7d8b08ed1667724fd3dfa843cf0ae78.tex | |
| index 0ebb8c81..732387a3 100644 | |
| --- a/sail_latex_riscv/valzzzero_extendd7d8b08ed1667724fd3dfa843cf0ae78.tex | |
| +++ b/sail_latex_riscv/valzzzero_extendd7d8b08ed1667724fd3dfa843cf0ae78.tex | |
| @@ -1 +1 @@ | |
| -zero_extend : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m) | |
| \ No newline at end of file | |
| +zero_extend : forall ('n : Int) ('m : Int), 'm >= 'n. (implicit('m), bits('n)) -> bits('m) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzzzeros_implicitce1dd4153c9a1823a9697c4472c43ebf.tex b/sail_latex_riscv/valzzzeros_implicitce1dd4153c9a1823a9697c4472c43ebf.tex | |
| index bc44e9ad..5ed1e1f4 100644 | |
| --- a/sail_latex_riscv/valzzzeros_implicitce1dd4153c9a1823a9697c4472c43ebf.tex | |
| +++ b/sail_latex_riscv/valzzzeros_implicitce1dd4153c9a1823a9697c4472c43ebf.tex | |
| @@ -1 +1 @@ | |
| -zeros_implicit : forall 'n, 'n >= 0. implicit('n) -> bits('n) | |
| \ No newline at end of file | |
| +zeros_implicit : forall ('n : Int), 'n >= 0. implicit('n) -> bits('n) | |
| \ No newline at end of file | |
| diff --git a/sail_latex_riscv/valzzzicondop_of_num6c236bc72d5e4b8fcf599f8f5df132a1.tex b/sail_latex_riscv/valzzzicondop_of_num6c236bc72d5e4b8fcf599f8f5df132a1.tex | |
| index e9a6f091..ddc8d0fa 100644 | |
| --- a/sail_latex_riscv/valzzzicondop_of_num6c236bc72d5e4b8fcf599f8f5df132a1.tex | |
| +++ b/sail_latex_riscv/valzzzicondop_of_num6c236bc72d5e4b8fcf599f8f5df132a1.tex | |
| @@ -1 +1 @@ | |
| -zicondop_of_num : forall 'e, (0 <= 'e & 'e <= 1). int('e) -> zicondop | |
| \ No newline at end of file | |
| +zicondop_of_num : forall ('e : Int), (0 <= 'e & 'e <= 1). int('e) -> zicondop | |
| \ No newline at end of file |
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