Last active
August 15, 2022 18:23
-
-
Save 02015678/301c21d95b07f938112218a36bf1c8b2 to your computer and use it in GitHub Desktop.
auCdl Schematic Netlist Export Setup for Mentor Calibre
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| ; Calibre Netlist Export Setup | |
| ; DO NOT MODIFY | |
| ; DO NOT DELETE | |
| cdlOutKeys = list(nil | |
| 'simStopList '("auCdl") | |
| 'simViewList '("auCdl" "schematic") | |
| 'globalGndSig "" | |
| 'globalPowerSig "" | |
| 'shrinkFACTOR 0.0 | |
| 'checkScale "meter" | |
| 'diodeCheck "none" | |
| 'capacitorCheck "none" | |
| 'resistorCheck "none" | |
| 'resistorModel "" | |
| 'shortRES 2000.0 | |
| 'simNetlistHier t | |
| 'pinMAP 'nil | |
| 'displayPININFO t | |
| 'checkLDD 'nil | |
| 'incFILE "$HOME/Calibre/lvs/source.added" | |
| 'connects "" | |
| 'setEQUIV "" | |
| 'simRunDir "$HOME/TEMP/calibre/lvs" | |
| 'simSimulator "auCdl" | |
| 'simViewName "schematic" | |
| ) | |
What is the content of Calibre/lvs/source.added ?
In case your PDK provide a SPICE file containing ESD/IO and/or STD cell library, you may need to to add that line, so this file will be automatically append on your exported netlist for LVS.
If that is not the case, simple remove that line.
Some PDK provides a .simrc file to setup all CDL output setup stuff. You may also ask FAB for technical support.
@@@@@
Some PDK setup might automatically reload CDL output setup and overwrite auCdlSchNetlistExportSetup.il setup. If that is the case, edit .simrc file directly.
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
What is the content of Calibre/lvs/source.added ?